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: Field-effect transistors

Eugeniy E. Mikhailov

The College of William & Mary

Week 8

Eugeniy Mikhailov (W&M) 1 Week 8 1 / 14 Field-effect (FET)

Junction-FET

NJFET PJFET

Drain Gate Drain Gate Source

Source Metal-- FET (MOSFET) gate is truly isolated there is a forth terminal usually connected to source

NMOSFET PMOSFET

Drain Drain Gate Gate Source Source

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 2 / 14 FET vs BJT

FET pros FET cons very high input impedance have large parameter spread JFET - impedance 1012 Ω MOSFET - impedance 1014 Ω thus very small current into the base (pA range) can operate bidirectionally as result very little power consumption for the network

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 3 / 14 Let’s focus on NJFET

Drain Gate

Source

General notes N-channel usually faster due to higher mobility of vs holes current goes from drain to source (thus the names) drain and source are nearly identical thus sometimes gate is centered on some diagrams D G

S can be used backwards with almost the same performance arrow indicates direction of the PN junction D G

S

thus normal operation (low current into the gate) when VG < VS

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 4 / 14 NJFET gate voltage rules

Vp: pinch-off voltage (intrinsic parameter), Vp < 0 for NJFETs it is called Vth:threshold voltage for

Vgs < Vp ID = 0 Vgs > 0.6 V device fails, remember about gate D G S

Vp < Vgs < 0.6 V normal operation Id (Vgs, Vds)

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 5 / 14 Id vs VDS

Linear region     VDS < VGS − Vp 2 Id(VDS) = k(2(VGS − Vp)VDS − VDS)  Saturation region   V > V − V  DS GS p   2   Id(VDS) = k(VGS − Vp)  k is a constant

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 6 / 14 VDS < VGS − Vp 2 Id(VDS) = k(2(VGS − Vp)VDS − VDS) ≈ 2k(VGS − Vp)VDS

Real Id vs VDS linear region

7

6

5

4 (mA) D

I 3

2 2 Id(VDS)=k(2 (VGS-Vp) VDS - VDS ) 1 2 Id(VDS)=k(VGS-Vp) 0 0 2 4 6 8 10 12 14 16 18 20

VDS (mV)

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 7 / 14 Real Id vs VDS linear region

7

6

5

4 (mA) D

I 3

2

1 2 Id(VDS)=k(2 (VGS-Vp) VDS - VDS ) 0 0 0.5 1 1.5 2

VDS (mV)

VDS < VGS − Vp 2 Id(VDS) = k(2(VGS − Vp)VDS − VDS) ≈ 2k(VGS − Vp)VDS

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 7 / 14 VDS > VGS − Vp 2 Id(VDS) = k(VGS − Vp)

Real Id vs VDS saturation region

7

6

5

4 (mA) D

I 3

2 2 Id(VDS)=k(2 (VGS-Vp) VDS - VDS ) 1 2 Id(VDS)=k(VGS-Vp) 0 0 2 4 6 8 10 12 14 16 18 20

VDS (mV)

IDSS saturation drain current, depends on VGS and Vp

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 8 / 14 Real Id vs VDS saturation region

7

6

5

4 (mA) D

I 3

2

1 2 Id(VDS)=k(VGS-Vp) =IDSS 0 8 10 12 14 16 18 20

VDS (mV)

VDS > VGS − Vp 2 Id(VDS) = k(VGS − Vp)

IDSS saturation drain current, depends on VGS and Vp

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 8 / 14 the specifications

VGS(off ) is the same as Vp Eugeniy Mikhailov (W&M) Electronics 1 Week 8 9 / 14 NJFET voltage controlled divider

Vin

Rd Vout

Id

Vctrl

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 10 / 14 NJFET compensated voltage controlled divider

Vin

Rd V R out R Id

Vctrl

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 11 / 14 NJFET constant

Vdd

RL

Id

Rs

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 12 / 14 FET source follower

Vdd

Vout Vin

Rs

Rs vout = vin Rs + 1/gm

Vout > Vin

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 13 / 14 FET source follower improved

Vdd

Vin

Rs vout = vin

Vout = Vin Vout

Rs

Vss

Eugeniy Mikhailov (W&M) Electronics 1 Week 8 14 / 14