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Article A Graphene/Polycrystalline and Its Integration in a Photodiode–– Field Effect

Yu-Yang Tsai, Chun-Yu Kuo, Bo-Chang Li, Po-Wen Chiu and Klaus Y. J. Hsu *

Institute of Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan; [email protected] (Y.-Y.T.); [email protected] (C.-Y.K.); [email protected] (B.-C.L.); [email protected] (P.-W.C.) * Correspondence: [email protected]; Tel.: +886-3-574-2594

 Received: 25 May 2020; Accepted: 15 June 2020; Published: 17 June 2020 

Abstract: In recent years, the characteristics of the graphene/crystalline silicon junction have been frequently discussed in the literature, but study of the graphene/ junction and its potential applications is hardly found. The present work reports the observation of the electrical and optoelectronic characteristics of a graphene/polycrystalline silicon junction and explores one possible usage of the junction. The current–voltage curve of the junction was measured to show the typical exponential behavior that can be seen in a forward biased , and the photovoltage of the junction showed a logarithmic dependence on intensity. A new phototransistor named the “photodiode–oxide–semiconductor field effect transistor (PDOSFET)” was further proposed and verified in this work. In the PDOSFET, a graphene/polycrystalline silicon photodiode was directly merged on top of the of a conventional metal–oxide–semiconductor field effect transistor (MOSFET). The magnitude of the channel current of this phototransistor showed a logarithmic dependence on the illumination level. It is shown in this work that the PDOSFET facilitates a better pixel design in a complementary metal–oxide–semiconductor (CMOS) image , especially beneficial for high dynamic range (HDR) image detection.

Keywords: graphene; polycrystalline silicon; photodiode; phototransistor; pixel; high dynamic range (HDR) image

1. Introduction The unique structural, electronic, and optical properties of graphene have made this two-dimensional material an attractive subject of research in recent years. While the high carrier mobility in graphene opened the door to its applications in high-speed electronics [1–4], the application of graphene in has also become an interesting and important topic. The linear dispersion of the Dirac in graphene can be utilized for broadband optical detection, and the intrinsic speed of the can be very high. Unfortunately, using single-layer graphene for vertical optical absorption led to very low responsivities [5–8], normally below or about 10 mA/W, because of the high transparency of graphene over a wide band of light [9,10]. Many interesting strategies have been proposed to enhance the optical absorption by the graphene in graphene-based photodetectors. They require specially patterned structures such as waveguides [11], resonant cavities [12], plasmonic nanostructures [13], graphene nanodisks [14], or graphene quantum dots [15,16], and the resultant photocurrent responsivities have been successfully increased. For more responsive optical detection in simple planar, single-layer graphene-based photodetectors, a natural way is to construct a hybrid device in which the role of optical absorber is left to other materials in the

Micromachines 2020, 11, 596; doi:10.3390/mi11060596 www.mdpi.com/journal/micromachines Micromachines 2020, 11, 596 2 of 16 device and the graphene is used as an efficient conductive material for carrier collection. Graphene has been adopted to form transparent electrodes in various solar cells [17–20]. It has also been extensively combined with crystalline silicon (c-Si) and to form Schottky [21–32]. In these cases, the transparency of graphene becomes an advantage. Incident light is not blocked by the graphene, and the spectral photocurrent responsivities of the devices are determined by the other combined materials instead of the graphene. Taking graphene/c-Si junction photodetectors as an example, the c-Si is the optical absorber and photocurrent responsivities in the order of 100 mA/W are typically obtained. The performance is similar to that of typical c-Si P/N junction photodiodes and is good enough for numerous applications. Interestingly, while there have been a number of studies studying graphene/c-Si junctions and their application to photodetection [21–31], the study of the graphene/polycrystalline silicon (graphene/poly-Si) junction and its application is rare in the literature. Only Lin et al. have investigated the change in the current density-voltage (J-V) characteristic of a four-layer graphene/p-type poly-Si junction after being influenced by some illumination [33]. No study on single-layer graphene/n-type poly-Si junctions has been reported. However, it may be beneficial to pay attention to this kind of junction because it could have application potential on occasions when poly-Si exists. Metal–oxide–semiconductor field effect () with a poly-Si gate and poly-Si thin film solar cells are two examples of possible applications. In the present work, a junction made of single-layer graphene and n-type poly-Si was fabricated and characterized. Furthermore, a new phototransistor named the PD–oxide–semiconductor field effect transistor (PDOSFET), in which the graphene/poly-Si junction photodiode (PD) is embedded in a conventional metal–oxide–semiconductor field effect transistor (MOSFET), was proposed and experimentally verified. Analysis showed that such phototransistor is particularly useful in constructing the pixels in complementary-metal–oxide–semiconductor (CMOS) image for detecting high-contrast images in which the brightness is of high dynamic range (HDR).

2. Fabrication and Characterization of Graphene/Poly-Si Junction Before a graphene/poly-Si junction is used for applications, it is essential to have a look at its general electrical and optoelectronic characteristics. For this purpose, samples of graphene/n-type poly-Si junction were fabricated. A 300 nm-thick phosphorus-doped poly-Si film was deposited on an n-type Si by using low pressure chemical vapor deposition (LPCVD) at a temperature of 4 620 ◦C. Because the optical absorption coefficient of poly-Si in the visible light band is between 10 5 1 and 10 cm− [34], the thickness (300 nm) of the poly-Si was chosen to ensure that most of the incident could be absorbed when the film was illuminated by visible light. The graphene film was first grown on a copper foil by using ambient pressure chemical ovapor deposition (APCVD) at a temperature of 1040 ◦C and was subsequently transferred onto the poly-Si by using a commonly adopted graphene wet transfer process [35,36]. The poly-Si was partially covered by the transferred graphene film. Afterwards, the wafer was cut into discrete devices, each with an area of about 25 mm2. Silver paste was respectively applied to the surface of exposed poly-Si and the surface of graphene to form the two electrical terminals of the graphene/n-type poly-Si junction. The reason for using silver paste as the contact material was that it could be easily applied to quickly finish sample preparation and it had been tested to form ohmic contacts with graphene and with n-type c-Si. It was speculated that the paste might still form ohmic contacts with n-type poly-Si. Figure1 shows a photo of typical samples placed on glass. Micromachines 2020, 11, 596 3 of 16 Micromachines 2020, 11, x 3 of 17 Micromachines 2020, 11, x 3 of 17

FigureFigure 1. SamplesSamples 1. Samples of of graphene/poly-Si of graphene graphene/poly-Si/poly-Si junction. junction. junction. The The The graphegraphe graphenenene film film filmpartially partially partially covers covers covers the the poly-Si poly-Si the in poly-Si each in each in eachsample.sample. sample.

R SH The The sheetsheet sheet resistanceresistance resistance ( (SHR (SH)R) of of) theof the graphenethe graphene graphene film filmfilm was was measured measuredmeasured by usingby by using using a four-point a four-pointa four-point probe. probe. Valuesprobe. betweenValuesValues between 250 betweenΩ/square 250 250 Ω and/square Ω/square 300 Ωand /andsquare 300 300 Ω wereΩ/square/square obtained werewere forobtained all the for for samples. all all the the samples. Figure samples.2 showsFigure Figure the2 shows 2 Raman shows the Raman spectrum of the graphene after the transfer process. From the 2:1 intensity ratio between spectrumthe Raman of spectrum the graphene of the after graphene the transfer after the process. transf Fromer process. the 2:1 From intensity the 2:1 ratio intensity between ratio the between 2D and the 2D and G peaks, it can be deduced that the transferred graphene is of a single layer [35]. The slight Gthe peaks, 2D and it G can peaks, be deduced it can be that deduced the transferred that the transfe graphenerred graphene is of a single is of layer a single [35 layer]. The [35]. slight The D slight peak D peak indicates that there may be some defects such as wrinkles in the transferred graphene layer. indicatesD peak indicates that there that may there be somemay be defects some suchdefects as wrinklessuch as wrinkles in the transferred in the transferred graphene graphene layer. layer.

Figure 2. Raman spectrum of the transferred graphene layer. It indicates that the graphene is a single layerFigure with slight2. Raman defects. spectrum of the transferred graphene layer. It indicates that the graphene is a single layer with slight defects. OpticalFigure 2. measurement Raman spectrum was of alsothe transferred performed graphene to characterize layer. It theindicates optical that transmission the graphene rates is a single of several Optical measurement was also performed to characterize the optical transmission rates of transferredlayer with graphene slight defects. samples. Graphene films were placed on glass substrates with a 96% transmission several transferred graphene samples. Graphene films were placed on glass substrates with a 96% rate. The total transmission rates of the samples were then measured. All the resultant transmission transmissionOptical measurement rate. The total was transmission also performed rates of tothe charsamplesacterize were thethen optical measured. transmission All the resultant rates of ratestransmission of the graphene rates of films the graphene are between films 97% are andbetween 98% 97% over and a wide98% over range a wide of optical range wavelengths,of optical several transferred graphene samples. Graphene films were placed on glass substrates with a 96% whichwavelengths, is consistent which with is consistent the single-layer with the structure single-lay ofer structure the graphene of the graphene films. Figure films.3 Figure shows 3 shows a typical transmission rate. The total transmission rates of the samples were then measured. All the resultant measureda typical spectrum measured of spectrum the graphene-on-glass of the graphene-on-glass assembly. assembly. transmission rates of the graphene films are between 97% and 98% over a wide range of optical wavelengths, which is consistent with the single-layer structure of the graphene films. Figure 3 shows a typical measured spectrum of the graphene-on-glass assembly.

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Figure 3. Measured total transmission rate of a typical graphene-on-glass sample. The transmission Figure 3. Measured total transmission rate of a typical graphene-on-glass sample. The transmission rate of the glass is about 96%. rate of the glass is about 96%. To see the graphene/n-type poly-Si junction behave like an ohmic junction or a Schottky junction, the darkTo seeI– Vthecurve graphene/n-type of the fabricated poly-Si graphene junction/n-type behave poly-Si like an junctionohmic junction was measured or a Schottky by using junction, the Agilentthe dark 4156a I–V Semiconductorcurve of the fabricated Parameter graphene/n-type Analyzer (Agilent, poly-Si Santa junction Clara, CA, was USA) measured at room by temperature using the withAgilent the 4156a terminal Semiconductor of the poly-Si Parameter set at ground Analyzer potential. (Agilent, Figure Santa4 shows Clara, a typicalCA, USA) result at alongroom withtemperature the I–V withcurve the under terminal the illuminationof the poly-Si of set a halogenat ground lamp. potential. The optical Figure power4 shows of a the typical lamp result was unknown.along with the It can I–V becurve seen under from the Figure illumination4 that the of measured a halogen Ilamp.–V curves The optical do not power show of the the simple lamp exponentialwas unknown. behavior It can be of seen a single from rectifying Figure 4 junction.that the measured Instead, theyI–V curves show do the not typical show behavior the simple of aexponential metal–semiconductor–metal behavior of a single (MSM) rectifying structure junction. with Instead, two asymmetric they show rectifying the typical junctions behavior [37 ,of38 ].a Themetal–semiconductor–metal exponential behavior of the (MSM) curves structure under negative with tw biaso asymmetric indicates that rectifying in addition junctions to the single-layer[37,38]. The grapheneexponential/n-type behavior poly-Si of the junction, curves another under negative rectifying bias junction indicates with that a smaller in addition built-in to potentialthe single-layer and in thegraphene/n-type opposite direction poly-Si exists junction, in the currentanother path. rectifying In this junction case, it should with a besmaller due to built-in the silver potential paste/poly-Si and in junction.the opposite Unlike direction our previously exists in the tested current silver path. paste In/n-type this case, c-Si it junction should thatbe due showed to the ohmic silver conduction,paste/poly- thisSi junction. silver paste Unlike/poly-Si our junctionpreviously appears tested to besilver a Schottky paste/n-type contact, c-Si and junction it forms that an MSMshowed structure ohmic alongconduction, with the this single-layer silver paste/poly-Si graphene/ n-typejunction poly-Si appear junction.s to be a TheSchottky phenomenon contact, thatand theit forms current an underMSM forwardstructure bias along increased with the when single-layer light was graphene/n-type applied to the sample poly-Si also junction. confirms The this phenomenon point. The that reverse the biasedcurrent silver under paste forward/poly-Si bias junctionincreased contributed when light awas photo-generated applied to the electronsample also current confirms to the this forward point. biasedThe reverse graphene biased/n-type silver poly-Si paste/poly-Si junction. junction If the silvercontributed paste/ poly-Sia photo-generated junction was ohmic, current the forward to the biasforward current biased should graphene/n-type have decreased poly-Si when junction. the light wasIf the on. silver Although paste/poly-Si the silver junction paste/poly-Si was ohmic, junction the complicatesforward bias the current measured shouldI–V havecurves decreased and it is when no longer the light straightforward was on. Although to extract the the silver exact paste/poly- values of junctionSi junction parameters complicates (e.g., the Richardson measured constantI–V curves and and Schottky it is no barrier), longer straightforward we can still see to that extract the dark the currentexact values flowing of throughjunction theparameters single-layer (e.g., graphene Richards/n-typeon constant poly-Si and junction Schottky increases barrier), exponentially we can still with see increasingthat the dark forward current bias flowing voltage. through The large the ideality single-layer factor, n graphene/n-type, of this disturbed poly-Si forward junction bias characteristic increases wasexponentially found by with curve increasing fitting to forward be about bias 10. voltage. The exponential The large dark idealityI–V factor,curve undern, of this forward disturbed bias impliesforward that bias we characteristic should be able was to found see a logarithmicby curve fitting dependence to be about on light10. The intensity exponential from the dark open-circuit I–V curve photovoltageunder forward of bias the junction,implies that as analyzedwe should below. be able to see a logarithmic dependence on light intensity from the open-circuit photovoltage of the junction, as analyzed below.

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Figure 4. Measured I–V curves of the graphene/n-type poly-Si junction. The voltage is applied to the graphene terminal and the poly-Si terminal is grounded. Figure 4. Measured I–V curves of the graphene/n-type poly-Si junction. The voltage is applied to the grapheneThe general terminal exponential and the po darkly-SiI terminal–V characteristic is grounded. of a junction can be expressed as     The general exponential dark I–V characteristic ofV Da junction can be expressed as ID = IS exp 1 (1) VT − = 1 (1) nkT where ID is the junction current, VT = , n is the ideality factor of the junction, Is is the dark reverse q where is the junction current, = , n is the ideality factor of the junction, Is is the dark reverse saturation current of the junction, and VD is the voltage across the junction. When this junction is saturationused as a current PD, the of short-circuit the junction, photocurrent and is the (Iph )voltage of the PDacross isdirectly the junction. proportional When this to thejunction incident is usedlight as intensity. a PD, the If short-circuit at t = 0, a light photocurrent starts to illuminate (Iph) of the the PD junction is directly under proportional the open-circuit to the incident condition, light the intensity.photocurrent If atdoes t = 0, not a flowlight out.starts It chargesto illuminate the junction the junction under (C theD) and open-circuit internally condition, forward biases the photocurrentthe junction atdoes the not same flow time. out. The It charges dynamics the canjunction be described capacitance by (CD) and internally forward biases the junction at the same time. The dynamics can be described by dVD Iph ID = CD (2) dt − = (2) Solving Equations (1) and (2) by the separation of the variables, with the zero initial condition Solving Equations (1) and (2) by the separation of the variables, with the zero initial condition VD(0) = 0, one can derive that the open-circuit junction voltage under illumination, i.e., the (0) =0, one can derive that the open-circuit junction voltage under illumination, i.e., the photovoltage (Vph), should follow the next equation: photovoltage (Vph), should follow the next equation:      Iph + Is  V (t) = V ln  (3) ph T  +   (ℎIph+Is)t  ℎ() = Iph exp[ ] + Is  (3) −(VTC+D ) ℎ + ℎ where Iph is the photocurrent, and t is the exposure time. The logarithmic response of the photovoltage to light intensity (via Iph) is advantageous because it mimics human eyes’ response to brightness. where Iph is the photocurrent, and t is the exposure time. The logarithmic response of the photovoltage Utilizing Vph as the output allows one to detect a wide dynamic range of light intensity. Unlike to light intensity (via Iph) is advantageous because it mimics human eyes’ response to brightness. the photocurrent that may easily saturate the subsequent circuit at high illuminance, the Utilizing Vph as the output signal allows one to detect a wide dynamic range of light intensity. Unlike photovoltage allows the circuit to function properly because the signal is logarithmically compressed the photocurrent that may easily saturate the subsequent reading circuit at high illuminance, the at high illuminance but still linear at low illuminance. When the incident light is weak or the exposure photovoltage allows the circuit to function properly because the signal is logarithmically compressed time is short, Equation (3) reduces to at high illuminance but still linear at low illuminance. When the incident light is weak or the exposure Ipht time is short, Equation (3) reduces to Vph  (4) CD

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ℎ ℎ ≅ (4) Micromachines 2020, 11, 596 6 of 16 which indicates that the photovoltage under the weak illumination condition is a linear function of whichthe incident indicates light that intensity, the photovoltage just as the underphotocurrent the weak is. illumination On the other condition hand, for is strong a linear illumination function of that the incidentproduces light a large intensity, photocurrent, just as theEquation photocurrent (3) becomes is. On the other hand, for strong illumination that produces a large photocurrent, Equation (3) becomes ℎ + ℎ ℎ = ( )≅ ( ) (5) Iph + Is Iph V = V ln( )  V ln( ) (5) ph T I T I which shows that the photovoltage is a compresses d output of the strong incident light whichintensity. shows Note that that the both photovoltage Equations is (4) a compressedand (5) are independent output signal of of the the area strong of incidentPD since light Iph, Is intensity., and CD Noteare all that proportional both Equations to the (4)junction and (5) area, are independentwhich means ofthat the it areais not of necessary PD since Itoph ,enlargeIs, and theCD aredevice all proportionalsize of the PD to in the order junction to obtain area, a which significant means magnitude that it is not of necessaryphotovoltage. to enlarge the device size of the PD inSince order the to measured obtain a significant dark I–V curve magnitude of the of fabricated photovoltage. graphene/n-type poly-Si junction sample at roomSince temperature the measured shows dark an exponentialI–V curve of characteristic the fabricated under graphene forward/n-type bias, poly-Si it can junctionbe expected sample that atif roomthis junction temperature is used shows as a anPD, exponential the photovoltage characteristic of the PD under should forward exhibit bias, a itlogarithmic can be expected dependence that if this on junctionthe incident is used light as intensity. a PD, the Even photovoltage though there of the exists PD shouldan additional exhibit silver a logarithmic paste/poly-Si dependence junction on at thethe incidentother side light of the intensity. poly-Si, Even the thoughphoto-generated there exists holes an additional in the poly-Si silver can paste still/poly-Si flow to junction the graphene at the other and sidebuild of up the the poly-Si, photovoltage. the photo-generated Figure 5 shows holes the inmeas theured poly-Si open-circuit can still flow photovoltage to the graphene of a graphene/n- and build uptype the poly-Si photovoltage. junction Figuresample5 showsunder thethe measuredillumination open-circuit of a halogen photovoltage lamp. When of a the graphene illuminance/n-type is poly-Si49,000 lux, junction the photovoltage sample under reaches the illumination 0.424 V. As of expected, a halogen the lamp. photovoltage When the increases illuminance logarithmically is 49,000 lux, thewith photovoltage the illuminance. reaches At higher 0.424 V.illuminance, As expected, the the increase photovoltage in photovoltage increases is logarithmicallygradually compressed. with the illuminance. At higher illuminance, the increase in photovoltage is gradually compressed.

Figure 5. Measured photovoltage of the graphene/n-type poly-Si junction photodiode (PD) under the illumination of a halogen lamp. Figure 5. Measured photovoltage of the graphene/n-type poly-Si junction photodiode (PD) under the 3. Photodiode–Oxide–Semiconductorillumination of a halogen lamp. Field Effect Transistor The logarithmic behavior of the photovoltage of a PD makes this variable particularly useful 3. Photodiode–Oxide–Semiconductor Field Effect Transistor for being adopted in CMOS image sensors as a signal to detect high dynamic range (HDR) images. Furthermore,The logarithmic the graphene behavior/n-type of the poly-Si photovoltage junction PDof a can PD bringmakes even this morevariable benefit particularly to this application useful for becausebeing adopted it can be in implementedCMOS image right sensors on topas a of signal the gate to oxidedetect ofhigh a MOSFET dynamic in range the pixel (HDR) of a images. CMOS imageFurthermore, sensor. the Figure graphene/n-type6 shows the typical poly-Si structure junction PD of a can three-transistor bring even more (3T) benefit active to pixel this commonlyapplication usedbecause in a it CMOS can be image implemented sensor [39 right–41]. on top of the gate oxide of a MOSFET in the pixel of a CMOS

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. Figure 6 shows the typical structure of a three-transistor (3T) active pixel commonly Micromachines 2020, 11, 596 7 of 16 used in a CMOS image sensor [39–41].

Figure 6. Conventional 3T pixel structure in a complementary-metal–oxide–semiconductor (CMOS) imageFigure sensor. 6. Conventional 3T pixel structure in a complementary-metal–oxide–semiconductor (CMOS) image sensor. Conventionally, the PD in the pixel is a monolithic P–N junction diode located beside the transistors. To operateConventionally, the pixel, the the Reset PD transistorin the pixel is first is a turned mono onlithic to setP–N the junction voltage atdiode located G (VG) beside to a high the valuetransistors. (VDD). To Then, operate the Reset the pixel, transistor the Reset is turned transistor off and is firstVG is turned reduced on byto set the the discharging voltage at mechanism node G (VG) dueto a to high the photocurrentvalue (VDD). Then,Iph generated the Reset from transistor the PD. is The turned amount off ofand the V voltageG is reduced reduction by the (∆ Vdischarging) at node Gmechanism is a linear function due to the of Iphotocurrentph as shown in Iph Equation generated (6): from the PD. The amount of the voltage reduction (ΔV) at node G is a linear function of Iph as shown in Equation (6): Iph∆t Iph∆t ∆V = ∆= ∆ (6) ∆ = CT =CD + CG + Cp (6) + + where ∆t is a specified discharging period, CT is the total capacitance at node G, CD is the capacitance where Δt is a specified discharging period, CT is the total capacitance at node G, CD is the capacitance of the PD, CG is the capacitance looking into the gate of the source follower (SF) transistor, and Cp is of the PD, CG is the capacitance looking into the gate of the source follower (SF) transistor, and Cp is the parasitic capacitance due to interconnect. A large fill factor of the PD in the pixel is preferred so the parasitic capacitance due to interconnect. A large fill factor of the PD in the pixel is preferred so that Iph can be maximized and CT can be less influenced by CG and Cp. After the discharging period, that Iph can be maximized and CT can be less influenced by CG and Cp. After the discharging period,

VG = VDD ∆V (7) =DD− (7)

TheTheV GVGsignal signal is is output output through through the the source sour followerce follower to the to the column column bus, bus, and and∆V is ΔV used is used to represent to represent the averagethe average light intensitylight intensity during theduring discharging the discharging period. This period. linear This operation linear principle operation has principle limitations: has Firstly,limitations: for high Firstly, light for intensity, high lightIph and intensity,∆V can Iph easily and Δ becomeV can easily too large become and VtooG maylarge be and reduced VG may too be muchreduced to make too much the SF to transistor make the functional.SF transistor This function saturational. This limits saturation the detectable limits the range detectable of input range light of intensity.input light Secondly, intensity. for Secondly, high resolution for high image resolution sensors, image there existssensors, a tradeo thereff existsbetween a tradeoff the pixel between size and the thepixel fill factorsize and of the fill PD factor in a pixel. of the This PD limitsin a pixel. the valuesThis limits of Iph theand valuesCD, and of I theph and influence CD, and from the influenceCG and Cpfrombecomes CG and obvious. Cp becomes Modifying obvious. the Modifying 3T pixel structure the 3T pixel can resolvestructure these canlimitations. resolve these limitations. FigureFigure7 shows7 shows the the proposed proposed modified modified 3T 3T pixel pixel structure structure in in which which only only slight slight changes changes from from FigureFigure6 are 6 are needed: needed: the the location location of theof the Reset Reset switch is changed, is changed, the polarity the polarity of the of PD the is PD reversed, is reversed, and theand ground the ground (GND) (GND) potential potential is replaced is replaced by a properby a proper positive positive bias voltage bias voltage (VREF ()V thatREF) makesthat makes the SF the transistorSF transistor always always functional. functional. In this In this way, way, the theVG VisG first is first reset reset to VtoREF VREFand and then then becomes becomes the the sum sum of of VVREFREFand and the the photovoltage photovoltage of of the the PD PD after after some some exposure exposure time timet .t The. The photovoltage photovoltage of of the the PD PD can can be be expressedexpressed as as Equation Equation (3) (3) except except that thatC DCDshould should now now be be replaced replaced by byC TC.T Therefore,. Therefore, as as explained explained in in EquationsEquations (4) (4) and and (5), (5), the theV VGGin in the the modified modified pixel pixel structure structure now now behaves behaves linearly linearly at at low low light light intensity intensity butbut changes changes logarithmically logarithmically at at high high light light intensity. intensity. With With the the proper proper setting setting of VofREF VREF, the, theV GVGvalue value does does not exceed VDD and can always make the SF transistor functional. This natural compression of the Micromachines 2020, 11, x 8 of 17

Micromachinesnot exceed2020 VDD, 11 and, 596 can always make the SF transistor functional. This natural compression8 of of 16the signal allows the dynamic range of incident light intensity to be extremely wide, which makes the single-shot detection of high-contrast images possible. There is no need to take multiple shots of an signal allows the dynamic range of incident light intensity to be extremely wide, which makes the HDR image at different exposure levels and then blend these images together for a composite image. single-shot detection of high-contrast images possible. There is no need to take multiple shots of an Furthermore, if the original P–N junction PD is replaced with a graphene/n-type poly-Si junction PD HDR image at different exposure levels and then blend these images together for a composite image. that is directly fabricated on top of the gate oxide of the SF transistor, the parasitic capacitance Cp can Furthermore, if the original P–N junction PD is replaced with a graphene/n-type poly-Si junction PD be eliminated and the tradeoff between pixel size and fill factor can be removed. That is, one can that is directly fabricated on top of the gate oxide of the SF transistor, the parasitic capacitance Cp can be combine the PD and the SF transistor into a new integrated device, namely, the PD–oxide– eliminated and the tradeoff between pixel size and fill factor can be removed. That is, one can combine semiconductor field effect transistor (PDOSFET), to maximize pixel performance. In this way, since the PD and the SF transistor into a new integrated device, namely, the PD–oxide–semiconductor field the PD is directly stacked on the gate of the SF transistor, metallic interconnect is not needed and Cp effect transistor (PDOSFET), to maximize pixel performance. In this way, since the PD is directly stacked is completely eliminated. In addition, because the stacking makes the area of the PD the same as the on the gate of the SF transistor, metallic interconnect is not needed and Cp is completely eliminated. gate area of the SF transistor, the photovoltage of the PD is independent of the area and there is no In addition, because the stacking makes the area of the PD the same as the gate area of the SF transistor, more area-competing issue between the PD and the MOSFET. Poly-Si/graphene PD offers unique the photovoltage of the PD is independent of the area and there is no more area-competing issue advantages for this integration. The n-type poly-Si gate is an essential element in most CMOS between the PD and the MOSFET. Poly-Si/graphene PD offers unique advantages for this integration. technologies. All one needs to do is to apply a graphene film to the gate area to form the PD. The n-type poly-Si gate is an essential element in most CMOS technologies. All one needs to do is to Additionally, the graphene film has good thermal stability and can withstand the thermal cycles in apply a graphene film to the gate area to form the PD. Additionally, the graphene film has good thermal subsequent fabrication processes. Therefore, one can apply it either before or after the poly-Si stability and can withstand the thermal cycles in subsequent fabrication processes. Therefore, one can deposition process, which allows flexibility in designing the polarity of the PD. If graphene is placed apply it either before or after the poly-Si deposition process, which allows flexibility in designing the above poly-Si, its transparency allows light to pass through and reach the poly-Si for optical polarity of the PD. If graphene is placed above poly-Si, its transparency allows light to pass through and absorption. Metal/poly-Si Schottky PD cannot provide these advantages. reach the poly-Si for optical absorption. Metal/poly-Si Schottky PD cannot provide these advantages.

Figure 7. Proposed 3T pixel structure in a CMOS image sensor. Figure 7. Proposed 3T pixel structure in a CMOS image sensor. To verify the PDOSFET concept, a test device as schematically illustrated in Figure8 was fabricated. The channelTo verify length the wasPDOSFET set to beconcept, long (6 a µtestm), device and the as channel schematically width wasillustrated designed in toFigure be 12 8µ wasm. Thefabricated. gate oxide The was channel grown length by thermal was set oxidation to be long after (6 μ them), formation and the channel of a P-well. width It was was designed chosen to to be be thick12 μ (20m. The nm) gate to reduce oxide leakagewas grown currents by thermal in order oxidation to assure after that the photovoltageformation of a developed P-well. It was by the chosen PD wouldto be notthick be (20 degraded. nm) to reduce A single-layer graphenecurrents in was order transferred to assure onto that the the gate photovoltage oxide before developed depositing by thethe 300 PD nm-thick would not n-type be degraded. poly-Si gate. A single-layer graphene was transferred onto the gate oxide before depositing the 300 nm-thick n-type poly-Si gate.

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Figure 8. SchematicSchematic illustration illustration of of a a graphene graphene photodiode photodiode–oxide–semiconductor–oxide–semiconductor field field effect effect transistor (PDOSFET) testtest device. Poly-Si gate thickness: 300 nm; gate oxide thickness: 20 nm; gate length: 6 6 μµm.

Figure9 9 shows shows the the process process of of transferring transferring the the single-layer single-layer graphene graphene from from copper copper foil ontofoil onto the gate the gateoxide. oxide. After After the graphene the graphene was synthesized was synthesized on the copper on the foil, copper it was firstfoil, supportedit was first and supported protected byand a protectedcoated poly(bisphenol by a coated poly(bisphenol A carbonate) (PC) A carbonate) layer, and (PC) the redundant layer, andgraphene the redundant on the graphene back side on of the backcopper side foil of was the etchedcopper awayfoil was by usingetched reactive away by usin etchingg reactive (RIE) ion with etching (RIE) plasma. with Then,oxygen the plasma. copper Then,foil was the removed copper foil in an was aqueous removed solution in an ofaqueous HCl and solution H2O2. of After HCl rinsing and H in2O de-ionized2. After rinsing (DI) in water, de- ionizedthe graphene (DI) water, was placed the graphene onto the was Si wafer placed with onto gate the oxide Si wafer already with grown gate oxide on it, andalready the PCgrown layer on was it, andsubsequently the PC layer removed was subsequently with chloroform. removed The with graphene chloroform. was then The patterned graphene by was lithography then patterned and RIE by lithographyaccording to and the designedRIE according gate pattern, to the followed designed by ga normalte pattern, poly-Si followed gate deposition, by normal lithography, poly-Si gate and deposition,self-aligned lithography, CMOS processes and self-aligned in which the CMOS source proc andesses drain in which was the implementedsource and drain by using doping arsenic was 13 2 implemented(As) by using with arsenic an energy (As) of ion 30 KeVimplantation and a dose with of 8 an10 energycm− .of Because 30 KeV front and illumination a dose of × 8 is adopted 10 cm for the. PDOSFETBecause front to detect illumination light, the is gate adopted contact fo metalr the wasPDOSFET intentionally to detect designed light, the to cover gate contactonly a very metal small was portion intentionally of the gate designed area so to that cover light only could a very reach small the graphene portion of/n-type the gate poly-Si area junction so that lightPD. However,could reach both the the graphene/n-type drain and source poly-Si regions junction werefully PD. coveredHowever, by both a metal the layerdrain soand that source their regionsparasitic were P–N fully junction covered by woulda metal not layer intervene so that duringtheir parasitic illumination. P–N junction The ohmic diodes contact would to not the intervenepoly-Si gate during was formedillumination. by sequentially The ohmic depositing contact to Ti the and poly-Si Au films. gate Therefore, was formed the by MSM sequentially structure depositingobserved in Ti the and samples Au films. shown Therefore, in Section the MSM2 did st notructure appear observed in the in PDOSFET. the samples The shown graphene in Section film 2sustained did not appear the subsequent in the PDOSFET. processes. The The graphene poly-Si of fi onelm sustained sample was the removed subsequent to expose processes. the underlying The poly- Sigraphene of one forsample Raman was spectroscopic removed to characterization. expose the underlying The same graphene spectrum for as Raman that in spectroscopic Figure2 was characterization.observed. The single-layer The same spectrum graphene as held that its in structure Figure 2 well.was observed. The single-layer graphene held its structureThe resultant well. PDOSFET looks just like a normal n-channel MOSFET (NMOSFET) except that a grapheneThe resultant layer isPDOSFET inserted looks between just the like n-type a normal poly-Si n-channel gate and MOSFET the gate (NMOSFET) oxide. That except is, a that PD isa grapheneembedded layer right is in inserted the gate structurebetween the with n-type minimal poly process-Si gate modification. and the gate The oxide. device That should is, a be PD able is embeddedto exhibit theright normal in the darkgate structure electrical with characteristics minimal pr ofocess an NMOSFET. modification. To The verify device this, should the Id- Vbeg ableand toId- exhibitVd characteristics the normal of dark the fabricatedelectrical characte PDOSFETristics in the of an dark NMOSFET. were measured To verify by usingthis, the an I Agilentd-Vg and 4156a Id-Vd characteristicssemiconductor of parameter the fabricated analyzer. PDOSFET Figure 10 in shows the dark the measuredwere measuredId–Vg curve by using of the an PDOSFET Agilent under4156a semiconductor3.3 V drain-to-source parameter voltage analyzer. (Vds). NormalFigure 10 turn-on shows behavior the measured was observed. Id–Vg curve The of thresholdthe PDOSFET voltage under for 3.3the V channel drain-to-source to turn on voltage is between (Vds). 1 Normal V and 1.5 turn-on V. By using behavior the ATLAS was observed. device simulator The threshold from Silvaco,voltage thefor thethreshold channel voltage to turn of on a MOSFET,is between the 1 V same and as1.5 that V. By for using the PDOSFET the ATLAS shown device in Figuresimulator8 but from without Silvaco, the theembedded threshold graphene voltage layer, of a MOSFET, was calculated the same to be as about that for 0.7 V.the This PDOSFET MOSFET shown control in deviceFigure was8 but fabricated without theand embedded measured, graphene and it showed layer, a was threshold calculated voltage to ofbe aboutabout 0.850.7 V. TheThis larger MOSFET threshold control voltage device of was the fabricatedPDOSFET mayand measured, be due to the and existence it showed of a a depletion threshold region voltage in theof about poly-Si 0.85 side V. of The the graphenelarger threshold/poly-Si voltagediode. It of may the absorbPDOSFET part may of the be applied due to gatethe existence voltage (V ofg) a so depletion that the controlregion ofin thethe surfacepoly-Si potentialside of the at graphene/poly-Sithe channel surface diode. by Vg Itbecomes may absorb less epartffective. of the Figure applied 11 shows gate voltage the measured (Vg) so Ithatd–V dthecharacteristics control of the of surfacethe PDOSFET potential under at the various channel gate surface bias voltages. by Vg becomes Normal less linear effective. and saturation Figure 11 behaviors shows the can measured be clearly Id–Vd characteristics of the PDOSFET under various gate bias voltages. Normal linear and saturation behaviors can be clearly recognized. The channel length of the fabricated PDOSFET is quite long;

Micromachines 2020, 11, x 10 of 17 Micromachines 2020, 11, 596 10 of 16 therefore, the short channel effect is hardly seen in Figure 11. From Figures 10 and 11, it can be Micromachines 2020, 11, x 10 of 17 confirmed that the insertion of a graphene layer into the gate of a MOSFET does not destroy the recognized. The channel length of the fabricated PDOSFET is quite long; therefore, the short channel propertiestherefore, of the the transistor. short channel effect is hardly seen in Figure 11. From Figures 10 and 11, it can be effect is hardly seen in Figure 11. From Figures 10 and 11, it can be confirmed that the insertion of a confirmed that the insertion of a graphene layer into the gate of a MOSFET does not destroy the grapheneproperties layer of into the thetransistor. gate of a MOSFET does not destroy the properties of the transistor.

FigureFigureFigure 9. 9. SchematicSchematic 9. Schematic illustration illustration illustration of of of the thethe graphene graphene tr transferansfer process process process in in fabricating in fabricating fabricating a PDOSFET. a a PDOSFET. PDOSFET.

Figure 10. Measured dark turn-on characteristic (Id–Vg curve) of the PDOSFET; Vds = 3.3 V.

Figure 10. Measured dark turn-on characteristic (Id––Vgg curve)curve) of of the the PDOSFET; PDOSFET; VVdsds == 3.33.3 V. V.

Micromachines 2020, 11, 596 11 of 16 Micromachines 2020, 11, x 11 of 17

Figure 11. Measured dark Id–Vd curve of the PDOSFET under various gate bias voltages. Figure 11. Measured dark Id–Vd curve of the PDOSFET under various gate bias voltages. When the PDOSFET is illuminated with light, the photovoltage developed at the PD should be ableWhen to effectively the PDOSFET increase is the illuminated gate voltage with of thelight, FET th ande photovoltage thus increase developed the channel at current.the PD should Therefore, be ablewhen to the effectively PDOSFET increase is connected the gate in a sourcevoltage follower of the configuration,FET and thusthe increase output the voltage channel of the current. source Therefore,follower should when the faithfully PDOSFET reflect is connected the logarithmic in a source behavior follower of the configuration, photovoltage the of theoutput PD. voltage Figure 12of theshows source the follower measurement should result faithfully for such reflect a source the lo followergarithmic when behavior the PDOSFET of the photovoltage was illuminated of the byPD. a Figurehalogen 12 lamp. shows The the source measurement follower connection result for is su illustratedch a source in the follower inset of when Figure the12. ItPDOSFET is clearly seenwas illuminated by a halogen lamp. The source follower connection is illustrated in the inset of Figure 12. that the source follower output voltage (Vout) shows a logarithmic dependence on illuminance. This Itindicates is clearly that seen both that the the graphene source /followern-type poly-Si output junction voltage PD (Vout and) shows the FET a logarithmic integrated independence the PDOSFET on illuminance. This indicates that both the graphene/n-type poly-Si junction PD and the FET integrated functioned well. Under low illuminance, Vout changes linearly with light intensity to provide good in the PDOSFET functioned well. Under low illuminance, Vout changes linearly with light intensity to resolution. At high illuminance, Vout is compressed to prevent saturation. The feasibility of using providea single good PDOSFET resolution. in a pixelAt high to replaceilluminance, the P–N Vout is junction compressed PD and to prevent the SF transistorsaturation. is The thus feasibility verified. ofIt shouldusing a be single mentioned PDOSFET that in the a modificationpixel to replace from th thee P–N conventional junction PD 3T and pixel the structure SF transistor to the newis thus 3T verified.pixel structure It should with be the mentioned PDOSFET th isat very the modification slight and that from the responsivitythe conventional of the 3T graphene pixel structure/poly-Si to PD the is new 3T pixel structure with the PDOSFET is very slight and that the responsivity of the mainlyMicromachines determined 2020, 11, x by poly-Si, not by graphene. Therefore, except for the optical input dynamic12 range, of 17 graphene/poly-Simost other performance PD is parametersmainly determined such as theby quantumpoly-Si, not effi ciency,by graphene. conversion Therefore, , , except and for image the opticallag of the input new dynamic pixel should range, be most similar other to those performance of the conventional parameters pixel. such as the , conversion gain, noise, and image lag of the new pixel should be similar to those of the conventional pixel.

Figure 12. Measured PDOSFET source follower output voltage under various illuminance values. Figure 12. Measured PDOSFET source follower output voltage under various illuminance values.

Although the thickness of the poly-Si gate was designed to be 300 nm to absorb most of the visible light, it cannot be ruled out that some long light may still travel through the gate and reach the c-Si region under the gate oxide. These photons may still generate electron–hole pairs and contribute to the increase in the drain current. However, if this influence exists and dominates, the magnitude of the drain current increase should be linearly proportional to the increasing illuminance. Besides, the photo-generated drain current of the MOSFET control device (without PD at the gate) under 49,000 Lux illumination was measured to be only 0.1 μA even at VDS = 5 V. Therefore, the observed logarithmic dependence of Vout (thus, the channel current) on illuminance is certainly not due to (at least not dominated by) the optical absorption in the c-Si substrate. Instead, the graphene/n-type poly-Si PD on top of the gate dominates the optoelectronic behavior of the PDOSFET source follower. In addition, it was mentioned above that the source and drain areas of the PDOSFET were covered by metal in order to prevent the source and drain junctions from detecting light and contributing extra photocurrent. The effectiveness of this arrangement was investigated by measuring the dark and light drain currents when the gate voltage was set low to disable the channel. No change in the terminal current magnitude was observed with and without illumination. This confirms that the metal coverage on the source and drain regions effectively blocked the incident light. For most applications, it is desirable for the intrinsic operation speed of the phototransistor to be fast. Therefore, the transient response of the PDOSFET source follower was also investigated in this work. A white light-emitting diode (LED) was switched on/off by a voltage to produce 5000 Lux light pulses onto the PDOSFET. The transient behavior of the source follower output voltage (Vout) was observed. For the fabricated large, long-channel PDOSFET, both the rise time and the fall time of Vout were as short as 22 μs when the loading resistance was 100 kΩ, as shown in Figure 13. When the loading resistance was increased to 1.2 MΩ, the rise time and the fall time only increased to 56 μs and 174 μs, respectively. This fast speed is beneficial to many applications.

Micromachines 2020, 11, 596 12 of 16

Although the thickness of the poly-Si gate was designed to be 300 nm to absorb most of the visible light, it cannot be ruled out that some long wavelength light may still travel through the gate and reach the c-Si region under the gate oxide. These photons may still generate electron–hole pairs and contribute to the increase in the drain current. However, if this influence exists and dominates, the magnitude of the drain current increase should be linearly proportional to the increasing illuminance. Besides, the photo-generated drain current of the MOSFET control device (without PD at the gate) under 49,000 Lux illumination was measured to be only 0.1 µA even at VDS = 5 V. Therefore, the observed logarithmic dependence of Vout (thus, the channel current) on illuminance is certainly not due to (at least not dominated by) the optical absorption in the c-Si substrate. Instead, the graphene/n-type poly-Si PD on top of the gate dominates the optoelectronic behavior of the PDOSFET source follower. In addition, it was mentioned above that the source and drain areas of the PDOSFET were covered by metal in order to prevent the source and drain junctions from detecting light and contributing extra photocurrent. The effectiveness of this arrangement was investigated by measuring the dark and light drain currents when the gate voltage was set low to disable the channel. No change in the terminal current magnitude was observed with and without illumination. This confirms that the metal coverage on the source and drain regions effectively blocked the incident light. For most applications, it is desirable for the intrinsic operation speed of the phototransistor to be fast. Therefore, the transient response of the PDOSFET source follower was also investigated in this work. A white light-emitting diode (LED) was switched on/off by a voltage square wave to produce 5000 Lux light pulses onto the PDOSFET. The transient behavior of the source follower output voltage (Vout) was observed. For the fabricated large, long-channel PDOSFET, both the rise time and the fall time of Vout were as short as 22 µs when the loading resistance was 100 kΩ, as shown in Figure 13. When the loading resistance was increased to 1.2 MΩ, the rise time and the fall time only increased to

56 µsMicromachines and 174 µ s,2020 respectively., 11, x This fast speed is beneficial to many applications. 13 of 17

Figure 13. V FigureMeasured 13. Measured transient transient behavior behavior of of the the outputoutput voltage (V ( outout) of) ofthe the PDOSFET PDOSFET source source follower follower with awith loading a loading resistance resistance of 100of 100 kΩ k.Ω.

OneOne process process issue issue about about employing employing the proposed proposed PDOSFET PDOSFET in mass in mass production production is the use isthe of use of graphenegraphene in in the the front-end front-end ofof standard,standard, commercia commerciall CMOS CMOS processes. processes. In such In such mass mass production production processes,processes, it is impossibleit is impossible to depositto deposit the the graphene graphene layer by by using using slow slow techniques techniques such such as the as transfer the transfer method.method. The The direct direct wafer-level wafer-level synthesis synthesis/depositio/depositionn of graphene graphene is isneeded. needed. Besides, Besides, possible possible carbon carbon contaminationcontamination of the of the devices devices on on the the chip, chip,due due toto thethe gases gases used used in in the the graphene graphene deposition deposition process, process, must be avoided. Otherwise, graphene will not be usable in the front end of CMOS processes and it must be avoided. Otherwise, graphene will not be usable in the front end of CMOS processes and will be impossible to fabricate the PDOSFET. Although the new pixel structure shown in Figure 7 can it will be impossible to fabricate the PDOSFET. Although the new pixel structure shown in Figure7 still be implemented by using separate P–N junction diode and source follower MOSFET instead of can stillusing be the implemented PDOSFET, it byis certain using that separate the signal P–N amplitude junction will diode be smaller and source and that follower the operation MOSFET speed instead of usingof the the pixel PDOSFET, will be slower it is certain because that more the parasiti signalc amplitudecapacitance willemerges, be smaller and the and conventional that the operation area speedcompeting of the pixel problem will be between slower the because PD and more transist parasiticors will capacitance remain. Thus, emerges, the PDOSFET and the conventionalholds an area competingimportant position problem in efficient between HDR the image PD and detection. transistors It is best will for remain. relevant Thus, front-end the PDOSFET processes to holds be an developed as soon as possible to facilitate the deployment of the PDOSFET. As a remark, one possible way to implement the pixel structure shown in Figure 7 without using the PDOSFET to resolve the fill factor issue of the pixel is to use graphene/amorphous-silicon (Gr/a- Si) junctions as the PDs and fabricate these graphene/amorphous-silicon junctions during or after the back-end processes. In this way, although graphene is used, one can avoid producing contamination in front-end processes. The low-temperature process of depositing a-Si films also has minimal impact on the underlying CMOS devices. Since the graphene/amorphous-silicon PD and the transistors in the pixel do not locate in the same plane, they do not need to compete for chip area anymore. To demonstrate this alternative idea, we have designed and fabricated a Gr/n-type a-Si PD located above a Si NMOSFET, as shown in Figure 14. The graphene terminal of the Gr/n-type a-Si photodiode was connected to the poly-Si gate of the NMOSFET through a metal via. There is much more freedom for designing the area of the PD. In our samples, the a-Si was first deposited by using a hot chemical vapor deposition (HWCVD) system without doping. Its film thickness was about 150 nm. Then, phosphorus ion implantation was performed at 110 KeV of energy and a 1 10 cm−2 dose to make it n-type. At the ohmic contact area, heavy doping was achieved by an additional ion implantation with 10 KeV of energy and a 2 10 cm−2 dose. The area of the PD was designed to be 29.5 66 μm, much larger than the gate area (6 12 μm) of the NMOSFET, to enhance the of photovoltage to the gate of the NMOSFET. Figure 15 shows that the source follower circuit based on the sample in Figure 14 functioned very well. The logarithmic characteristic of the photovoltage was successfully revealed at the output node. Compared with the source follower circuit based on the PDOSFET as shown in Figure 12, the range of the output voltage span of this source follower circuit is smaller. This is not surprising, since metallic interconnect introduced more parasitic capacitance, which reduced the photovoltage magnitude. It may be possible to compensate this photovoltage reduction by enlarging the PD area so that its junction capacitance can dominate.

Micromachines 2020, 11, 596 13 of 16 important position in efficient HDR image detection. It is best for relevant front-end processes to be developed as soon as possible to facilitate the deployment of the PDOSFET. As a remark, one possible way to implement the pixel structure shown in Figure7 without using the PDOSFET to resolve the fill factor issue of the pixel is to use graphene/amorphous-silicon (Gr/a-Si) junctions as the PDs and fabricate these graphene/amorphous-silicon junctions during or after the back-end processes. In this way, although graphene is used, one can avoid producing contamination in front-end processes. The low-temperature process of depositing a-Si films also has minimal impact on the underlying CMOS devices. Since the graphene/amorphous-silicon PD and the transistors in the pixel do not locate in the same plane, they do not need to compete for chip area anymore. To demonstrate this alternative idea, we have designed and fabricated a Gr/n-type a-Si PD located above a Si NMOSFET, as shown in Figure 14. The graphene terminal of the Gr/n-type a-Si photodiode was connected to the poly-Si gate of the NMOSFET through a metal via. There is much more freedom for designing the area of the PD. In our samples, the a-Si was first deposited by using a hot wire chemical vapor deposition (HWCVD) system without doping. Its film thickness was about 150 nm. Then, phosphorus ion implantation was performed at 110 KeV of energy and a 1 1012 cm 2 × − dose to make it n-type. At the ohmic contact area, heavy doping was achieved by an additional ion implantation with 10 KeV of energy and a 2 1015 cm 2 dose. The area of the PD was designed to be × − 29.5 66 µm2, much larger than the gate area (6 12 µm2) of the NMOSFET, to enhance the coupling × × of photovoltage to the gate of the NMOSFET. Figure 15 shows that the source follower circuit based on the sample in Figure 14 functioned very well. The logarithmic characteristic of the photovoltage was successfully revealed at the output node. Compared with the source follower circuit based on the PDOSFET as shown in Figure 12, the range of the output voltage span of this source follower circuit is smaller. This is not surprising, since metallic interconnect introduced more parasitic capacitance, which reduced the photovoltage magnitude. It may be possible to compensate this photovoltage reduction byMicromachines enlarging the 2020 PD, 11, areax so that its junction capacitance can dominate. 14 of 17

Figure 14. Schematic illustration of the Gr/a-Si PD and n-channel MOSFET (NMOSFET) connected Figure 14. Schematic illustration of the Gr/a-Si PD and n-channel MOSFET (NMOSFET) connected structure. The PD is located above the NMOSFET, and the area of the PD is larger than that of structure. The PD is located above the NMOSFET, and the area of the PD is larger than that of the the NMOSFET. NMOSFET.

Figure 15. Measured Gr/a-Si PD and NMOSFET source follower output voltage under various illuminance.

4. Conclusions A graphene/n-type poly-Si junction PD was fabricated and characterized in this work. The dark I–V curve of the junction was found to be exponential, and the junction responded to light, with its

Micromachines 2020, 11, x 14 of 17

Figure 14. Schematic illustration of the Gr/a-Si PD and n-channel MOSFET (NMOSFET) connected structure. The PD is located above the NMOSFET, and the area of the PD is larger than that of the NMOSFET.

Micromachines 2020, 11, 596 14 of 16

Figure 15. Measured Gr/a-Si PD and NMOSFET source follower output voltage under various illuminance. Figure 15. Measured Gr/a-Si PD and NMOSFET source follower output voltage under various 4. Conclusionsilluminance. A graphene/n-type poly-Si junction PD was fabricated and characterized in this work. The dark 4. Conclusions I–V curve of the junction was found to be exponential, and the junction responded to light, with its photovoltageA graphene/n-type being a poly-Si logarithmic junction function PD was of fabric illuminance.ated and characterized A new phototransistor in this work. called The dark the PDOSFET,I–V curve inofwhich the junction the graphene was found/n-type to poly-Sibe exponentia junctionl, PDand was the directly junction integrated responded with to anlight, n-channel with its MOSFET, was proposed, fabricated, and functionally verified. The channel current of the PDOSFET was efficiently modulated by the photovoltage of the PD and thus responded to light intensity logarithmically. The proposed PDOSFET shows great potential for CMOS image sensor applications, especially for detecting HDR images.

Author Contributions: Conceptualization, K.Y.J.H.; methodology, K.Y.J.H. and P.-W.C.; validation, K.Y.J.H., Y.-Y.T., C.-Y.K., and B.-C.L.; formal analysis, K.Y.J.H., Y.-Y.T., C.-Y.K., and B.-C.L.; investigation, Y.-Y.T., C.-Y.K., and B.-C.L.; resources, K.Y.J.H. and P.-W.C.; data curation, K.Y.J.H.; writing—original draft preparation, K.Y.J.H.; writing—review and editing, K.Y.J.H.; visualization, K.Y.J.H., Y.-Y.T., C.-Y.K., and B.-C.L.; supervision, K.Y.J.H. and P.-W.C.; project administration, K.Y.J.H.; funding acquisition, K.Y.J.H. and P.-W.C. All authors have read and agreed to the published version of the manuscript. Funding: This research was funded by the Ministry of Science and Technology, Taiwan, R.O.C. under grant numbers MOST 103-2119-M-007-008 -MY3 and MOST 105-2221-E-007-109 -. Conflicts of Interest: The authors declare no conflict of interest.

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