Common Base / Common Gate Amplifiers

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■ Input signal is applied to the emitter, output is taken from the collector

■ Summary: current gain is about unity, input resistance is low, output resistance is high a CB stage is a good current “buffer” ... it takes a current at the input that may have a relatively small Norton resistance and replicates it at the output port, which is a good current source due to the high output resistance.

V+ V+

i SUP ISUP

iOUT IOUT

R is S IBIAS IBIAS

V− V− (a) (b)

Biasing is very easy ... IBIAS = - ISUP, with a small correction factor due to the β fact that F isn’t infinity

EECS 105 Fall 1998 Lecture 22 Common-Base Current Gain Ai

■ Small-signal circuit, with output shorted (according to the procedure)

ib iout

+ = β vπ rπ gmvπ oib r − o

ve roc

i ≈ β out Analysis: iout = ic oib and ic ===– ie – ib – it – ib – it – ------β - o

Solving for the short-circuit current gain:

i –β out o ≅ Ai = ------=1------β - – it 1 + o

EECS 105 Fall 1998 Lecture 22 Common-Base Input Resistance Rin

■ Apply test current, with load resistor RL present at the output

+ vπ rπ gmvπ r − o

roc RL +

vt i − t

The transconductance generator dominates the sum of the currents at the input -1 -1 node since gm >> ro and gm >> rπ and

≈ 1 Rin ------gm

EECS 105 Fall 1998 Lecture 22 Common-Base Output Resistance Rout

■ Test circuit: leave source resistance of input current in place; remove roc for analysis and place it in parallel ...

g v m π ro

+ vt it r − oc − vπ rπ RS +

■ Complicated analysis (see Section 8.8), with the final result boiling down to:

≈ []( ()) Rout roc ro 1 + gm rπ RS

If the RS is much greater than rπ, then the output resistance is approximately: ≈ []β Rout roc ro

EECS 105 Fall 1998 Lecture 22 Common-Base Two-Port Model

■ Note that the output resistance depends on the source resistance -- which means that the CB current buffer is not unilateral and the two-port formal model is not strictly valid. However, the error in using the model is small (see Appendix A8.1).

iin iout

1 −   iin roc ro[1 + gm(rπ RS)] gm

■ Controlled source can be flipped to make current gain + 1.

EECS 105 Fall 1998 Lecture 22 Common-Gate Amplifier

■ Circuit configuration: analogous to common-base

+ V + V

iSUP ISUP I iOUT OUT

V − V −

i RS I s BIAS IBIAS

− V − V (a) (b)

The backgate can be tied to the source if the device is in a well. It is obvious that the current gain for this amplifier must be unity, since the gate current for a MOSFET is zero

EECS 105 Fall 1998 Lecture 22 Common-Gate Two-Port Model

■ The resulting two port model is:

iin iout

1 −  iin roc (ro + gmroRS) gm + gmb

The input resistance is the same as for the CB for the case where source and backgate are shorted. When this isn’t the case, the backgate generator is added in:

1 1 Rin =or------Rin = ------gm gm + gmb

■ The output resistance is similar to the CB result with rπ --> infinity

[] Rout = roc ro 1 + gmRS

EECS 105 Fall 1998 Lecture 22 Common-Collector Amplifier

■ Circuit configuration

V + V +

+ vs + − + + VBIAS − + VOUT V vOUT BIAS RL I − − iSUP SUP −

V − V − (a) (b)

■ Biasing: if transistor is “on” (i.e., not cutoff), then

VBIAS - VOUT = 0.7 V

EECS 105 Fall 1998 Lecture 22 Common-Collector as a Small-Signal Amplifier

■ Linear relationship between output voltage and total input voltage indicates that the CC amplifier is a voltage buffer -- the voltage gain is about equal to 1.

■ Small-signal model and procedure for finding Av for two-port model:

+ g v vπ rπ m π ro + v − t − + r oc vout −

■ Circuit analysis: current through roc || ro is vπ / rπ + gm rπ --> v – v v t out ()out ------+ gm vt – vout = ------rπ roc ro β multiplying by rπ and recognizing that gm rπ = o, v r β ()()β ()out π vt – vout +1o vt – vout ==+ o vt – vout ------roc ro

solving for the open-circuit voltage gain:

1 ≈ Av = ------1 rπ 1 + ------()β - roc ro o + 1

EECS 105 Fall 1998 Lecture 22 Common-Collector Input Resistance Rin

■ Procedure: apply pure test source, leave load resistor RL in -- very important for CC amplifier

β i + rπ o b

it vt −

 ro roc RL

β note that current through roc || ro ||RL is it + o it -->

()β () Rin = rπ + o + 1 roc ro RL

■ When the load resistor is much smaller than the output resistance of the transistor and the current source resistance, then the input resistance of the CC β amplifier is approximately Rin = rπ + ( o + 1)RL

EECS 105 Fall 1998 Lecture 22 Common Collector Output Resistance

■ Apply test current source at the output, leaving any source resistance RS attached at the input.

vπ rπ gmvπ −

it  ro roc + v t −

KCL at the common node + algebra -->

1 RS Rout = ------+ -----β - gm o

EECS 105 Fall 1998 Lecture 22 Common Collector Two-Port Model

■ Final result: pretty good voltage buffer:

/ + /β 1 gm RS o

+ + + v r + β (r  r  R ) v v in π o o oc S − in out − −

Note: this model is approximate and can give erroneous results for extremely low values of RL. However, it is very convenient for hand analysis.

EECS 105 Fall 1998 Lecture 22