Lect. 11: Differential Amplifiers
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Differential Amplifier
If vG1 = vG2, vo = vD1-vD2 = 0
If vG1 > vG2, vo < 0
If vG1 < vG2, vo > 0
Non-zero output only for input difference Î Differential amplifier
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Consider Common-Mode and Differential-Mode separately. vv vV=+id, vV =− id GCMGCM1122 vv+ Vvvv==−GG12, CM2 id G12 G
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Common-Mode: vG1= vG2 = vCM
υ DD12−υ = 0 (No CM output)
vCM, max?
vvVDS≥− GS t I ()()VRvvvV− −−≥− DD2 D CM GS GS t I VRVv−+≥ DD2 D t CM I ∴υ =+VV − R CM,max t DD2 D
vCM, min? Î Input common-mode range
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Differential-mode small-signal analysis (assume vid < VCM)
vv No voltage change vvv=−=− gRgRid − id = − gRv od o12 o mD22 mD mDid since left and right are anti-symmetric vod AgRdmD==− vid
With ro , AdmDo=−g (Rr|| ) Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Differential-mode small-signal half-circuit Î Consider only half circuit
vo1 =−gRmDo(||) r vid /2 v v = od o1 2
vod ∴ =−gRmDo(||) r vid
Differential pair acts as CS amplifier for input difference!
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Why a differential amplifier?
- Input stage for operational amplifier (Op-Amp)
- Not sensitive to noises that are common to both input signals.
Common-Mode Rejection Ratio
CMRR = |Ad/Acm|
Ideally, infinite
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
What if the current source is NOT ideal?
Common-mode
open circuit (Left and Right are symmetric)
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Common-Source with source resistance Common-mode half circuit
vo1 = ? vomgsD1 = -g vR vicm
vvgsicmmgsSS= − g vR(2 )
vicm vgs = 12+ gmSSR
vgR RD omD1 =− − 2R vicm12+ g mR SS SS
Î common-mode gain due to Rss for single-ended output
Differential output ( vo = vo1 –vo2), vo= 0
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
What if the current source is NOT ideal? Differential-Mode
With anti-symmetric input, the mid-point is still small-signal ground!
AdmDo= −g (Rr|| ) vid/2 -vid/2
CMRR: Common-Mode Rejection Ratio (Single-ended output) AgRr(||) CMRR= dmDo R Acm D
2Rss CMRR for differential output?
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
MOS differential pair is based on the symmetry
Anything that breaks the symmetry affects the circuit performance (CMRR, input offset)
Device mismatches cause non-ideal performance ÎEliminate RD
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Active-loaded MOS differential pair (single-ended)
vicm vicm
Common mode
It can be shown with finite Rss ,
vo 1 Acm =− vgRicm2 m ss due to non-ideal current source.
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
Differential mode small-signal analysis
vo =−grmo(||) r o −vid /2 vgr ∴ omo= vid 4
But with more detailed analysis, vgr A ==omo Assume it is (almost) symmetric d vid 2 Î Source terminals are grounded What is wrong with the half-circuit analysis? Half circuit analysis is possible
Electronic Circuits 2 (07/1) W.-Y. Choi Lect. 11: Differential Amplifiers
The current mirror action is not considered!
Current mirror doubles the transconductance
Î Twice voltage gain!
vo 1 ∴ Admo==gr vid 2
1 gr A mo ∴CMRR==d 2 g2 r R 1 moss Acm
2gRmss
Electronic Circuits 2 (07/1) W.-Y. Choi