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Mosfets As Current Sources 10/2/2018 Indian Institute of Technology Jodhpur, Year 2018 Analog Electronics (Course Code: EE314) Lecture 21‐22: MOSFETs Amplifiers Course Instructor: Shree Prakash Tiwari Email: [email protected] Webpage: http: //home.iitj.ac.in/ ~sptiwari/ Course related documents will be uploaded on http://home.iitj.ac.in/~sptiwari/EE314/ Note: The information provided in the slides are taken form text books for microelectronics (including Sedra & Smith, B. Razavi), and various other resources from internet, for teaching/academic use only 1 MOSFETs as Current Sources • A MOSFET behaves as a current source when it is operating in the saturation region. • An NMOSFET draws current from a point to ground ((sinks“sinks current”), whereas a PMOSFET draws current from VDD to a point (“sources current”). 1 10/2/2018 Common‐Source Stage: = 0 Amplifier circuit Small‐signal analysis circuit for determining voltage gain, Av Small‐signal analysis circuit for W determining output resistance, Rout A g R 2 C I R v m D n ox L D D Rin Rout RD Common‐Source Stage: 0 • Channel‐length modulation results in reduced small‐signal voltage gain and amplifier output resistance. Small‐signal analysis circuit Small‐signal analysis circuit for for determining voltage gain, Av determining output resistance, Rout Av gmRD || rO Rin Rout RD || rO 2 10/2/2018 CS Gain Variation with L • An ideal current source has infinite small‐signal resistance. The largest Av is achieved with a current source as the load. • Since is inversely proportional to L, Av increases with L. W 2nCox ID L 2nCoxWL Av gmro ID ID CS Stage with Current‐Source Load • Recall that a PMOSFET can be used as a current source from VDD. Use a PMOSFET as a load of an NMOSFET CS amplifier. Av gm1rO1 || rO2 Rout rO1 || rO2 3 10/2/2018 PMOS CS Stage with NMOS Load • An NMOSFET can be used as the load for a PMOSFET CS amplifier. Av g m2 (rO1 || rO2 ) Rout rO1 || rO2 CS Stage with Diode‐Connected Load Amplifier circuit Small‐signal analysis circuit including MOSFET output resistances 0: 1 If 0: A g ||r ||r v m1 g O2 O1 1 W/L m2 A g 1 v m1 g W/L 1 m2 2 Rout ||rO2 ||rO1 gm2 Av is lower, but it is less dependent on process parameters n and Cox and drain current (ID). 4 10/2/2018 CS Stage with Diode‐Connected PMOS Load 0: 1 Av gm2 || ro1 || ro2 gm1 1 Rout || ro1 || ro2 gm1 CS Stage with Degeneration Amplifier circuit Small‐signal analysis circuit for determining voltage gain, Av R If 0 : A D v 1 RS g m Find Av when is not 0 5 10/2/2018 Example • A diode‐connected device degenerates a CS stage. R A D v 1 1 g m1 g m 2 Rout of CS Stage with Degeneration • Degeneration boosts the output impedance: Small‐signal analysis circuit for determining output resistance, Rout Current flowing down through ro is iX gmv1 iX gm iX RS iX gmiX RS v1 iX RS rO iX gmiX RS iX RS vX vX rO 1 gm RS RS rO gmrO RS iX 6 10/2/2018 Output Impedance Examples 1 R g r r r Rout rO11 gm1 out m1 O1 O2 O1 gm2 CS Stage with Gate Resistance • For low signal frequencies, the gate conducts no current. Gate resistance does not affect the gain or I/O impedances. 7 10/2/2018 CS Core with Biasing R || R R R || R A 1 2 D A 1 2 g R v R R || R 1 v m D G 1 2 RG R1 || R2 RS gm Diode‐Connected MOSFETs Diode‐connected NMOSFET Diode‐connected PMOSFET 1 1 R X ro1 R Y ro 2 g m 1 g m 2 Small‐signal analysis circuit Small‐signal analysis circuit • Note that the small‐signal model of a PMOSFET is identical to that of an NMOSFET 8 10/2/2018 Summary of MOSFET Impedances • Looking into • Looking into • Looking into the the gate, the the drain, the source, the impedance is impedance is impedance is 1/gm ifiitinfinite (∞). ro if the gate in paralle l with ro if and source the gate and drain are (ac) are (ac) grounded. grounded. Common‐Gate Amplifier Stage • An increase in Vin decreases VGS and hence decreases ID. The voltage drop across RD decreases Vout increases The small‐signal voltage gain (Av) is positive. Av gmRD 9 10/2/2018 Operation in Saturation Region • For M1 to operate in saturation, Vout cannot fall below Vb‐VTH. Trade‐off between headroom and voltage gain. I/O Impedances of CG Stage ( = 0) Small‐signal analysis circuit for Small‐signal analysis circuit for determining input resistance, Rin determining output resistance, Rout 1 Rin Rout RD gm 10 10/2/2018 CG Stage with Source Resistance Small‐signal equivalent circuit seen at input 1 g v m v X 1 in RS gm For = 0: v v v 1 RD out out X g R A m D v 1 vin vX vin gm RS 1 RS g m CG Stage with Source Resistance • The output impedance of a CG stage with source resistance is identical to that of CS stage with degeneration. SllSmall‐silignal analilysis ciiircuit for determining output resistance, Rout Rout rO 1 gm RS RS 1 gmrO RS rO 11 10/2/2018 CG Stage with Biasing • R1 and R2 establish the gate bias voltage. • R3 provides a path for the bias current of M1 to flow. vout R3 ||1/ gm gmRD vin R3 ||1/ gmRG CG Stage with Gate Resistance • For low signal frequencies, the gate conducts no current. Gate resistance does not affect the gain or I/O impedances. 12 10/2/2018 CG Stage Example Small‐signal equivalent Small‐signal equivalent circuit seen at input circuit seen at output 1 1 1 R g r R r g g out1 m1 O1 S O1 m1 m2 1 gm2 vX vin vin 1 1 1 gm1 gm2 RS RS gm1 gm2 v v g R A out X m1 D 1 v Rout gm1rO1 || RS rO1 || RD vX vin 1gm1 gm2 RS gm2 Source Follower Stage v r ||R A out O L 1 v 1 vin rO ||RL gm Small‐signal analysis circuit for determining voltage gain, Av Equivalent circuit vout gmv1ro RL vin v1 vout gmvin vout ro RL 13 10/2/2018 Source Follower Example • In this example, M2 acts as a current source. r || r A O1 O 2 v 1 rO1 || rO 2 g m1 Rout of Source Follower • The output impedance of a source follower is relatively low, whereas the input impedance is infinite (at low frequencies); thus, it is useful as a voltage buffer. Small‐signal analysis circuit for determining output resistance, Rout 1 1 Rout || rO || RL || RL g m gm 14 10/2/2018 Source Follower with Biasing • RG sets the gate voltage to VDD; RS sets the drain current. (Solve the quadratic equation to obtain the value of ID.) Assuming = 0: 1 W 2 I C V I R V D 2 n ox L DD D S TH Supply‐Independent Biasing • If Rs is replaced by a current source, the drain current ID becomes independent of the supply voltage VDD. 15 10/2/2018 Review: MOSFET Amplifier Design • A MOSFET amplifier circuit should be designed to 1. ensure that the MOSFET operates in the saturation region, 2. allow the desired level of DC current to flow, and 3. couple to a small‐signal input source and to an output “load”. Proper “DC biasing” is required! (DC analysis using large‐signal MOSFET model) • Key amplifier parameters: (AC analysis using small‐signal MOSFET model) – Voltage gain Av vout/vin – Input resistance Rin resistance seen between the input node and ground (with output terminal floating) – Output resistance Rout resistance seen between the output node and ground (with input terminal grounded) MOSFET Models • The large‐signal model is used to determine the DC operating point (VGS, VDS, ID) of the MOSFET. • The small‐signal model is used to determine how the output responds to an input signal. 16 10/2/2018 Comparison of Amplifier Topologies Common Source Common Gate Source Follower • Large Av < 0 • Large Av > 0 • 0 < Av ≤ 1 ‐ degraded by RS ‐degraded by RS • Large Rin • Large Rin • Small Rin –determined by ‐ decreased by R biasing circuitry –determined by biasing S circuitry • Rout RD • Small Rout • R R ‐ decreased by RS out D • ro decreases Av & Rout • • r decreases A & R but impedance seen ro decreases Av & o v out looking into the drain but impedance seen Rout can be “boosted” by looking into the drain source degeneration can be “boosted” by source degeneration Common Source Stage 0 R || R R A 1 2 D v 1 RG R1 || R2 RS g m 0 Rin R1 || R2 Rout RD Rout RD rO gmrO RS 17 10/2/2018 Common Gate Stage 0 RS || 1/ gm Av gmRD RS || 1/ gm RG 1 Rin RS 0 gm Rout RD Rout RD rO gmrO RS Source Follower 0 0 R S rO || RS Av A 1 v 1 RS r || R g O S m gm R R in G Rin RG 1 1 R || R R || r || R out g S out o S m gm 18 10/2/2018 CS Stage Example 1 • M1 is the amplifying device; M2 and M3 serve as the load. Equivalent circuit for small‐signal analysis, showing resistances connected to the drain 1 Av gm1 || rO3 || rO2 || rO1 gm3 1 Rout || rO3 || rO2 || rO1 gm3 CS Stage Example 2 • M1 is the amplifying device; M3 serves as a source (degeneration) resistance; M2 serves as the load.
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