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Multiple PNP Current Sources; IC3 and IC4 Are Matched To

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Multiple PNP Current Sources; IC3 and IC4 Are Matched To VCC VDD R M2 E2 M3 M4 M5 Q2 Q3 Q1 Q4 M1 RB VEE Multiple PNP current sources; IC3 and Multiple P-channel sources: M1 is a IC4 are matched to IC1 (the control tran- long, narrow device that sets the current sistor) but IC2 is reduced by RE2 . The level. Usually M3, M4, and M5 have Q2 – RE2 combination is a Widlar cur- the same lengths but may differ in width rent source. to set different output current values. VCC VDD Current Mirror Current Mirror In Out In Out iM = iD1 iM = iC1 iC1 – iC2 iD1 iD1 – iD2 iC1 iD2 iC2 Q1 Q2 M1 M2 vIN1 vIN2 v IN1 vIN2 VEE VSS Concept of using a current mirror circuit Current mirror with N-channel MOSFET to allow subtraction of collector currents differential pair. at a simple node by KCL. VCC iOUT RBIAS Q1 iOUT Q2 iIN Q1 Q2 RE VEE VEE Widlar current source, for which The most basic current mirror with hi kT ⎛⎞IC1 FE IN I = ln . The collector cur- iOUT = and an output resistance C 2 ⎜⎟ h + 2 qREC⎝⎠I 2 FE rent of Q2 may be much lower than Q1 VVCE + A equal to rO2 = . with only a modest value for RE. IC VCC iIN i iIN i OUT OUT Q3 Q3 Q1 Q2 Q1 Q2 VEE VEE Current mirror using a common collector stage to balance input and output. Output Wilson current mirror –this has a much impedance is still rO2. The minimum higher output resistance from the output voltage is very low – VCESAT of cascoding effect of Q3. Q2. iIN iOUT Q3 Q4 iIN iOUT Q1 Q2 M1 M2 VEE VSS Wilson current mirror with an additional transistor, Q3, to equalize the collector- The primitive current mirror in MOS emitter voltages of the matched pair Q1- devices. Because MOSFETs usually Q2. have lower output resistances than BJTs, this circuit often causes lower gains than its BJT counterpart. iIN iOUT iIN iOUT M3 M4 V BIAS M4 M3 M1 M2 M1 M2 VSS VSS A Wilson current mirror in MOS devices with a fourth transistor, M3, to equalize A cascoded current mirror with M3 and the drain-source voltages of the matched M4 as the cascoding transistors. With pair M1 – M2. Because of the relatively careful selection of VBIAS this circuit can high value of VTH, this circuit, which have an output resistance that is much requires a minimum voltage drop of higher than the uncascoded version and still operate with input to V drops of 2(VTH +VOV ) across the left and SS only VVTH + OV . VTH + 2VOV on the right, may not be satis- factory for low voltage systems. VCC VDD Q3 Q4 M3 M4 (control) (control) iM = iD1 iM = iC1 iC1 – iC2 iD1 iD1 – iD2 iC1 iD2 iC2 Q1 Q2 M1 M2 vIN1 vIN2 v IN1 vIN2 VEE VSS Simplest bipolar current mirror within a Simplest CMOS MOSFET current mir- differential amplifier. Q3 is the control ror within a differential amplifier. M3 is transistor for the current source Q4. Be- the control transistor for the current cause Q3 is connected as a diode, it has a source M4. Because M3 has its drain low impedance to the power supply. Q4 and gate connected, it has a low imped- is open collector and so exhibits a rela- ance to the power supply ( ZM 33= 1/ gm ). tively high output impedance, that is, it M4 has an open drain and so exhibits a approximates a constant current source. relatively high output impedance, that is, it too approximates a constant current source. Constant Current Sources (Biasing) Complementary I sense Differential Pair Symmetry Resistor Inp uts Input Stage Output (2 – PNP transistors) Compensation Stage Capacitor Output Current Mirror Short Circuit -A (Diff to single-ended Protection conversion) Block Diagram of a Bipolar Operational Amplifier The tables show the quiescent conditions for the transistors in the bipolar operational am- plifier that I use in class. The assumptions about the devices are: Device Type VBE hFE = β VA VCESAT NPN 0.6 volts 100 150 volts 0.2 volts PNP 0.6 70 30 0.3 Quiescent Currents and Transistor Model Parameters Transistor IC IB re ro gm = IC/kt/q Q7 227 ua. 2.27 ua. 113 ohm 704 kohm 8790 usie. Q8 14.2 0.142 1.8 K 12.4 Meg. 549 usie. Q9 227 3.35 113 132 K 8720 Q10 227 2.3 113 174 K 8720 Q11 30 0.43 860 1.3 Meg. 1150 Q12, Q13 15 0.21 1.72 K 2.7 Meg. 573 Q14, Q15 15 0.15 1.72 K 10.7 Meg. 576 Q16 12.3 0.12 2.1 K 14.2 Meg. 477 VCC RE 1.8 KΩ IC11 = 30 µA. Q2 Q9 Q11 Q10 Q1 Q5 50 K Q12 Q13 35 Ω Invert Non-invert D1 vOUT D2 35 Ω D3 C = 15 pf. COMP Q4 100 K Q16 Q3 Q8 Q14 Q15 50 K Q7 Q6 50 K 50 K 35 Ω 500 Ω 500 Ω VEE .
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