• MOSFET • Op Amps • 741, 356 • Imperfections • Op‐amp applications

Acknowledgements: Ron Roscoe, Neamen, Donald: Microelectronics Circuit Analysis and Design, 3rd Edition

6.101 Spring 2020 Lecture 7 1 6.101 Spring 2020 Lecture 7 2

JFET Application Current Source 2017 Quiz Design Question

+15V Design a circuit such that when a momentary • Household application: battery push button switch is closed, “switched 9v” charger (car, laptop, mp3 will be supplied to your design under test for players) 2N5459 exactly two minutes. • Differential current source You have available a 2N7000 (n-channel • Ramp waveform generator MOSFET) and a ZVP2106A which is a p-channel i complement to the 2N7000. • High Speed DA converter using D capacitors You have a 100uf capacitor that is exactly 100uf • Simple circuit: 2N5459 with negligible leakage current. Nchannel JFET Based on measurements, your 2N7000 has a

VGS(th) 3.0 volts and the ZVP2106A has a VGS(th) -3.0.

IDSS = current with VGS=0 The 9V battery is a constant 9V during the test. V = pinchoff ln(.3333) = -1.0986 P ln(.2222) = -1.5041 ln(.1111) = -2.1972 [one or more of these 2 constants may be required for your design]  v   GS  iD  I DSS 1   VP 

6.101 Spring 2020 3 6.101 Spring 2020 Lecture 7 4 Op‐Amps Op‐Amp Packaging

• Active device: V0 = a(V+-V-); V+ LM324 note that it is the difference V- V of the input voltage! o • a=open loop gain ~ 105 – 106 • Most applications use negative feedback. • Comparator: no feedback • Active device requires power. No shown for simplicity. • Classics op-amps: 741, 357 ~ $0.20; one, two or four in a package. • Newer op-amps operate at <3.3V (OPA369 1.8V) LF353

6.101 Spring 2020 Lecture 7 5 6.101 Spring 2020 Lecture 7 6

356 JFET Input Op‐amp JFET Differential Pair

Small Signal Model

6.101 Spring 2020 Lecture 7 7 6.101 Spring 2020 8 Discrete 741 741 Circuit

22 , 11 , 1 capacitor, 1

6.101 Spring 2020 Lecture 7 9 6.101 Spring 2020 Lecture 7 10

Discrete 741 Differential (Emitter Coupled) Pair

BJT Diff Pair Small Signal Model

6.101 Spring 2020 Lecture 7 11 6.101 Spring 2020 12 Differential Pair – Common Mode Voltage Differential Pair – Differential Mode Voltage

Small Signal Model

6.101 Spring 2020 13 6.101 Spring 2020 14

MOSFET Differential Pair Virtual Node Analysis

a = gain + β = feedback or loop function Small Signal Model V2 Vout = a(V2-V1) a • If a>>1 and a>> β then v1 ~ v2

V - • Current into input terminals zero by 1 design

• Typical values: Vx +  a~100,000 & a β >>1 V V  V 1 x out • ok for a=a(s) and β = β(s) as long as a(s) β(s) >> 1 V1 Vx  aV2  aV1

• β is the loop transfer function V11 a  Vx  aV2 (not to be confused of β of a BJT)  1   a  V1  Vx   V2  V2 1 a  1 a  •aβ is the loop gain

6.101 Spring 2020 16 6.101 Spring 2020 15 Lecture 7 Op Amps – Virtual Node 741 Op Amp Max Ratings • With negative feedback, output will drive the input voltage difference to

zero => V+ = V‐ common mode voltage • Input current = 0 Need +Vcc, -Vee for operation Benefits of Feedback appears at both inputs

Stabilize gain against device Reduce distortion by the variations, temperature, aging feedback factor [(1+aβ)] Input and output impedances Gain determined by passive adjusted by (1+aβ) components

Disadvantages of Feedback

Loss of gain; need more stages Greater tendency for instability (oscillations) Idiot proof

 1    a  V1 Vx     V2 V2 1 a  1 a 

6.101 Spring 2020 Lecture 7 17 6.101 Spring 2020 Lecture 7 18

741 Electrical Characteristics LF356

Almost zero

not rail to rail

19 6.101 Spring 2020 20 6.101 Spring 2020 Lecture 7 Lecture 7 LM6132 – Rail to Rail Output Rail to Rail Input

6.101 Spring 2020 Lecture 7 21 6.101 Spring 2020 Lecture 7 22

Decibel (dB) 741 Open Loop Frequency Gain

V   P   o  o dB  20log  dB 10log   Vi   Pi 

log10(2)=.301 100 dB = 100,000 = 105 80 dB = 10,000 = 104 3 dB point = half power point 60 dB = 1,000 = 103 40 dB = 100 = 102

6.101 Spring 2020 Lecture 7 23 6.101 Spring 2020 Lecture 7 24 Non‐Inverting Amplifer 741 Open Loop Frequency Gain Examples at 1 Hz, 1000 Hz, and 10kHz Rs +15 3 + 7 Zero input current; A 6 v Voltage gain A =40dB = 100; R = 100k, 4 + + + v 2 2 - v R _ in -15 s +15 therefore v  vin R1= 1k; [101 = 40.1dB!] β=0.01 v v 3 + - out 7 R R2 6 1 _ A v  vout but v  v R1 v 4 R  R 5 + + 1 2 At 1 Hz, Avol = 100 dB = 1 x 10 = 100,000. 2 - + v A 105 105 _ in -15 R 1 Av   5  3 100  40dB v v so v  v 1 A 110 .01 10 - out in out; R1  R 2 R 2 At 1000 Hz, A = 60 dB = 103 = 1000. _ vol vout R1  R 2  A 103 103 1000 R1 v R Av   3    90.9  39.2 dB in 1 1 A 110 .01 110 11

R 2 or Av 1 R 2  1 At 10 kHz, Avol = 42 dB = 1.26 x 10 = 126. A 126 126 126 β (not to be confused with β R A      55.8  34.9dB of a BJT)  1 v 1 A 1126.01 11.26 2.26 R1  R2 for finite A vout A β is the loop transfer function  Av  vin 1 A aβ is the loop gain 6.101 Spring 2020 25 6.101 Spring 2020 Lecture 7 26

741 vs 356 Comparison So Why BJT in Op‐amps?

741 356 Input device BJT JFET BJTs have higher (gain), better Input bias current 0.5uA 0.0001uA consistency in spec between pieces, and in some applications, lower noise than FETs. Input resistance 0.3 MΩ 106 MΩ Slew rate* 0.5 v/μs 7.5 v/μs Like most JFET op amps, the LF356 has a relatively high offset voltage, and relatively high drifts. BJT Gain Bandwidth product 1 Mhz 5 Mhz op-amps tend to have much lower offset voltage and Output duration continuous continuous drifts.

Identical pin out

* comparators have >50 v/μs slew rate

6.101 Spring 2020 Lecture 7 27 6.101 Spring 2020 28 Gain Bandwidth Product = Constant (No free lunch) Op‐Amp Imperfections – Real World

• Input offset voltage • Input Current Bias Gain: 60dB = 103 Bandwidth = 5x103 • Input Offset Current • Finite Output Voltage Swing 6 Gain Bandwidth product = 5x10 • Finite Current • Finite Gain, gain bandwidth product • Voltage Noise – Johnson Noise • Phase Shifts • Slew Rate

6.101 Spring 2020 Lecture 7 29 6.101 Spring 2020 Lecture 7 30

Input Offset Voltage * Offset Adjustments

741: 6000μv 357: 10,000μv

Current technology: 10μv

* Analog Devices MT-037 Tutorial

6.101 Spring 2020 Lecture 7 31 6.101 Spring 2020 Lecture 7 32 Input Bias Current * Inverting Amplifier Bias Current Compensation

R F I IN  I B  I F  0 V   R I I OFF 1 B IIN F I +15 V  V V  V B 2 IN OFF OFF OUT - 7  I B   0 R 6 R R IN A IN F I 3 The input offset current, IOS, B 4 + but with no input signal, V and we want V  0, so : + + IN OUT V + V is the difference between _ IN -15 OUT V R1  1 1   1 1  OFF _ - I B  VOFF   ; - I B   R1 I B    I and I or I = I − I _ B– B+, OS B+ B–.  R IN R F   R IN R F   1 1   1  thus as a condtion for no offset at V :       o  R IN R F   R1 

VOUT   I B R F // R IN  I B R1 AVOL 741: 200na +15 I - V  0 if R // R  R 357: 0.05na B OUT F IN 1 V A R //R DIFF VOL F IN + + -15 V Current technology: IB OUT R VOUT   I B R F // R IN  I B R1 AVOL 3fA LTC6268 1 _

VOUT  0 if R F // R IN  R1 * Analog Devices MT-038 Tutorial

6.101 Spring 2020 Lecture 7 33 6.101 Spring 2020 Lecture 7 34

Common Mode Rejection Ratio CMRR Inverting Amplifer – Virtual Ground Analysis

Assumptions Infinite : ii00; CMRR: ratio of the common- A   v 0.because v is grounded mode gain to differential-mode gain.  R A  A  f Example, if a differential input V R change of Y volts produces a in change of 1 V at the output, and R a common-mode change of X f volts produces a similar change i iin  i f  0 iin f of 1 V, then the CMRR is X/Y. +15 2 - 7 v  0 0  v R 6 in out CMRR often expressed in dB: in A   0 4 + + R R v 3 + in f _ in -15 vout AOL _ CMRR  20log vout  R f   Av ACM vin Rin

6.101 Spring 2020 Lecture 7 35 6.101 Spring 2020 Lecture 7 36 2015 Quiz Question – Digital Clock Using 60Hz

Schmitt Trigger The 60 Hz waveform crosses the reference voltage multiple times because of the 200mv noise.

V- Vin Design a circuit with a Schmitt trigger (“Your design”) using a Vo • Schmitt trigger have different triggers LM6132 with the thresholds greater than 200mv to fix the problem. A LM7805 IC is used to provide a 5V output to V+ points for rising edge power the digital clock circuit (modeled as a ) as well as to R2 and falling edge. supply +5V for the LM6132 in “Your design”.

• Can be used to reduce false triggering R1 • This is NOT a negative feedback circuit.

6.101 Spring 2020 Lecture 7 37 6.101 Spring 2020 Lecture 7 38

High Pass Filter HPF Schmitt Trigger + RC Feedback = Oscillator A

V (dB) • 741 op‐amp. R3 10K C 0 -3dB V V1 R 2 slope = 6 dB / octave • R1=10k, R2=4.7k, R3=10K, slope = 20 dB / decade C=.33uf log f V- f or f • LO -3dB Display V‐ and Vout on the Degrees - V2 R j CR s CR scope. Set R3=4.7k. Predict A v     Vout V 1 j CR 1 s CR 1 + 1 R  0.33uf what happens to the j C frequency. R1 10K 90 o PHASE LEAD 45 o 0o -45 o R2 4.7K log f

fLO or f-3dB

6.101 Spring 2020 Lecture 7 39 6.101 Spring 2020 Lecture 7 40 Differentiator Insights Low Pass Filter LPF

A A V (dB) V (dB)

0 -3dB R 0 slope = 6 dB / octave V V -3dB slope = 20 dB / decade 1 C 2 slope = -6 dB / octave slope = -20 dB / decade log f log f fLO or f-3dB 1 fHI or f-3dB Degrees Degrees V jX j C 1 A  2  C   v V R  jX 1 j RC 1 1 C R j C 90o PHASE LEAD  R  sCR PHASE LAG 2 2 1 0o Av   ; s  j; 45o A  1 sCR 1 v R  1 sRC 1 -45 o 1 sC 0o -90 o -45o at low frequency sCR1  1 log f f or f log f  sCR2 LO -3dB A  fHI or f-3dB v 1

multiplying by s equals differentiation differentiation works only at f << flo

6.101 Spring 2020 Lecture 7 41 6.101 Spring 2020 Lecture 7 42

Integrator Insights Why R2? A V (dB)

0 -3dB slope = -6 dB / octave slope = -20 dB / decade Without R2, any DC bias

log f current will saturate Vout f or f HI -3dB since the DC gain is the open

Degrees loop gain

PHASE LAG 0o

-45o R2 -90o R1 Av   ; s  j; 1  sCR2 log f f or f at high frequency sCR2  1 HI -3dB

R2 R 1 A   1   v integration works only at f >> f sCR2 sCR1 HI sCR2  1

dividing by s equals integration

6.101 Spring 2020 Lecture 7 43 6.101 Spring 2020 Lecture 7 44 Frequency Domain Insight Basic OpAmp Circuits Voltage Follower (buffer) Non-inverting vin  • Integration and differentiation easy v + vout to understand in time domain in v  R - out 2 • In frequency domain, difference between square wave and triangle R1 wave is amplitude and phase – same harmonics. v  v v  R1R2 v out in out R1 in • Integrator (LPF) rolls off Differential Input harmonics and phase shift to Integrator create a triangle wave R1 R2 vin1 R C • Differentiator (HPF) amplifies vout vin harmonics and phase shift to vin2 vout create a square wave. R1 R2

t 1 R2 vout   vindt RC  vout  R1 vin 2  vin1 6.101 Spring 2020 Lecture 7 45 46

Crossover Distortion (hole) Diode Biasing

+12 V +12 V 10k R +15 B1 +15 10k 2N2219 1N4001 10k +15 2N3904 2N3904 RE=5.6 +15 1/2 watt 10k 0.1F 2 0.1F 7 v - out 2 D IN914 - 7 v 1 LF356 6 out LF356 6 4 + RE=5.6 3 + 4 R D 1N914 1/2 watt 0.1F L 3 + +12 2 v 2 in 0.1F 7 v RL C - R ?k -15 in vout L ?k -15 ?opamp 6 2N2905 2N3906 + + 4 3 -12 _ 2N3906 vin [From R Preamplifier] B2 [a] -15 [b] _ 1N4001 -15 -12 V -12 V Why is [b] better? RF

Lecture 7 Lecture 7 6.101 Spring 2020 47 6.101 Spring 2020 48 6.101 Spring 2020 49