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Chapter 9 Stages and Current Mirrors

 9.1 Cascode Stage

 9.2 Current Mirrors

1 Boosted Output Impedances

Rout1  1 g m RE || r rO  RE || r

Rout 2  1 g m RS rO  RS

CH 9 Cascode Stages and Current Mirrors 2 Bipolar Cascode Stage

Rout[1  g m1 ( r O 2 || r 1 )] r O 1  r O 2 || r  1

Rout g m1 r O 1 r O 2|| r 1 

CH 9 Cascode Stages and Current Mirrors 3 Example 9.1

CH 9 Cascode Stages and Current Mirrors 4 Maximum Bipolar Cascode

R  g r r out,max m1 O1  1

Rout,max  1rO1

 The maximum output impedance of a bipolar cascode is

bounded by the ever-present r between emitter and ground of Q1.

CH 9 Cascode Stages and Current Mirrors 5 Example 9.2

CH 9 Cascode Stages and Current Mirrors 6 Example 9.3

2rO 2 r 1 RoutA  r 1  rO 2

 Typically r is smaller than rO, so in general it is impossible to double the output impedance by degenerating Q2 with a .C

CH 9 Cascode Stages and Current Mirrors 7 PNP Cascode Stage

Rout[1  g m1 ( r O 2 || r 1 )] r O 1  r O 2 || r  1

Rout g m1 r O 1 r O 2|| r 1 

CH 9 Cascode Stages and Current Mirrors 8 Another Interpretation of Bipolar Cascode

Vb2 determines the current level.

 Instead of treating cascode as Q2 degenerating Q1, we can also think of it as Q1 stacking on top of Q2 () to boost Q2’s output impedance.

CH 9 Cascode Stages and Current Mirrors 9 False Cascodes

  1  1 Rout  1  g m1  || rO 2 || r 1 rO1  || rO 2 || r 1   g m 2  g m 2

 g m1  1 Rout  1  rO1   2rO1  g m 2  g m 2

 When the emitter of Q1 is connected to the emitter of Q2, it’s no longer a cascode since Q2 becomes a -connected device instead of a current source. CH 9 Cascode Stages and Current Mirrors 10 MOS Cascode Stage

Rout  1 gm1rO2 rO1  rO2

Rout  gm1rO1rO2

CH 9 Cascode Stages and Current Mirrors 11 Example 9.5

CH 9 Cascode Stages and Current Mirrors 12 Another Interpretation of MOS Cascode

 Similar to its bipolar counterpart, MOS cascode can be thought of as stacking a on top of a current source.  Unlike bipolar cascode, the output impedance is not limited by .

CH 9 Cascode Stages and Current Mirrors 13 PMOS Cascode Stage

Rout  1 gm1rO2 rO1  rO2

Rout  gm1rO1rO2

CH 9 Cascode Stages and Current Mirrors 14 Example 9.6

 During manufacturing, a large parasitic resistor, RP ,has appeared in a cascode as shown in Fig. 9. 11. Determine the output resistance.

Rout  (1 gm1rO2 )(rO1 || RP )  rO2

 RP will lower the output impedance, since its parallel combination with rO1 will always be lower than rO1.

CH 9 Cascode Stages and Current Mirrors 15 Short-Circuit

i G  out m v in vout 0

 The short-circuit transconductance of a circuit measures its strength in converting input to output current.

CH 9 Cascode Stages and Current Mirrors 16 Example 9.7

 Calculate the transconductance of the CS stage shown in Fig. 9.13(a).

Gm  gm1

CH 9 Cascode Stages and Current Mirrors 17 Derivation of Voltage

vout  iout Rout  Gm vin Rout

vout vin  Gm Rout

 By representing a linear circuit with its Norton equivalent,

the relationship between Vout and Vin can be expressed by the product of Gm and Rout.

CH 9 Cascode Stages and Current Mirrors 18 Example 9.8

 Determine the voltage gain of the common-emitter stage shown in Fig. 9.15(a).

Av  gm1rO1

CH 9 Cascode Stages and Current Mirrors 19 Comparison between Bipolar Cascode and CE Stage

 Since the output impedance of bipolar cascode is higher than that of the CE stage, we would expect its voltage gain to be higher as well.

CH 9 Cascode Stages and Current Mirrors 20 Voltage Gain of Bipolar Cascode

Gm g m1

Av  g m1 r O 2 g m 2( r O 1 || r 2 )

 Since rO is much larger than 1/gm, most of IC,Q1 flows into the diode-connected Q2. Using Rout as before, AV is easily calculated.

CH 9 Cascode Stages and Current Mirrors 21 Example 9.9

Gm g m1

Av  g m1 r O 2 g m 2( r O 1 || r 2 )

 Cascoding thus raises the voltage gain by a factor of 65.8.

CH 9 Cascode Stages and Current Mirrors 22 Alternate View of Cascode Amplifier

 A bipolar cascode amplifier is also a CE stage in series with a CB stage.

CH 9 Cascode Stages and Current Mirrors 23 Practical Cascode Stage

Rout  rO3 || gm2rO2 (rO1 || r 2 )

 Since no current source can be ideal, the output impedance drops.

CH 9 Cascode Stages and Current Mirrors 24 Improved Cascode Stage

Rout  gm3rO3 (rO4 || r 3 ) || gm2rO2 (rO1 || r 2 )

 In order to preserve the high output impedance, a cascode PNP current source is used.

CH 9 Cascode Stages and Current Mirrors 25 Example 9.10

 Compared to the ideal current source case, the gain has fallen by approximately a factor of 3 because the pnp devices suffer from a lower Early voltage and β.

CH 9 Cascode Stages and Current Mirrors 26 MOS Cascode Amplifier

Av  Gm Rout

Av  gm1(1 gm2rO2 )rO1  rO2 

Av  gm1rO1gm2rO2

CH 9 Cascode Stages and Current Mirrors 27 Improved MOS Cascode Amplifier

Ron  gm2rO2rO1

Rop  gm3rO3rO4

Rout  Ron || Rop

 Similar to its bipolar counterpart, the output impedance of a MOS cascode amplifier can be improved by using a PMOS cascode current source.

CH 9 Cascode Stages and Current Mirrors 28 Temperature and Supply Dependence of Bias Current

R2V CC (R1  R2 )  VT ln(I1 I S ) 2 1 W  R2  I1  nCox  VDD VTH  2 L  R1  R2 

 Since VT, IS, n, and VTH all depend on temperature, I1 for both bipolar and MOS depends on temperature and supply.

CH 9 Cascode Stages and Current Mirrors 29 Concept of

 The motivation behind a current mirror is to sense the current from a “golden current source” and duplicate this “golden current” to other locations.

CH 9 Cascode Stages and Current Mirrors 30 Bipolar Current Mirror Circuitry

I S1 I copy  I REF I S ,REF

 The diode-connected QREF produces an output voltage V1 that forces Icopy1 = IREF, if Q1 = QREF.

CH 9 Cascode Stages and Current Mirrors 31 Bad Current Mirror Example I

 Without shorting the collector and base of QREF together, there will not be a path for the base currents to flow, therefore, Icopy is zero.

CH 9 Cascode Stages and Current Mirrors 32 Bad Current Mirror Example II

 Although a path for base currents exists, this technique of is no better than resistive divider.

CH 9 Cascode Stages and Current Mirrors 33 Multiple Copies of IREF

I S , j I copy, j  I REF I S ,REF

 Multiple copies of IREF can be generated at different locations by simply applying the idea of current mirror to more .

CH 9 Cascode Stages and Current Mirrors 34 Current Scaling

I copy, j  nI REF

 By scaling the emitter area of Qj n times with respect to QREF, Icopy,j is also n times larger than IREF. This is equivalent to placing n unit-size transistors in parallel.

CH 9 Cascode Stages and Current Mirrors 35 Example 9.14 : Scaled Current

 A multistage amplifier incorporates two current sources of values 0.75mA and 0.5mA. Using a bandgap reference current of 0.25mA, design the require current sources. Neglect the effect of the base current for now.

CH 9 Cascode Stages and Current Mirrors 36 Fractional Scaling

1 I  I copy 3 REF

 A fraction of IREF can be created on Q1 by scaling up the emitter area of QREF.

CH 9 Cascode Stages and Current Mirrors 37 Example 9.15 : Different Mirroring Ratio

 It is desired to generate two currents equal to 50uA and 500uA from a reference of 200uA. Design the current mirror circuit.

 Using the idea of current scaling and fractional scaling, Icopy2 is 0.5mA and Icopy1 is 0.05mA respectively. All coming from a source of 0.2mA.

CH 9 Cascode Stages and Current Mirrors 38 Mirroring Error Due to Base Currents

nI I  REF copy 1 1 n 1  CH 9 Cascode Stages and Current Mirrors 39 Improved Mirroring Accuracy

nI I  REF copy 1 1 n 1  2

 Because of QF, the base currents of QREF and Q1 are mostly supplied by QF rather than IREF. Mirroring error is reduced  times.

CH 9 Cascode Stages and Current Mirrors 40 Example 9.16 : Different Mirroring Ratio Accuracy

 Compute the Icopy1 and Icopy2 in this figure before and after adding a follower.

I I  REF copy1 15 4   Before : 10I I  REF copy 2 15 4   I I  REF copy1 15 4   2 After : 10I I  REF copy2 15 4   2

CH 9 Cascode Stages and Current Mirrors 41 Example 9.17 : Different Mirroring Ratio Accuracy

 Design this circuit for a voltage gain 100 and a power budget of 2mW. Assume VA,npn = 5V, VA,pnp = 4V, IREF = 100uA, and VCC = 2.5V.

 The gain is smaller than 100 because low Early and VT, a fundamental constant of the technology, independent of the bias current.

CH 9 Cascode Stages and Current Mirrors 42 PNP Current Mirror

 PNP current mirror is used as a current source load to an NPN amplifier stage.

CH 9 Cascode Stages and Current Mirrors 43 Generation of IREF for PNP Current Mirror

CH 9 Cascode Stages and Current Mirrors 44 Current Mirror with Discrete Devices

 Let QREF and Q1 be discrete NPN devices. IREF and Icopy1 can vary in large magnitude due to IS mismatch.

CH 9 Cascode Stages and Current Mirrors 45 MOS Current Mirror

 The same concept of current mirror can be applied to MOS transistors as well.

CH 9 Cascode Stages and Current Mirrors 46 Bad MOS Current Mirror Example

 This is not a current mirror since the relationship between VX and IREF is not clearly defined.  The only way to clearly define VX with IREF is to use a diode- connected MOS since it provides square-law I-V relationship.

CH 9 Cascode Stages and Current Mirrors 47 Example 9.20 : Current Mirror ?

 Is this current mirror? Explain what happens.

 This circuit is not a current mirror because the gates of MREF and M1 are floating.

CH 9 Cascode Stages and Current Mirrors 48 Example 9.21 : Current Scaling

 Similar to their bipolar counterpart, MOS current mirrors

can also scale IREF up or down (I1 = 0.2mA, I2 = 0.5mA).

CH 9 Cascode Stages and Current Mirrors 49 CMOS Current Mirror

 The idea of combining NMOS and PMOS to produce CMOS current mirror is shown above. CH 9 Cascode Stages and Current Mirrors 50