10/2/2018

Indian Institute of Technology Jodhpur, Year 2018

Analog Electronics (Course Code: EE314) Lecture 23: Stage

Course Instructor: Shree Prakash Tiwari Email: [email protected]

Webpage: http://h ome.iitj.ac.in/ ~sptiwari/ Course related documents will be uploaded on http://home.iitj.ac.in/~sptiwari/EE314/

Note: The information provided in the slides are taken form text books for microelectronics (including Sedra & Smith, B. Razavi), and various other resources from internet, for teaching/academic use only 1

Ideal Current Source

Circuit Symbol I-V Characteristic Equivalent Circuit

• An ideal current source has infinite . How can we increase the output impedance of a BJT that is used as a current source?

1 10/2/2018

Boosting the Output Impedance • Recall that emitter degeneration boosts the impedance seen looking into the collector. – This improves the gain of the CE or CB . However, headroom is reduced.

Rout  1 g m RE || r  rO  RE || r

Cascode Stage

• In order to relax the trade‐off between output impedance and headroom, we can use a instead of a degeneration :

Rout  [1 g m (rO2 || r1 )]rO1  rO2 || r1

Rout  gm1rO1 rO2 || r1 

IC 2  I E1  IC1 if 1 1

• VCE for Q2 can be as low as ~0.4V (“soft saturation”)

2 10/2/2018

Maximum Cascode Output Impedance

• The maximum output impedance of a cascode is

limited by r1.

If rO2  r1 : R  g r r   r out,max m1 O1  1 1 O1

PNP Cascode Stage

Rout  [1 gm1(rO2 || r1)]rO1  rO2 || r1

Rout  gm1rO1rO2 || r1

3 10/2/2018

False Cascodes

• When the emitter of Q1 is connected to the emitter of Q2, it’s not a cascode since Q2 is a ‐connected device instead of a current source.

  1  1 Rout  1  g m1  || rO 2 || r 1 rO1  || rO 2 || r 1   g m 2  g m 2

 g m1  1 Rout  1  rO1   2rO1  g m 2  g m 2

Short‐Circuit

• The short‐circuit transconductance of a circuit is a measure of its strength in converting an input voltage signal into an output current signal.

iout Gm  vin vout 0

4 10/2/2018

Voltage Gain of a Linear Circuit

• By representing a linear circuit with its Norton

equivalent, the relationship between Vout and Vin can be expressed by the product of Gm and Rout. Norton Equivalent Circuit

Computation of vout  iout Rout  Gm vin Rout short-circuit output current: vout vin  Gm Rout

Example: Determination of Voltage Gain

Determination of Gm Determination of Rout

iout vx Gm   gm1 Rout   ro1 vin ix vout 0

Av  gm1rO1

5 10/2/2018

Comparison of CE and Cascode Stages

• Since the output impedance of the cascode is higher than that of a CE stage, its voltage gain is also higher.

vout  gm1vinrO1

VA Av  gm1rO1   Av  gm1rO2 gm2 rO1 r 2  VT

Voltage Gain of Cascode Amplifier

• Since rO is much larger than 1/gm, most of IC,Q1 flows into diode‐connected Q2. Using Rout as before, AV is easily calculated.

iout  gm1vin  Gm  gm1

Av  Gm Rout

 g m11 g m2 rO1 || r 2 rO 2  rO1 || r 2

 g m1g m2 rO1 || r 2 rO 2

6 10/2/2018

Practical Cascode Stage • No current source is ideal; the output impedance is finite.

Rout  rO3 || gm2rO2 (rO1 || r 2 )

Improved Cascode Stage

• In order to preserve the high output impedance, a cascode PNP current source is used.

Rout  gm3rO3 (rO4 || r 3 )|| gm2rO2 (rO1 || r 2 )

Av  gm1Rout

7 10/2/2018

NMOS Cascode Stage

Rout  1 gm1rO1 rO2  rO1

Rout  gm1rO1rO2

PMOS Cascode Stage

Rout  1 gm1rO1 rO2  rO1

Rout  gm1rO1rO2

8 10/2/2018

Another Interpretation of MOS Cascode

• Similar to its bipolar counterpp,art, MOS cascode can be thought of as stacking a transistor on top of a current source. • Unlike bipolar cascode, the output impedance is not limited by .

17

Example: Parasitic Resistance

Rout  (1 gm1rO2 )(rO1 || RP )  rO2

• RP will lower the output impedance, since its parallel combination with rO1 will always be lower than rO1. 18

9 10/2/2018

Transconductance Example

Gm  gm1

MOS Cascode Amplifier

Av  Gm Rout

Av  gm1(1 gm2rO2 )rO1  rO2

Av  gm1rO1gm2rO2

10 10/2/2018

PMOS Cascode Current Source as Load

• A large load impedance can be achieved by using a PMOS cascode current source.

RoN  g m 2 rO 2 rO1

RoP  g m3rO 3rO 4

Rout  RoN || RoP

Review: Cascode Stage Rout • The impedance seen looking into the collector can be boosted significantly by using a BJT for emitter degeneration, with a relatively small reduction in headroom.

Rout  [1 g m (rO2 || r1 )]rO1  rO2 || r1

Rout  gm1rO1 rO2 || r1 

11 10/2/2018

Another View of a Cascode Stage

• Instead of considering a cascode as Q2 degenerating Q1, we can also think of it as Q1 stacked on top of Q2 (current source) to boost Q2’s output impedance.

Temperature and Supply‐Voltage Dependence of Bias Current • Circuits should be designed to operate properly over a range of supply and temperatures.

• For the biasing scheme shown below, I1 depends on the temperature as well as the supply voltage, since

VT and IS depend on temperature.

VBE /VT I1  I S e

R2 VBE  VCC R1  R2

12 10/2/2018

Concept of a • Circuit designs to provide a supply‐ and temperature‐ independent current exist, but require many to implement.  “golden current source” • A current mirror is used to replicate the current from a “golden current source” to other locations.

13