WELLESLEY CS 240 9/14/15

Processor: Data Path Components Arithmetic Logic Unit (ALU) 1

Condition Codes a few bits (sign, overflow, carry-out, zero)

4 2 1 3 Operand A word Instruction Fetch and Registers ALU Memory words ALU Result Decode Operand B

Operation ID

a few bits Hardware unit for arithmetic and bitwise operations.

1-bit ALU for bitwise operations 1-bit adder

Build an n-bit ALU from n 1-bit ALUs. Build an n-bit adder from n 1-bit adders. Each bit i in the result is computed from the corresponding bit i in the two inputs. Each bit i in the result is computed from the corresponding bit i in the two inputs and the carry out of bit i-1. Op A B Result A B Carry in Carry out Sum 0 0 0 Carry in Operation 0 0 0 0 0 1 0 0 1 A A 0 0 1 0

MUX 0 1 0 0 1 1 Sum Result + 0 1 1 B 1 0 0 B 1 1 0 0 1 0 1 1 0 1 Carry out 1 1 0 1 1 0 1 1 1 You will explore what's in the box for lab. 1 1 1

1 WELLESLEY CS 240 9/14/15

1-bit ALU 32-bit ALU with ripple carry

Operation Carry in 2

a 0

MUX Result 1

Sum b + 2

Carry out

Adding subtraction ALU Condition Codes

Zero Flag: 1 if result is 00...0 else 0

Operation Sign Flag: sign bit of result invert B Carry in 2 A 0 Carry Flag: 1 if unsigned overflow else 0 carry-out bit of result MUX Result 1 Overflow Flag: 1 if signed overflow else 0

Sum B 0 2 MUX + 1

Carry out

2 WELLESLEY CS 240 9/14/15

Compute NOT, NAND, NOR, XOR, <, ==, …? Detect overflow? Controlling the ALU invert A Operation invert B Condition Codes Carry in 2 ALU control lines Function A 0 0000 AND MUX 0 Operand A 1 0001 OR MUX Result ALU Result 0010 add 1 0110 subtract Operand B 1100 NOR Sum B 0 2 Control Lines MUX + 1 Invert A Invert B Operation ID Carry out

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