1 Capacitance-Based Characterization of PIN Devices Thesis Presented in Partial Fulfillment of the Requirements for the Degree M

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Capacitance-Based Characterization of PIN Devices

Thesis

Presented in Partial Fulfillment of the Requirements for the Degree Master of Science in

the Graduate School of The Ohio State University

Douglas Rudolph Fink

Graduate Program in Electrical and Computer Engineering

The Ohio State University

2020

Thesis Committee

Dr. Sanjay Krishna, Advisor

Dr. Siddharth Rajan

Dr. Daniel Jardine

Copyrighted by

Douglas Rudolph Fink

2020

Abstract

Capacitance measurements are commonly conducted for many types of semiconductor devices. Because they can detect separated charges, they are able to characterize doping concentration, built-in voltage, speed, and more for p/n junctions. This information provides feedback to the crystal growers and help them grow higher quality materials.

However, these measurements do have limitations. The complex circuit model used to calculate capacitance from a measured impedance requires assumptions and simplifications. This thesis reviews analyses and best practices for capacitance measurements and presents two innovations that expand their applications. These new approaches use double-mesa p-i-n devices and the dependence of capacitance upon area to characterize important semiconductor properties. This work is especially relevant to infrared detectors based on narrow gap antimonide semiconductors such as Type II superlattices. One analysis determines the doping polarity (p-type or n-type) of the intrinsic layer in p-i-n devices, and the other provides a more thorough analysis of the components in the circuit model, reducing the number of error-inducing simplifications. These analyses were applied to GaSb and/or 10 monolayer by 10 monolayer InAs/AlSb superlattice p-i-n and n-i-p devices.

iii

Vita

Personal Information

M.S. Electrical and Computer Engineering, May 2020

B.S. Electrical and Computer Engineering, EE Program of Study, May 2019 Minor in Business Magna cum laude Graduated with honors

Publications

D. R. Fink, S. Lee, S. H. Kodati et al., “Determination of background doping polarity of unintentionally doped semiconductor layers,” Applied Physics Letters, 116(7), 072103

(2020).

S. Lee, H. J. Jo, S. Mathews et al., “Investigation of carrier localization in InAs/AlSb type-II superlattice material system,” Applied Physics Letters, 115(21), 211601 (2019).

Fields of Study

Electrical and Computer Engineering

Table of Contents

Abstract ...... iii Vita ...... iv List of Tables ...... vii List of Figures ...... viii 1. Introduction ...... 1 2. Materials and Methods ...... 5 2.1 Capacitance Measurement Theory ...... 5 2.2 Test Setup ...... 7 2.3 Previously Established Characterization Methods ...... 12 2.3.1 Background Doping Concentration and Depletion Width ...... 13 2.3.2 Built-in Voltage ...... 17 2.3.3 Bandwidth ...... 17 2.3.4 Series Resistance ...... 18 2.3.5 Traps ...... 19 2.4 Background Polarity Determination Method ...... 24 2.5 Dual Junction Analysis ...... 30 2.6 Device Growth and Fabrication ...... 35 3. Results ...... 38 3.1 GaSb ...... 38 3.1.1 Background Doping Concentration ...... 38 3.1.2 Background Polarity Determination ...... 44 3.2 InAs/AlSb ...... 46 3.2.1 Background Doping Concentration ...... 46 3.2.2 Background Polarity Determination ...... 55 3.2.3 Dual Junction Analysis ...... 57 3.3 Conclusions and Future Work ...... 67 Bibliography ...... 70 v

Appendix A. Dual Junction Analysis Fitting Code ...... 73

List of Tables

Table 1. Combinations of top and bottom mesa radii for fabricated devices, and the analyses for which they were used. Unless otherwise noted, devices of all three bottom mesa sizes were analyzed for a given top mesa size...... 37 Table 2: The dual junction analysis fitting results for the InAs/AlSb p-i-n devices...... 58 Table 3: Fitted impedance model components for a 50 µm single mesa InAs/AlSb p-i-n device...... 58

vii

List of Figures

Figure 1: P-i-n structure. While this diagram shows a double mesa structure, where the top contact layer has a smaller area than the bottom contact layer, this is not always the case...... 1 Figure 2: Realistic impedance model (a), parallel model (b), and series model (c) for a p/n junction2...... 6 Figure 3: Photograph of the Lakeshore CRX-6.5K probe station...... 8 Figure 4: View of probes interfacing with the device. The left two devices are probing the top and bottom contacts of the device, and the right probe is an optical fiber probe illuminating the device (used for current measurements)...... 9 Figure 5: Diagram of how the open, short, and load corrections influence the final result8...... 10 Figure 6: Charges in a p-i-n diode, assuming a residually p-type intrinsic region...... 14 Figure 7: A correctly presented graph of carrier density vs depth...... 16 Figure 8: Using the x-intercept of a 1/C2 graph to determine the built-in voltage16...... 17 Figure 9: A capacitance-frequency sweep showing the regime where series resistance dominates the measured impedance. The measured capacitance and conductance must be converted back to raw impedance for this result to be shown...... 19 Figure 10: Pictorial description of different types of defects20...... 20 Figure 11: Capacitance as a function of time for both majority carrier and minority carrier tests2. A reverse bias step is applied at t=0...... 24 Figure 12: Simulation results for electric field in GaSb p-i-n (a) and n-i-p (b) devices. The area and location of the high electric field (dark regions) depends on the mesa in which the p/n junction is contained...... 28 Figure 13: Theoretical capacitance vs. bottom mesa radius plots for fully depleted p-i-n and n-i-p structures, comparing results for (a) p-type and (b) n-type materials. For each structure, capacitance is dependent on one mesa size and independent of the other. Note that the top mesa radius cannot exceed the bottom mesa radius, limiting the data range. 29 Figure 14: Impedance model of a p-i-n device40...... 31 Figure 15: Picture of the fabricated device array...... 36 Figure 16: Schematics of the GaSb devices (left) and the InAs/AlSb devices (right)...... 37 Figure 17: Raw capacitance and conductance data for the GaSb p-i-n devices. The numbers indicate the top and bottom mesa radii for different curves. The red and blue arrows indicate which device corresponds to which curve (the curve near the base of the arrow corresponds to the top device in the list, the end of the arrow corresponds to the bottom device in the list...... 39

viii

Figure 18: Unsmoothed doping concentration and quality factor data as a function of voltage for the GaSb p-i-n devices...... 39 Figure 19: Loess-smoothed doping concentration and quality factor data for the GaSb p-i-n devices using the top mesa area as the active area. The numbers indicate the top and bottom mesa radii of the devices for the adjacent curves...... 40 Figure 20: Loess-smoothed doping concentration as a function of depletion width for the GaSb p-i-n devices using the top mesa area as the active area...... 41 Figure 21: Loess-smoothed doping concentration and quality factor data for the GaSb p-i-n devices, now using the bottom mesa area as the active area...... 42 Figure 22: Loess-smoothed doping concentration as a function of depletion width for the GaSb p-i-n devices, now using the bottom mesa area as the active area...... 42 Figure 23: Raw capacitance and conductance data for the GaSb n-i-p devices. The 50 µm top mesa radius devices had very similar curves, as did the 40 µm top mesa radius devices...... 43 Figure 24: Unsmoothed doping concentration and quality factor data as a function of voltage for the GaSb n-i-p devices. The blue arrow indicates which curve corresponds to which device (curve near the base of the arrow corresponds to the top device in the list, the end of the arrow corresponds to the bottom device in the list)...... 44 Figure 25: GaSb p-i-n and n-i-p results with fitted curves. These graphs show that the capacitance is dependent on bottom mesa radius for the p-i-n structures, and the top mesa radius for the n-i-p structures. This indicates the material is p-type...... 45 Figure 26: Results of GaSb p-i-n and n-i-p graphical interpretation...... 46 Figure 27: Raw capacitance and conductance data for the InAs/AlSb p-i-n devices...... 47 Figure 28: Unsmoothed doping concentration and quality factor data as a function of voltage for the InAs/AlSb p-i-n devices, assuming the top mesa area is the active area. . 47 Figure 29: Loess-smoothed doping concentration and quality factor data for the InAs/AlSb p-i-n devices using the top mesa area as the active area...... 48 Figure 30: Loess-smoothed doping concentration as a function of depletion width for the InAs/AlSb p-i-n devices using the top mesa area as the active area...... 49 Figure 31: Loess-smoothed doping concentration as a function of voltage for the InAs/AlSb p-i-n devices but assuming the bottom mesa area is the active area...... 50 Figure 32: Loess-smoothed doping concentration as a function of depletion width, but assuming the p/n junction is in the bottom mesa...... 50 Figure 33: Raw capacitance and conductance data for the InAs/AlSb n-i-p devices...... 51 Figure 34: Unsmoothed doping concentration and quality factor data as a function of voltage for the InAs/AlSb n-i-p devices assuming the top mesa area is the active area. .. 52 Figure 35: Loess-smoothed doping concentration as a function of voltage for the InAs/AlSb n-i-p devices assuming the top mesa area is the active area...... 52 Figure 36: Loess-smoothed doping concentration as a function of depletion width for the InAs/AlSb n-i-p devices assuming the top mesa area is the active area...... 53 Figure 37: Loess-smoothed doping concentration as a function of voltage for the InAs/AlSb n-i-p devices assuming the bottom mesa area is the active area...... 54 Figure 38: Loess-smoothed doping concentration as a function of depletion width for the InAs/AlSb n-i-p devices assuming the bottom mesa area is the active area...... 54 ix

Figure 39: 10×10 InAs/AlSb results with fitted curves. Both structures indicate that the material is p-type...... 56 Figure 40: The fitted (dashed) and measured (dotted) real components of the impedance for InAs/AlSb p-i-n devices...... 59 Figure 41: The fitted (dashed) and measured (dotted) imaginary components of the impedance for InAs/AlSb p-i-n devices...... 60 Figure 42: Impedances of both junctions for a 50 µm single mesa InAs/AlSb p-i-n device...... 62 Figure 43: Plot of fitted individual impedances as functions of frequency for a 50 µm single mesa InAs/AlSb p-i-n device...... 63 Figure 44: The six p-i-n impedance circuit model components, as in Figure 14, but for the specific case of a residually p-type UID layer40...... 63 Figure 45: A reduced p-i-n impedance circuit model40...... 64 Figure 46: Plot of fitted and reduced impedances as functions of frequency for a 50 µm single mesa InAs/AlSb p-i-n device...... 65 Figure 47: A graph of measured quality factor vs. frequency for multiple InAs/AlSb p-i-n devices...... 66

1. Introduction

P-i-n semiconductor devices are commonly studied because of their applications as switches, photodetectors, high voltage rectifiers, and more1. These devices have heavily doped p-type and n-type contact layers, making them diodes, sandwiching an unintentionally doped (UID) intrinsic layer.

Bottom mesa Bottom mesa Top mesa Top mesa Top contact + + 18 Top Top p or n 300 nm, 2 x 10 contact contact p+ or n+ Bottom Intrinsic (UID) 1000 nm contact p− or n− Bottom Intrinsic (UID) Bottom contact p− or n− contact + + 500 nm, n or p 2 x 1018 + + n or p UID-GaSb buffer 300 nm

n-GaSb substrate n-GaSb substrate

Figure 1: P-i-n structure. While this diagram shows a double mesa structure, where the top contact layer has a smaller area than the bottom contact layer, this is not always the case.

The addition of this UID layer has different benefits for different devices. In photodiodes, photons are more likely to be absorbed in these wide regions with low doping. Switching diodes have larger bandwidths because the increased depletion width decreases device capacitance. Voltage rectifiers have more space to drop voltage, increasing the breakdown voltage.

Characterization is a crucial step in the design and refinement of any device. For semiconductors, it provides feedback to the crystal growers and fabrication scientists about the success of their processes and to the design of the device itself. While all-inclusive metrics of device performance, such as detectivity or noise-equivalent power for photodiodes, are useful to potential customers or sponsors, metrics that provide information about specific characteristics of the device are more useful to the production team, as they provide insight into how the device can be improved. It is in this regime that capacitance- based characterization is an invaluable tool.

Capacitance measurements can provide information about any voltage-varying charge2.

Because of this, they are most commonly used to determine the device’s background (or unintentional) doping concentration, particularly for p-i-n structures. (Throughout this paper, the general term “p-i-n” will refer to both p-i-n (p-on-n) and n-i-p (n-on-p) devices, except in the sections where the two structures are contrasted.) However, capacitance measurements are also capable of determining or providing information about other device parameters, such as the depletion width, built-in voltage, speed, series resistance, trap density and energy levels, and more.

Capacitance-based characterization is particularly useful for infrared (IR) photodetectors, such as the devices tested in this work. IR detectors are desired for defense applications, environmental sensing, telecommunications, manufacturing quality control, and more3.

The background doping concentration is a crucial parameter for photodiodes, as high levels drastically increase dark current4. The characterization of the background doping concentration can be used as feedback to the crystal growers regarding the effectiveness of

2 their processes, and the growers can use this information to make higher quality materials in the future. The voltage at which avalanche photodiodes are fully depleted, known as the punch-through voltage, is determined through capacitance measurements5. The series resistance and speed are also crucial characteristics for photodiodes.

The following Materials and Methods chapter explains capacitance measurement theory and how the measurement system was configured to provide accurate results. A summary of how certain parameters can be extracted from capacitance measurements follows, and both previously established and newly introduced methods are described. The innovations include

• a method for determining the polarity of the UID layer, particularly useful in the

study of superlattices. Simple capacitance measurement techniques are unable to

determine whether a material is residually n-type or p-type.

• a method for thoroughly analyzing the impedance characteristics of the device,

without many of the simplifying assumptions present in a typical capacitance-

voltage measurement.

Both methods utilize double mesa p-i-n structures. The Materials and Methods section concludes by describing the devices to be characterized.

The first half of the Results chapter describes the characterization of p-i-n and n-i-p GaSb devices. The second half reports similar characterization of p-i-n and n-i-p 10 monolayer by 10 monolayer (10×10) InAs/AlSb type-II superlattices. These sections include characterization results of the background doping, depletion width, and the two newly

3 introduced methods described above. The thesis concludes by noting potential future work on these subjects.

2. Materials and Methods

2.1 Capacitance Measurement Theory

Many capacitance measurement principles are derived from two basic physics equations,

�� = �

And

1 � = ��

The latter is particularly crucial, for capacitance measurements don’t measure capacitance directly. Instead, they measure impedance - the magnitude as well as the phase shift between the measured impedance and applied voltage. A small AC bias is applied to the device, usually on top of a larger DC bias, and is required because the impedance of a capacitor is infinite without an AC voltage component. Capacitor impedance is +90° out of phase with the applied AC voltage, while resistor impedance is in-phase. The overall impedance of a p/n junction is modeled as a resistor and capacitance in parallel plus a series resistance2.

Figure 2: Realistic impedance model (a), parallel model (b), and series model (c) for a p/n junction2.

Since capacitance measurements only output two quantities (impedance magnitude and phase), only two unknowns can be present in the model to create a unique solution from one measurement. Because of this, an adjusted model should be used. The parallel model assumes that the series resistance is equal to zero, and the series model assumes the parallel conductance is equal to infinity. When both components are non-neglectable, multiple measurements at different frequencies can be used to eliminate the need for these assumptions.

Narrow bandgap p-i-n devices tend to have low shunt resistance due to surface effects, and since the parallel model helps account for these effects, it is almost always more accurate than the series model for these applications. However, even when using the parallel model, a high conductance still creates measurement error. The dissipation factor, defined as

�� = �� relates the measured capacitance from the series or parallel model to the actual capacitance from the three-component impedance model6.

� = �(1 + � )

While the dissipation factor can be calculated from the capacitance measurements,

� � = ��

� = �� where � and � refer to the measured conductance and capacitance using the parallel model and � and � refer to the measured resistance and capacitance using the series model, the measured dissipation factor does not equal the actual value6.

� = �(1 + ��) + ��

From this equation and the one further above, it can be seen that

� ≤ �(1 + � )

% �� ≤ 100 ∗ �

Thus, the calculated dissipation factor provides an upper bound of the measurement error, and shows that accurate measurements require high capacitance, low parallel conductance, and low series resistance. Conductance is largely dependent on dark current, particularly surface current, so large, well-passivated devices tend to have lower dissipation factors.

Another representation of this characteristic is the quality factor, and is simply defined as the reciprocal of the dissipation factor. The quality factor is more intuitive, for higher values represent better measurements. Quality factors of 5 or higher are desired so that the measurement error is no greater than 4%6.

2.2 Test Setup

Probe stations enable measurements of semiconductor devices and structures just tens of microns wide. Devices do not need to be wire-bonded in order to be measured at a probe

7 station, allowing for quick screening of many devices. All capacitance measurements discussed in this paper were taken on a Lakeshore CRX-6.5K low-temperature probe station using a Keysight B1500A parameter analyzer and a Multi Frequency Capacitance

Measurement Unit (MFCMU).

Figure 3: Photograph of the Lakeshore CRX-6.5K probe station.

The probe station allows for the simultaneous use of up to four probes, sized from 3 to 25

µm wide. After using a vacuum pump to lower the internal pressure to <10-3 Torr, the probe station can cool to as low as 6.5 K using a Gifford-McMahon (GM) cryocooler. A magnifying camera enables precise control of the probes and fiber.

Figure 4: View of probes interfacing with the device. The left two devices are probing the top and bottom contacts of the device, and the right probe is an optical fiber probe illuminating the device (used for current measurements).

The probes interface with the parameter analyzer and its EasyEXPERT software to establish measurement settings and extract data.

A Kelvin (four-point) probing method for capacitance measurements is generally recommended to reduce the effects of contact resistance7. However, Kelvin probing is not possible for our devices because of the very small dimensions of the top contacts, as seen in Figure 4. Two-point probing may also suffer from large inductances caused by long loops between probe shields, which decreases the measured impedance magnitude and phase. This can be mitigated using a short jumper between probe shields8. However, in comparisons in measurements from our jumper-less setup and a very similar setup with a jumper, no improvements were seen. For these reasons, all capacitance measurements were taken using a two-probe approach without a ground jumper.

Ideally, during capacitance measurements, the total system impedance would only result from the device’s capacitance. In reality, there are other factors in the device and the setup that alter the total impedance. Some of these, such as cable phase differences and 9 measurement offsets, can be accounted for. To reduce the effects of stray impedances, phase, open, and short corrections were taken using the B1500A’s calibration menu.

Figure 5: Diagram of how the open, short, and load corrections influence the final result8.

Phase corrections are used to account for cable lengths. Signal propagation time is proportional to cable length, creating a phase mismatch between the application and measurement of the signal. These effects are most prevalent at high measurement frequencies (>1MHz), for if the time delay is constant, the phase delay is directly related to the measurement frequency8. Phase corrections are taken in an open-circuit probing configuration, where both probes are above the sample surface, separated by approximately the same distance as they are during the actual capacitance measurement. Phase mismatch can also be reduced by using the manufacturer’s cables that are included with the MFCMU.

Open-circuit corrections are used to reduce the effects of offset errors, particularly at very high impedances, or low capacitances (<10pF). This condition is usually met when testing p-i-n devices, making open corrections perhaps the most important for this application.

Without this adjustment, the measured value could be off by hundreds of femtofarads. As

10 with the phase corrections, the probes are lifted off the device during open-circuit corrections.

Short-circuit corrections also reduce the effects of offset errors, primarily at low impedances. As mentioned above, p-i-n devices tend to have relatively large impedances

(on the order of a tenth of a megaohm), making this correction less impactful than the others. Short-circuit corrections are set up by landing both probes on the same contact, as close together as possible.

Load configurations are the final commonly used correction. These are primarily done to correct for gain errors, rather than offset errors. However, they require testing a load of a known impedance that is similar in magnitude to that of the device under test (DUT). Our setup does not have a load that meets these requirements, so this correction was not used.

Corrected impedance is calculated by the parameter analyzer by the equation8,

� � = 1 1 − � − � �

It is important to note that each of the measured corrections are dependent on the applied frequency as well as temperature. When one of these conditions are altered, the corrections must be retaken.

After corrections were taken, when measuring the open-circuit capacitance, the B1500A reports an RMS capacitance of ~ 3 fF at an offset of less than an attofarad. This indicates

< 1% of error introduced by the test setup for DUT capacitances > 0.3 pF.

Even after applying the corrective factors, consideration of the test parameters is crucial to accurately measure and analyze capacitance data. The two most important parameters to tune are the AC frequency and magnitude. Neither has a value that is universally best, and 11 adjustments will have both advantages and disadvantages. As mentioned previously, phase mismatches are diminished at low frequencies. However, if the phase correction is applied and the manufacturer’s recommended cabling is used, this should not be a significant factor. Effects of series resistance (when using the parallel model) are also lessened at low frequencies, as seen in the equation2

� � ≈ 1 + (��)

However, as the frequency decreases, the capacitor’s impedance does as well, approaching that of the parallel conductance and reducing the quality factor. Increasing the test frequency can improve the quality factor, particularly for devices of low capacitances, but can magnify gain, offset, and phase errors9. Thus, the measurement frequency should be chosen after considering each of the three components in the p/n junction impedance model. The dual junction analysis, described in Section 2.5, also provides a method of determining which ranges of frequencies are appropriate for a given device.

The magnitude of the AC signal is another important parameter in capacitance measurements. If the value is too low, the capacitance effects will be small, leading to noisy measurements. If the value is too high, particularly at low biases, the small-signal approximation will be disrupted, breaking the linearization of the model10. For these reasons, drive levels of 20-100mV are typical.

2.3 Previously Established Characterization Methods

Of course, proper collection of capacitance data would be useless if no information about the device or material could be extracted from it. The following pages outline some of the most common analyses of capacitance data. While capacitance measurements are common

12 for many device structures, particularly metal-oxide-semiconductor (MOS) devices, this discussion will be limited to p-i-n devices.

2.3.1 Background Doping Concentration and Depletion Width

Background doping concentration is perhaps the most common parameter extracted from capacitance data because of its large impact on p-i-n device performance. In photodiodes, high levels decrease minority carrier lifetime11 and increase dark current12,4 by decreasing the minority carrier diffusion length13. While crystal growers do not intentionally dope the

UID layer, unwanted impurities and defects create sub-bandgap states that act like dopants and contribute to background carrier concentration. This can be because of impurities from nonideal growth conditions, atomic interactions leading to defects, and more. Crystal growers can make adjustments in their growth procedure using feedback on the results of previous growths, making background doping concentration measurements important in creating higher quality materials.

Most capacitance measurements of p-i-n devices characterize the junction capacitance, which is measured under reverse bias. Junction capacitance occurs due to the expansion of the depletion width, and will be discussed in depth in the following paragraphs. Diffusion capacitance, which dominates under forward bias, occurs due to minority carriers being stored near the edges of the junction. While this quantity has been used to measure the minority carrier lifetime in p/n diodes14, the information provided by characterizing the expanding depletion region makes junction capacitance capable of determining more device parameters.

The relationship between background doping concentration and capacitance can be clearly derived from an electrostatic analysis of a p-i-n diode. Since

�� = −� ��

And

�� = ��

An increase in applied voltage increases the amount of charge present in the device. The increase in charge comes from an increase in the depletion width, where there are no mobile carriers, just charged donors and acceptors15. The amount the width expands depends on the doping concentration at the edge of depletion region.

Band Diagram P+ P- N+

• Small depletion width change dW qNd Charge arises from small AC voltage Diagram • dxn very small, so dW = dxp

dx p qN x = qN x | | a p d n

-qNa xp xn

Figure 6: Charges in a p-i-n diode, assuming a residually p-type intrinsic region. The equation for the background doping concentration is derived from the equations for depletion width

2�(� + �) � = (� − �) ��

And capacitance

�� = ��

When these equations are considered for p-i-n devices, (meaning UID doping concentration is much less than the contact layer doping concentration, creating a one-sided depletion region), they produce the equation16

1 2 = (� − �) � ��

Where � is the built-in voltage. Taking the derivative with respect to voltage yields the experimentally valuable relationship16

1 2 � � = � ��

This equation holds true when � > � and when one side of the p/n junction is doped significantly higher than the other, which is the case for p-i-n devices. Thus, by taking capacitance-voltage (C-V) measurements, the doping concentration of the UID layer can be determined.

While the above equation yields doping as a function of voltage, the physical significance is doping as a function of depth within the device. Since the depletion width is related to capacitance by the equation

� � � � = �

No additional measurements are required to convert the doping-voltage graph to doping- position. Thus, doping is generally plotted as a spatial profile.

Figure 7: A correctly presented graph of carrier density vs depth. While so far it has been said that this analysis yields doping density, that is not quite correct.

Varying fields produce capacitance from any mobile charges, not just those from dopants.

Because of this, C-V measurements actually determine the apparent carrier density, not doping density. For uniform materials, the carrier density equals the doping density, but the two are inequal in the presence of interfaces. This introduces a spatial resolution for

C-V measurements, known as the Debye Length. It is determined by the equation2

�� = �(� + �)

For abrupt changes smaller than this spatial resolution, the C-V results do not portray the doping density.

2.3.2 Built-in Voltage

Measuring 1/C2 as a function of voltage has other applications besides the doping density.

This graph is linear when doping density is constant, and when extrapolated, the x-intercept of this graph is the built-in voltage17.

Figure 8: Using the x-intercept of a 1/C2 graph to determine the built-in voltage16.

This arises from the equation for depletion width, but is only valid when the device has ohmic contacts. When there are Schottky contacts, the voltage dropped over the contact lowers the x-axis intercept, and a correction must be added2.

2.3.3 Bandwidth

The speed of p-i-n devices is a very important characteristic for switching diodes and avalanche photodiodes (APDs), since faster APDs enable high-speed optical communication. The speed of a diode can be limited by two main mechanisms: the time it takes for carriers to move throughout the device, or the resistance-capacitance (RC) time constant of the device18. The RC bandwidth is equal to19 17

1 � = 2��

Where R is the sum of the series and load resistances. Thus, for RC-limited devices, reducing the device capacitance increases the device speed. This can be done by increasing the applied reverse bias, which increases the depletion width. However, this incurs the trade-off of increased dark current. The transit-time bandwidth is determined by19

0.45�� = �� (1 + ) �

Where � is the mobility, E is the electric field, L is the UID layer width, and vsat is the saturation drift velocity. Transit-time bandwidth increases with decreasing depletion width, opposite of RC bandwidth. Both can be predicted as functions of applied voltage. Thus, the optimal bias that maximizes speed can be measured from capacitance measurements.

2.3.4 Series Resistance

As mentioned in Section 2.1, the measured capacitance can be related to the impedances of the device and the test frequency.

� � ≈ 1 + (��)

(This equation is actually a simplification of the equation below, where the conductance of the device is considered. For devices that are not very leaky, the equation reduces to the above.) 2

� � = (1 + ��) + (��)

The simplified equation can be used to determine the series resistance of the device. At low frequencies, the measured capacitance is approximately equal to the actual capacitance.

After this value is obtained, the measurement frequency can be raised until the resistance term in the denominator dominates. It is recommended that a capacitance-frequency (C-f) sweep be used to determine this value, for a slope method is generally more accurate than the use of a single value.

Zc Gp

Ztotal

Figure 9: A capacitance-frequency sweep showing the regime where series resistance dominates the measured impedance. The measured capacitance and conductance must be converted back to raw impedance for this result to be shown.

A C-f sweep also shows where the parallel conductance dominates the measured impedance, a regime to avoid.

2.3.5 Traps

All semiconductors contain imperfections in their lattice. These imperfections can be impurities (nonnative atoms in the lattice) or defects (misaligned atoms, such as vacancies, antisite defects, and interstitials)2. Imperfections introduce additional energy states, sometimes in the middle of the bandgap, where otherwise no states would exist. 19

Figure 10: Pictorial description of different types of defects20.

Dopant atoms, which are intentionally introduced impurities, have energies that ideally are very near the conduction band (for donors) or very near the valence band (for acceptors)21.

Traps, which are usually unintentionally introduced, are most detrimental when their energy levels are near the middle of the bandgap. They greatly increase the rate of

Shockley-Read-Hall generation and recombination, which damages device performance.

Traps take longer to respond to varying voltages than other carriers in the device, sometimes with a bandwidth of a couple Hz22. This allows some traps to be characterized through capacitance measurements, since traps create separated charges. They also play a

20 role in the selection of the applied AC frequency in capacitance measurements – traps may affect measurements at low frequencies, but might not respond to high frequencies.

Because capacitance measurements respond to charges, they can be used to measure impurities. However, since these concentrations are often much lower than the carrier densities that dominate the capacitance, they can be difficult to detect. Because of this, there are many proposed methods for measuring these characteristics. Some of these methods are described below.

Section 2.3.1 established the relationship between C-V data and doping concentration. However, it was also determined that it is not truly the doping density that is measured, but the carrier density, and that in non-steady-state conditions the two differ.

This yields the following equation,2

1 2 = (� − � ) � ��(�)

where n(t) is the carrier density as a function of time. This carrier density is the combination of the constant doping density and the varying G-R center density (below for a residually n-type UID layer)23,

�(�) = � − �(�)

And the total density is the sum of the densities occupied by electrons and holes.

� = �(�) + �(�)

After substitutions,

1 2 = (� − �) � �� (� − �(�))

At the time at which reverse bias is first applied, the G-R centers are dominated by electrons, making nt =Nt. As time passes and steady-state conditions are reached, the 21 electrons are emitted from the centers, showing an decay in capacitance. No more carriers are captured by the centers if they are in the depletion region, for all carriers are swept out.

Thus, the time dependence of capacitance on deep-level impurity density is2

1 2 = (� − �) � �� (� − �(�))

�� −�� (�) = � − � (�) 1 2 � �

At t = 0,

�� −�� (0) ≈ (� − � ) 1 2 � �

At t = infinity,

�� −�� (∞) ≈ (� ) 1 2 � �

By subtracting the two,

�� −�� (∞) − (0) ≈ (� ) 1 1 2 � � � �

Thus revealing the impurity density from the change in slope of the 1/C2 vs V plot. This method is called the steady-state method, for it depends on the final steady-state capacitance.

Transient methods, rather than the steady-state method, are perhaps more common due to the experimental difficulty of taking a C-V sweep at t = 0. Instead of doing two C-V measurements – one at the time of first applying reverse bias, the second at a time much later – transient methods measure capacitance at only one reverse bias as a function of time, including the time the reverse bias is first applied. The capacitance changes as a function 22 of time, similarly to the steady-state, but the goal in this method is to find the time constant of the decay2.

There are four categories of transient methods using capacitance – methods that measure capture and emission of carriers, for both majority or minority carriers. The preferred method depends on the energy of the traps relative to the Fermi level – majority carrier methods should be used for traps above EF for n-type materials and below EF for p-type materials, and the opposite for minority carrier methods. This is because in an n-type material, for example, traps below EF are likely to already be filled by electrons, making the traps less likely to respond to majority carrier injection. Emission methods are more common, for emission rates are longer than capture rates, making them easier to measure2.

Majority carrier emission methods involve pulsing the device from zero bias, when traps contain majority carriers, to negative bias, causing traps to emit those carriers until they are empty. Minority carrier emission methods involve pulsing the device from positive bias, when traps contain minority carriers, to negative bias, causing traps to emit those carriers until they are empty. Capture methods are the same steps in a backwards order – starting with a reverse bias, when traps are empty, the device is either pulsed to zero bias to capture majority carriers or pulsed to positive bias to capture minority carriers. Trap density from the majority carrier emission method for an n-type material is determined from the equation2

�(0) ⁄ � = � 1 − � 2�

Other methods follow similar equations. The time constant � is the inverse of the electron emission rate en, and provides information about the trap, including the distance of the trap energy from the conduction or valence band. For more information, see reference 1.

Figure 11: Capacitance as a function of time for both majority carrier and minority carrier tests2. A reverse bias step is applied at t=0.

Today, these methods are not commonly used to characterize traps. Instead, deep-level transient spectroscopy (DLTS) is used due to the increased availability of automated testing. Majority-carrier DLTS involves stimulating the device between zero bias and a reverse bias, as in the previous sections, but does so many times as a function of temperature2 to produce a capacitance-time constant spectrum. Signal processing algorithms applied to the data provide information about the traps in the device. Minority carrier DLTS relies on optical generation to create the minority carriers. DLTS can extract the concentration, energy level, emission rate, and more for multiple traps in the device24.

2.4 Background Polarity Determination Method

As discussed previously, the background doping concentration has a large impact on device performance. Since it is affected by temperature, defects, impurities, and their activation

24 energies, it is generally dependent on the material and growth process. While this parameter has been thoroughly studied for many bulk materials, the background doping polarity of many superlattices (SLs) are not known due to their multiple constituents with different background concentrations. For example, type-II superlattices (T2SL) using the antimonide family of semiconductors (InAs, GaSb, AlSb) have established themselves as a promising candidate for infrared detectors and focal plane arrays25. However, their background doping polarity depends on the composition of the layers, their thicknesses, and even temperature26. Accurate knowledge of the background doping polarity and magnitude is required to correctly model the device measurements11,27.

While typical C-V measurements can determine the magnitude of the background doping concentration in a p-i-n device, they cannot determine the polarity. Some manuscripts speak of using the sign of the dC/dV curve to determine the polarity, but this method is only capable of determining whether the structure is p-i-n or n-i-p. Hall measurements are commonly used to determine the background doping polarity28, but are limited by parallel conduction in the substrate, and thus cannot be used for materials grown on conductive substrates such as GaSb29,30. Various mobility spectrum analyses use Hall measurements as a function of magnetic field to extract information about multiple carriers31,32,33,34 and have been used to determine carrier polarity in materials, even on some conductive substrates30. However, there are challenges to identifying all present carriers using this method – fitting is needed to extract the concentration and mobility values35, and some carriers may not be visible in the conductivity spectra at all temperatures36.

To avoid difficulties with conductive substrates, materials can be grown on semi-insulating substrates such as GaAs37 or with an insulating buffer layer between the material and the

25 conductive substrate38 to allow Hall measurements and polarity determination. However, both methods could introduce defects that would not be present in material grown directly on the primary substrate, causing measurements from these variant growths to be inapplicable to the actual devices11,29. Additionally, the conductivity of a buffer such as

AlGaAsSb is dependent on temperature, so this buffer may not be effectively insulating when not at cryogenic temperatures30. Since the background doping concentration and polarity can depend on temperature26, tests limited by temperature are undesirable.

Electrochemical capacitance-voltage (ECV) measurements can be used to determine both the doping concentration and polarity of a device, but there are situations in which this solution would not be preferred. The first is if the device is to be used in future tests, as

ECV involves etching a hole through the device39. Second, the applied AC signal in ECV setups is typically limited to tens of kHz to reduce the effects of the electrolyte’s series resistance2. These relatively low frequencies, compared to the MHz used in other C-V measurements, can be problematic when measuring leaky, or low shunt resistance, devices.

This is particularly relevant for low bandgap devices, such as mid-wave and long-wave infrared photodiodes.

We designed a technique for determining the background doping polarity in semiconductor materials using an overetched double mesa structure, as seen in Figure 12.

Unlike the Hall technique, this procedure is not limited by the conductivity of substrates and uses working devices rather than Hall samples. The key idea is that the overetched double mesa structure creates two junctions with different areas, only one of which is a p/n junction. The UID layer type determines whether the top or bottom mesa contains the p/n junction. Since the device capacitance scales with the area of this junction, we can use C-V

26 measurements on devices with differing mesa sizes to extract the magnitude and polarity of the background doping concentration. We tested this on a UID GaSb sample and a UID

10×10 InAs/AlSb T2SL, described in Section 2.6, at 295 K.

This polarity determination technique is based on two principles. The first is that the diode capacitance is proportional to the p/n junction area.

( ) �� = =

The second is that the effective capacitance of a p+/n− or n+/p− junction in series with the n−/n+ or p−/p+ junction is dominated by the p+/n− or n+/p− junctions. This is because the impedance of series-connected elements is dominated by the element of highest impedance. By design, the n−/n+ and p−/p+ junction has a low impedance, while the p+/n− or n+/p− junction has a high impedance that is primarily capacitive. In other words, we can assume for this analysis that the impedance of the minority junction (n−/n+ or p−/p+) does not affect the capacitance measurements.

To implement the technique, p-i-n devices are made with a double mesa architecture.

Depending on the polarity of the UID layer, the p/n junction is either located at the top contact/UID interface or at the UID/bottom contact interface. For instance, for a p-i-n

(p on n) device and a p-type UID layer, the p/n junction will be at the UID/bottom contact

(i-n, p−/n+) interface. Thus, the capacitance will vary with the bottom mesa radius and be independent of the top mesa radius (neglecting the capacitance of the top p+/p− junction).

Similarly, if the same p-type UID layer is in a n-i-p (n on p) architecture, then the p/n junction will be at the top contact/UID (n-i, n+/p−) interface, the capacitance will vary with the top mesa radius, and the capacitance will be independent of the bottom mesa radius

(neglecting the capacitance of the bottom p−/p+ junction). 27

This concept is illustrated through a simulation of the electric field in p-i-n and n-i-p diodes made with GaSb as shown in Figure 12. GaSb is known to be a residually p-type

29,37 39 material due to the high number of GaSb antisite defects . In diodes, the electric field is located within the depletion region, at the p/n junction. In the simulated p-i-n structure, the field is located within the bottom mesa, and in a n-i-p structure, the field is located within the top mesa.

Figure 12: Simulation results for electric field in GaSb p-i-n (a) and n-i-p (b) devices. The area and location of the high electric field (dark regions) depends on the mesa in which the p/n junction is contained.

The expected capacitance vs. radius data for the p-i-n and n-i-p GaSb structures simulated above is shown graphically in Figure 13(a). Figure 13(b) shows theoretical data for a structure of residually n-type material with otherwise equivalent structural and material properties. Depending on the residual doping type, capacitance should have no relationship with the chosen mesa area for one structure but should scale linearly with area

(quadratically with radius) in the other. Capacitance arising from surface effects would manifest as a mostly linear increase with radius, making surface effects separable from mesa area effects. While the polarity of the material can be concluded from a single growth

(either p-i-n or n-i-p), we did our experiments with both because of a limited number of mesa radii in our mask.

Figure 13: Theoretical capacitance vs. bottom mesa radius plots for fully depleted p-i-n and n-i-p structures, comparing results for (a) p-type and (b) n-type materials. For each structure, capacitance is dependent on one mesa size and independent of the other. Note that the top mesa radius cannot exceed the bottom mesa radius, limiting the data range.

2.5 Dual Junction Analysis

In the analyses described previously, a common assumption is that the results of the measurement are dominated by the p/n junction. However, in a p-i-n device, that may be too simple of a model. There are two junctions in these devices – between the top contact layer and the UID layer, and between the UID layer and the bottom contact layer. While the impedance of the p/n junction is greater than that of the other junction (n−/n+ or p−/p+, to be referred to as the minority junction), this second junction could potentially have nonnegligible effects. To determine the extent to which the minority junction affects the capacitance measurements, a new multi-junction impedance analysis was developed.

As described in Section 2.1, the impedance of a semiconductor junction is represented by a series resistor, plus a resistor and capacitor in parallel. For two junctions in series, the total device impedance can be represented by two of these models in series, as shown in

Figure 14.

CH RH,P

RH,S

CL RL,P

RL,S

Figure 14: Impedance model of a p-i-n device40.

The h and l subscripts indicate the high and low field junctions (or the p/n and minority junctions), and the s and p subscripts indicate series and parallel components. The total impedance of this model is described by the equations below.

1 1 1 1 � = � + � + + + + � � � �

�� = � + � + + � + � � + �

� ⁄�� ⁄�� = � + � + + ⁄ ⁄ � + 1 �� + 1 ��

� � � = � + � + + 1 + �� 1 + ��

However, trying to fit experimental data to this equation would produce non-unique solutions, for there is nothing in the equations that differentiates the low and high field components. To fix this, equations that relate junction area to impedance are utilized.

�� = � �� = � pL is treated as a single variable. These equations are substituted into the total impedance equation.

�� ∗ � �� ∗ � �� = + + + � � � ∗ � + �� ∗ � + ��

The areas of the junctions are known from the device geometry. If the polarity of the UID layer is not known, the analysis is still valid – no assumptions are made in the analysis about which junction is the p/n junction besides the parameter labels. After the substitutions, there are three parameters (Ah, Al, and �) and six unknowns (��, ��,

��, ��, �, and �) corresponding to the six circuit elements in the above circuit model.

Each unknown is theoretically constant with respect to area and frequency. After measuring the impedance of multiple devices of differing mesa sizes at a fixed voltage and varying frequencies, the six unknowns can be fitted to the experimental data.

As mentioned previously, capacitance measurements are just interpreted impedance measurements, and thus can be used to collect the impedance data for this analysis. Current measurements can determine the resistance, but not the reactance, and so would not be useful in this case. Some interpretation of the experimental data must be applied, however, as the parameter analyzer will report Cp and G instead of the total impedance. It does so by

32 using the parallel model, discussed previously, which assumes the total device impedance can be described by two components. However, the raw impedance values are needed to input the six component model. To retrieve these raw values, the total impedance of the two-component model is derived as

� − �� = � + � �

Plugging the reported Cp and G back into this equation produces the raw measured impedance values.

Initially, a common least-squares fitting algorithm was used to determine the six parameters. However, the low-frequency impedance was over two orders of magnitude greater than the high-frequency impedance, effectively making the algorithm prioritize fitting the low-frequency impedance. This yielded a poor fit at high frequencies. To remedy this error, a modified least-squares function was introduced. Instead of minimizing the function41

(�(�, ��) − ��)

By finding the optimal parameters x, the function was changed to

[log (�(�, ��)) − log (��)]

By using this logarithmic objective function, high frequency data is not deprioritized, leading to a more complete solution.

This analysis can also reveal the polarity of the UID layer by determining the location of the p/n junction, similarly to the method discussed in Section 2.4. The results should report that one depletion width is much greater than the other, and the parallel resistance

33 associated with that junction are much higher than the other. Both of these characteristics are indicative of a p/n junction, revealing the UID doping type.

This method is also capable of determining the optimal frequency for C-V measurements.

At different frequencies, different impedances dominate within the device, as can be in the equation for the six-circuit component model.

� � � = � + � + + 1 + �� 1 + ��

At very low frequencies, the total impedance is the sum of each of the four resistances.

Since the parallel resistances are typically much greater than the series resistances, they tend to dominate at these frequencies. At higher frequencies, the equations reduce to the following.

1 1 � = � + � + + ��

At very high frequencies, the latter two terms decay to zero, and the series resistances dominate. However, at intermediate frequencies, the capacitive impedances are greater than the series resistances, and thus dominate the total device impedance. It is these frequencies at which C-V measurements should be taken. This regime is typically identified by measuring the quality factor.

�� (�) = �

Maximizing the quality factor should reduce the potential for error, as it maximizes the reactance/resistance ratio. However, this equation for the quality factor is derived from the two component model. Identifying the optimal measurement frequency via the six-

34 component model includes more considerations, such as undesired capacitance from the minority junction.

2.6 Device Growth and Fabrication

Photodiodes are commonly used and studied today due to their applications in imaging, communications, LIDAR, sensing, and more. Infrared photodiodes are commonly used for environmental sensing (due to molecular signatures in the infrared), telecommunications

(due to low losses or dispersion42), and thermal imaging (due to the thermal emission of heat sources in the mid and long-wave IR). For the former two applications, superlattices are a developing technology that provide the potential for band structure engineering due to their many structural variables. Photodiodes are commonly grown in a p-i-n structure, as the low doping of the intrinsic layer creates large absorptivity.

Two sets of samples were grown to study material characteristics for photodetector applications. The first set was of p-i-n and n-i-p GaSb structures, grown on n-GaSb substrates by solid source molecular beam epitaxy (SSMBE). This material is of interest due to a previous study showing that GaSb has very high quantum efficiency in the near- infrared (NIR)43, making it attractive for potential telecommunications applications. A

1000 nm UID GaSb layer was grown between the 200 nm top contact and 500 nm bottom contact layers. Both contact layers were doped at 2 × 1018 cm−3.

The second set was of p-i-n and n-i-p 10×10 InAs/AlSb SL structures, grown on n-GaSb substrates by SSMBE. Band structure simulations indicated that this material could impact ionize and create gain with relatively low excess noise while detecting NIR light. These characteristics would make this material excellent for APDs. A 1000 nm UID SL layer was grown between 300 and 500 nm top and bottom contacts. Both contact layers were doped

35 at 2 × 1018 cm−3. A UID GaSb buffer layer was grown between the bottom contact and the substrate.

All four samples were fabricated into double mesa devices. Top and bottom contacts were formed by Ti (20 nm)/Au (200 nm) deposition by e-beam evaporator. A dry etch recipe involving BCl3 and Ar was used for the formation of shallow and deep mesas. For p-i-n devices, the average shallow and deep mesa depths were 340 nm and 1210 nm from the top, respectively. For n-i-p devices, the average shallow and deep mesa depths were

285 nm and 1264 nm from the top, respectively. The devices were SU-8 passivated.

Figure 15: Picture of the fabricated device array.

n-GaSb substrate n-GaSb substrate

Figure 16: Schematics of the GaSb devices (left) and the InAs/AlSb devices (right).

Table 1 outlines the mesa radii of the fabricated devices, and which structures were analyzed for this study.

Table 1. Combinations of top and bottom mesa radii for fabricated devices, and the analyses for which they were used. Unless otherwise noted, devices of all three bottom mesa sizes were analyzed for a given top mesa size. Analyzed For Background Doping Dual Junction Analysis Top mesa Bottom mesa Concentration and Polarity 20 µm InAs/AlSb p-i-n 20 µm 30 µm GaSb p-i-n (40 µm bottom mesa only) 40 µm 30 µm InAs/AlSb p-i-n 30 µm 45 µm GaSb p-i-n (60 µm double mesa only) 60 µm 40 µm GaSb n-i-p, 40 µm 60 µm InAs/AlSb p-i-n, InAs/AlSb p-i-n 80 µm InAs/AlSb n-i-p 50 µm GaSb n-i-p, InAs/AlSb p-i-n 50 µm 75 µm InAs/AlSb p-i-n, (75 µm and 100 µm 100 µm InAs/AlSb n-i-p double mesa only)

3. Results

3.1 GaSb

3.1.1 Background Doping Concentration

The GaSb samples described in Section 2.6 were brought to vacuum and measured at

295 K. Test setup parameters were chosen to maximize the quality factor of the C-V measurements. A moderate magnitude of 50 mV was chosen for the applied AC signal and yielded sufficiently low noise (<5 fF RMS). The measurement frequency chosen to be

1 MHz, yielding maximum quality factors over 25 for the InAs/AlSb p-i-n and almost 10 for the n-i-p samples (the InAs/AlSb data was collected before GaSb data due to sample availability). The voltage was swept from 1 V to -10 V with a hold (or integration) time of

500 ms and a delay time (time between measurements) of 100 ms. Data from the six GaSb p-i-n devices listed in Table 1 are reported below.

Figure 17: Raw capacitance and conductance data for the GaSb p-i-n devices. The numbers indicate the top and bottom mesa radii for different curves. The red and blue arrows indicate which device corresponds to which curve (the curve near the base of the arrow corresponds to the top device in the list, the end of the arrow corresponds to the bottom device in the list.

From this data, the depletion width and background doping concentration were calculated, arbitrarily choosing the top mesa area of the device as the p/n junction area. The quality factor was also calculated.

Figure 18: Unsmoothed doping concentration and quality factor data as a function of voltage for the GaSb p-i-n devices. 39

Taking the derivative of a discrete data set yielded very noisy data, as can be seen in Figure

18. Loess (Locally Estimated Scatterplot Smoothing) regression44 was implemented in

MATLAB to smooth the calculated background doping concentration, which produced the following plot. A span of 8% was used for the loess algorithm.

Figure 19: Loess-smoothed doping concentration and quality factor data for the GaSb p-i-n devices using the top mesa area as the active area. The numbers indicate the top and bottom mesa radii of the devices for the adjacent curves.

The plots show that the quality factor starts to diminish around -4 V, and falls below 3 at a bias of around -8 V. The more useful plot of doping vs depletion width is shown below for biases between -8 and 0 V.

Figure 20: Loess-smoothed doping concentration as a function of depletion width for the GaSb p-i-n devices using the top mesa area as the active area.

Each of the previous three graphs show an odd trend – the calculated doping concentration differs from device to device, which should not be the case for devices on the same sample.

However, devices with the same bottom mesa radius factor (1x, 1.5x, or 2x the top mesa radius) seem to be grouped together. To try to find an explanation for this, the data is reanalyzed assuming the p/n junction is in the bottom mesa, which changes the relevant areas in the calculations.

Figure 21: Loess-smoothed doping concentration and quality factor data for the GaSb p-i-n devices, now using the bottom mesa area as the active area.

Figure 22: Loess-smoothed doping concentration as a function of depletion width for the GaSb p-i-n devices, now using the bottom mesa area as the active area.

The calculated doping concentration now makes more sense, as all six devices are all approximately 8 × 1015 cm−3, particularly in regions where the data is least noisy. From

42 similar logic as in Section 2.4, this suggests that the p/n junction is in the bottom mesa for the p-i-n devices, and indicates the UID layer is p-type.

For the n-i-p devices, the devices were swept from -1 V to 3 V. In these devices the conductance started higher and increased sooner than for the p-i-n devices, as can be seen in Figure 23. This yields a very limited range of accurate data.

Figure 23: Raw capacitance and conductance data for the GaSb n-i-p devices. The 50 µm top mesa radius devices had very similar curves, as did the 40 µm top mesa radius devices.

Figure 24: Unsmoothed doping concentration and quality factor data as a function of voltage for the GaSb n-i-p devices. The blue arrow indicates which curve corresponds to which device (curve near the base of the arrow corresponds to the top device in the list, the end of the arrow corresponds to the bottom device in the list).

During analysis of this data the top mesa was assumed to contain the p/n junction, which would be accurate if the UID layer is p-type. In the very small region over which the quality factor is greater than 3, the background doping concentration is approximately

1.3 × 1016 cm−3. The location of the p/n junction provides a possible explanation of the difference in quality factors between the two structures – because the junction was buried in the bottom mesa for the p-i-n devices, surface effects did not have as large an impact on the conductivity.

3.1.2 Background Polarity Determination

Next, the same capacitance data was plotted as a function of device radius to try to identify the background doping polarity. Data from both p-i-n and n-i-p structures are shown in

Figure 25 for a -0.7 V bias, as the leakiness of the n-i-p devices rapidly degraded the measurement quality at higher voltages. The devices were not fully depleted at this bias, an essential condition – the parallel plate capacitor equation assumes both plates have equal areas, which would not be the case if these overetched double mesa structures were fully depleted.

Figure 25: GaSb p-i-n and n-i-p results with fitted curves. These graphs show that the capacitance is dependent on bottom mesa radius for the p-i-n structures, and the top mesa radius for the n-i-p structures. This indicates the material is p-type.

For the p-i-n GaSb devices, the capacitance scales quadratically with bottom mesa radius, but shows no dependence on top mesa radius, indicating that the p/n junction is in the bottom mesa. The n-i-p devices show no dependence with bottom mesa radius, but increases with top mesa radius, indicating that the p/n junction is in the top mesa. Both show that for GaSb, the measured capacitance is dependent on the area between the n-type and UID layers. This determines that the material is p-type, as expected.

p+ n+

p/n junction UID UID p- p- p/n junction

n+ p+

n-GaSb substrate n-GaSb substrate

Figure 26: Results of GaSb p-i-n and n-i-p graphical interpretation.

The measured capacitance is higher than the theoretical results shown in Figure 13 because the devices were not fully depleted, reducing the magnitude of the equivalent parallel plate separation.

3.2 InAs/AlSb

3.2.1 Background Doping Concentration

The 10×10 InAs/AlSb superlattice samples were tested as well. The same test conditions were used as with the GaSb devices except for the reverse bias range. The raw data of the selected six p-i-n devices are shown below in Figure 27.

Figure 27: Raw capacitance and conductance data for the InAs/AlSb p-i-n devices.

As for the previous set of samples, the background doping concentration was calculated by first arbitrarily assuming that the p/n junction is contained in the top mesa. This yielded the following plot of doping and quality factor vs voltage,

Figure 28: Unsmoothed doping concentration and quality factor data as a function of voltage for the InAs/AlSb p-i-n devices, assuming the top mesa area is the active area. 47

Similarly to the GaSb data, taking the derivative of the C-V data yields noisy results.

Smoothing the data with the same Loess algorithm yields the following plots of doping vs voltage and depletion width.

Figure 29: Loess-smoothed doping concentration and quality factor data for the InAs/AlSb p-i-n devices using the top mesa area as the active area.

The quality factor has a higher peak than the GaSb, but starts to diminish quicker, and falls below 3 at a bias of around -6 V. The more useful plot of doping vs depletion width is shown below for biases between -6 and 0 V.

Figure 30: Loess-smoothed doping concentration as a function of depletion width for the InAs/AlSb p-i-n devices using the top mesa area as the active area.

Again, the data seems to indicate that the devices have different background doping concentrations, but devices with the same bottom mesa radius factor are grouped together.

The analyses are repeated, this time assuming the p/n junction is contained in the bottom mesa.

Figure 31: Loess-smoothed doping concentration as a function of voltage for the InAs/AlSb p-i-n devices but assuming the bottom mesa area is the active area.

Figure 32: Loess-smoothed doping concentration as a function of depletion width, but assuming the p/n junction is in the bottom mesa. 50

Once again, the results with the new assumption that the bottom mesa area is the active area make much more sense. This suggests that the p/n junction is in the bottom mesa, and thus the is material is p-type. The background doping concentration is very similar for all devices, at approximately 3.8 × 1016 cm−3.

This same process is applied for the superlattice n-i-p devices. The raw data is shown in

Figure 33.

Figure 33: Raw capacitance and conductance data for the InAs/AlSb n-i-p devices.

Since the p-i-n results suggested the UID layer might be p-type, it was first assumed that the p/n junction might be in the top mesa for the n-i-p devices. With this assumption, the following plot of doping concentration and quality factor was obtained.

Figure 34: Unsmoothed doping concentration and quality factor data as a function of voltage for the InAs/AlSb n-i-p devices assuming the top mesa area is the active area.

After smoothing,

Figure 35: Loess-smoothed doping concentration as a function of voltage for the InAs/AlSb n-i-p devices assuming the top mesa area is the active area.

The two single mesa devices (top mesa radius equals the bottom mesa radius) have a significantly quality factor than the other four devices (each with larger bottom mesas than top mesas). Thus, the doping concentration was plotted for the full bias range for the single mesa devices, and at biases between 0 and 4 V for the others.

Figure 36: Loess-smoothed doping concentration as a function of depletion width for the InAs/AlSb n-i-p devices assuming the top mesa area is the active area.

The doping concentrations for these devices surprisingly do not all match. The small bottom mesa devices are separated from the other four devices. The analyses were repeated using the bottom mesa area as the active area to see if this condition creates a better match..

Figure 37: Loess-smoothed doping concentration as a function of voltage for the InAs/AlSb n-i-p devices assuming the bottom mesa area is the active area.

Figure 38: Loess-smoothed doping concentration as a function of depletion width for the InAs/AlSb n-i-p devices assuming the bottom mesa area is the active area.

Clearly, with this assumption, the mismatch is even greater. So if the junction is contained in the top mesa, as we expected, why is the calculated doping concentration of the double mesa devices approximately 6 × 1015 cm−3, but almost double that for the single mesa devices? It is perhaps related to the difference in quality factors. The lower the quality factor, the greater the potential error, and the double mesa devices have much lower quality factors than the single mesa devices for this sample. The reason for the difference in quality factors in this case is unknown.

3.2.2 Background Polarity Determination

The background doping polarity determination method was applied to both the p-i-n and n-i-p samples. The unintentional doping polarity of this material was not known, for while

InAs is n-type29,37,45 and AlSb is p-type46, it was unclear which dominates in 10×10 superlattice material37,38. A bias of 3 V was chosen for comparison. This higher bias was possible because the devices were less leaky than the GaSb devices and had higher quality factors. Any voltage between 0 and 3 V would also have been a legitimate choice. The results for this material are shown in Figure 39.

Figure 39: 10×10 InAs/AlSb results with fitted curves. Both structures indicate that the material is p-type.

For the p-i-n devices, the capacitance scales quadratically with bottom mesa radius, but shows no dependence on top mesa radius, indicating that the p/n junction is in the bottom mesa. The n-i-p devices show no dependence with bottom mesa radius, but increases with top mesa radius, indicating that the p/n junction is in the top mesa. Both show that the measured capacitance is dependent on the area between the n-type and UID layers. This results determines that 10×10 InAs/AlSb UID material is p-type, and the p-type AlSb dominates over the n-type InAs. The n-i-p devices depleted more quickly than the p-i-n devices, increasing the charge separation, explaining why the n-i-p capacitance is lower than the p-i-n capacitance. While it has been shown that temperature can flip the polarity in superlattices26, preliminary results on the InAs/AlSb n-i-p devices show that the material is still p-type at 8 K and 77 K.

3.2.3 Dual Junction Analysis

The dual junction analysis was applied next. The InAs/AlSb p-i-n sample was chosen for this analysis since it had highest quality factors of the four available samples. Seven devices of varying mesa sizes were tested, and are described in Table 1.

A C-f sweep for each device was measured for one hundred frequencies logarithmically spaced from 1 kHz to 5 MHz. Phase, open, and short calibrations were measured at each frequency prior to the sweep. A -5 V bias was chosen so that the depletion region was large, but not quite fully depleted, and the conductance was still low.

MATLAB was used for the data analysis and fitting. The first fitting function used was lsqcurvefit, which uses the interior-reflective Newton algorithm41. However, possibly due to the nonlinearity of the minimizing equation, the output was highly dependent on the specified initial conditions, and often would just output them as the solution. The next function tried was fminsearch, which uses the Nelder-Mead simplex algorithm47, and does not use gradients to find the minimum like the previous function. fminsearch also gives the user more control over the minimization objective and conditions. This function was much more successful and resilient to initial conditions. As noted previously, the results were further improved by adding a logarithmic scaling, such that the minimization condition was

[log (�(�, ��)) − log (��)]

Instead of

(�(�, ��) − ��)

This improves the fit when the data ranges over multiple orders of magnitude, as in the data collected. The outputted values are shown in Table 2.

Table 2: The dual junction analysis fitting results for the InAs/AlSb p-i-n devices.

Top mesa Bottom mesa

Charge separation (nm) 3.03 54.2

Parallel resistivity-length .0016 .0112 product (Ω-m2)

Series resistivity-length 8.27×10-6 1.34×10-6 product (Ω-m2)

When applied to a 50 µm radius single mesa device, these results translate to the circuit model components noted in Table 3. Figure 41 displays the measured and fitted results.

Table 3: Fitted impedance model components for a 50 µm single mesa InAs/AlSb p-i-n device. Top mesa Bottom mesa

Capacitance (pF) 259 14.4

Parallel resistance (Ω) 2.04×105 1.43×106

Series resistance (Ω) 1053 171

A validity check is the plausibility of the outputs. The charge separation of the p/n junction,

54 nm, is about 18 times greater than that of the p+/p- junction. While the value is lower than expected, the ratio between the two is feasible. The parallel resistivity-length product of the p/n junction is about 10 times greater than the other junction, at about 0.011 Ω-m2.

For a 50 µm radius single mesa device, this translates to a parallel resistance about 1.4 MΩ, 58 which is reasonable. Lastly, the series resistivity-length product of the p/n junction is about

1/6th as large as the other junction, at about 1.34×10-6 Ω-m2. Given the same 50 µm device, this is a series resistance of about 171 Ω. While this is higher than desired, the relationship is still feasible – the top mesa should have larger series resistance due to the smaller mesa area and the much smaller top contacts.

Figure 40: The fitted (dashed) and measured (dotted) real components of the impedance for InAs/AlSb p-i-n devices.

Figure 41: The fitted (dashed) and measured (dotted) imaginary components of the impedance for InAs/AlSb p-i-n devices.

The figures show the strengths and weaknesses of both fits. The outputted values fit the real data well in the transition region (~30 kHz to 700 kHz) but are lacking outside of this region, particularly at very high frequencies. The imaginary data is fitted extremely well at frequencies above the corner frequency, but is less accurate below that frequency. To examine where the model could be failing, the real and imaginary components of the model are separated.

� � � = � + � + + 1 + �� 1 + ��

� � � = � + � + + 1 + (��) 1 + (��)

−�� −�� = + 1 + (��) 1 + (��)

The real impedance is dominated by the series resistances at high frequencies, while the imaginary impedance is unaffected by them. The fact that the real data is poorly fitted at high frequencies but the imaginary data is tightly fitted indicates that the series resistance is a source of error in the analysis. This could be explained if there was a varying component of series resistance, perhaps due to contact resistance. The probes do not interface with the contacts exactly the same for each measurement, potentially leading to nonideal variations.

Closer investigation of the imaginary data fitting reveals the single mesa devices have elbow frequencies greater than what is fitted, while the double mesa devices have elbow frequencies less than what is fitted. This indicates a second-order effect contributing to the resistance and/or capacitance of the double mesa devices, potentially due to their geometry

– the corner between the top mesa sidewall and the bottom mesa top surface could affect the device impedance.

The total impedance of both junctions was plotted as a function of frequency to see how they compare in magnitude.

Figure 42: Impedances of both junctions for a 50 µm single mesa InAs/AlSb p-i-n device. As expected, the impedance of the n+/p- junction dominates that of the p+/p- junction by about an order of magnitude throughout the displayed frequency range. This indicates that for future measurements on this particular sample, it is fair to assume that the effects of the secondary junction are negligible.

As noted previously, this analysis is also capable of determining the range of optimal capacitance measurement frequencies for a given device. Consider a graph of the six impedances in the equivalent circuit model as a function of frequency, using the fitted data applied to the 50 µm device noted previously.

Figure 43: Plot of fitted individual impedances as functions of frequency for a 50 µm single mesa InAs/AlSb p-i-n device.

Cn+/p- Rparallel, n+/p-

Rseries, n+/p-

Cp+/p- Rparallel, p+/p-

Rseries, p+/p-

Figure 44: The six p-i-n impedance circuit model components, as in Figure 14, but for the specific case of a residually p-type UID layer40.

For this application, the graph contains more information than desired. When trying to measure C-V curves, the only important information is how the p/n junction capacitance impedance relates to the p/n junction parallel resistance and the total series resistance. To simplify, the three p+/p- components and the n+/p- series resistance can be reduced into a single term, as shown in the simplification from Figure 44 to Figure 45.

Cn+/p- Rparallel, n+/p-

Zseries, total

Figure 45: A reduced p-i-n impedance circuit model40.

Where

� � / / � = � + � + / / � + � / /

Figure 43 thus reduces to Figure 46.

Figure 46: Plot of fitted and reduced impedances as functions of frequency for a 50 µm single mesa InAs/AlSb p-i-n device.

There are three main regimes in this graph. In the low frequency regime, below approximately 8 kHz, the parallel conductivity is the dominant impedance. In the high frequency regime, above 5 MHz (just outside the graph), the total series resistance is the dominant impedance. The middle regime is where the capacitive impedance dominates, and is where capacitance measurements should reside. The best frequency for measurements at this particular bias appears to be around 200-400 kHz, where the capacitive impedance is much less than the parallel resistance, and approximately where the series resistance begins leveling out. However, these C-f measurements were taken at

-5 V, close to full depletion for the devices. Full C-V sweeps would measure capacitances

65 much larger than at this bias, since the zero bias capacitance is larger than the reverse bias capacitance. Capacitance and capacitive impedance are inversely related, so the optimal frequency for full C-V sweeps would be slightly lower than the frequency than the 200-

400 kHz noted above due to the earlier onset of series resistance effects.

The quicker, more common method for determining which frequency to use for measurements is to consider the quality factor, which is based on the parallel model, as a function of frequency.

Figure 47: A graph of measured quality factor vs. frequency for multiple InAs/AlSb p-i-n devices.

The quality factors shown in Figure 47 indicate that 600 kHz to 1.2 MHz are optimal at this bias, higher than the frequency suggested by the dual junction analysis. The simplifications of the parallel model cause an overestimate of the optimal frequency.

3.3 Conclusions and Future Work

This research has shown the value of capacitance measurements in the characterization of background doping concentration, depletion width, built-in voltage, series resistance, and defects in p-i-n devices. Four sets of samples – p-on-n and n-on-p structures of GaSb and

10×10 InAs/AlSb – were characterized using some of the procedures described.

A novel method for determining the background doping polarity of materials on conductive substrates was explained. Using this method, it was shown that GaSb and 10×10 InAs/AlSb are both residually p-type. This technique can be used at any temperature to assess changes in the UID, but the decreased number of ionized dopants at low temperatures may introduce challenges. The background doping type of most bulk materials are already known, but the ongoing development of superlattice materials provides a usage case for this analysis.

A method for analyzing both the p/i and i/n junctions in p-i-n devices was also presented, and was used to extract series resistance, parallel resistance, and capacitance of both junctions in a p-i-n 10×10 InAs/AlSb sample. It was shown that for this sample, the assumption that the p/n junction dominates the device impedance is valid. The analysis also determined that the optimal frequency for C-V measurements on this sample was approximately 300 kHz, and that the normal method of using the measured quality factor to determine this frequency produces an overestimate. The fits were lacking in two main respects – first, at high frequencies, large variations in series resistance yielded a poor fit

67 to these components. Secondly, there were inconsistencies in the corner frequencies of different devices, where single mesa devices tended to have a larger corner frequency than double mesa devices. Neither of these effects were predicted by the model. Also, the p/n junction capacitance predicted by the model was much larger than what was found from a typical parallel-model C-V measurement. Future work starts with resolving these issues.

To increase the consistency of the measured series resistance in future measurements, more attention will be paid to the probe connections. Instead of using continuously variable temperature (CVT) probes, which flex upon contact with the pad metal48, normal inflexible probes will be used. These dig into the metal, creating a better and more consistent contact.

To understand the trend in corner frequencies, a more complex model should be developed that accounts for surface effects and corner effects for double mesa devices. Testing a larger number of devices will also help draw conclusions about the strength and consistency of this effect. The improved model should also make the differences between the simple model and the complex model more reasonable. The inclusion these second-order effects should tighten the fitting of the low-frequency data, which would likely lead to a more realistic conclusion of the actual p/n junction capacitance.

During the thesis defense, we discussed the possibility of using a Schottky barrier as opposed to a PN junction to measure the background doping. At this point, the effects of contacts have not been incorporated and it was assumed that the contacts are Ohmic.

Preliminary transmission line method (TLM) measurements suggest that one contact is a

Schottky contact, which would introduce an additional voltage drop to be considered. The built-in voltage of the contact can be measured by dark current, photocurrent, or C-V

68 techniques as described by Schroder2, and subtraction of this voltage from the applied voltage yields the total voltage seen by the diode.

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Appendix A. Dual Junction Analysis Fitting Code main.m

% Reads Cf data in from a folder of text files, does fminsearch fitting clear clc close all

%File info dir_to_search = ''; %folder where text files are located filename = 'CfData.xlsx'; %file name to write to

%Settings writefile = 0; %write data to specified file? yes/no deviceshape = 1; %1 for circular, 2 for square detectarea = 1; %search file name for detector area? yes/no defaultdimension = 100; % if detectarea == 0 (in microns - diameter or side length) epsilon = 11.27*8.85*10^-12; %change for different materials, 14.4 for GaSb q = 1.6*10^-19; %constant

%check if output file exists if exist(strcat(dir_to_search,'/',filename), 'file')==2 x = input('File already exists, do you want to delete and replace file? Enter 1 for "yes"\n'); if (x==1) delete(strcat(dir_to_search,'/',filename)); else writefile = 0; end end

%read in file info txtpattern = fullfile(dir_to_search, '*.txt'); dinfo = dir(txtpattern);

%find number of files datacolumns = length(dinfo); largestf = 0; %initialize %Read text files into cells 73 for x = 1 : datacolumns thisfilename = fullfile(dir_to_search, dinfo(x).name); %just the name datacells{x} = importdata(thisfilename); datastructs(x) = datacells{x}; %Find largest data file temp1 = size(datastructs(x).data,1); if (temp1 > largestf) largestf = temp1; end end

%initialize matrices and cells Cp = zeros(largestf, datacolumns); G = zeros(largestf, datacolumns); freq = zeros(largestf, datacolumns); capheaders = cell([1 datacolumns]); Gheaders = cell([1 datacolumns]); topdimension = zeros(1, datacolumns); bottomdimension = zeros(1, datacolumns); topsuffixlocation = zeros(1, datacolumns);

%make voltage, capacitance, Q matrices, plus table for excel sheet for x = 1 : datacolumns capheaders{1,x} = dinfo(x).name(1:end-4); Gheaders{1,x} = dinfo(x).name(1:end-4); for y = 1 : length(datastructs(x).data) freq(y,x) = datastructs(x).data(y,1); Cp(y,x) = datastructs(x).data(y,2); G(y,x) = datastructs(x).data(y,3); end end

%extract area from file name if (detectarea == 1) for x = 1:datacolumns %find top mesa radius tempstring = dinfo(x).name; aperlocations = strfind(tempstring, 'aper'); %look for suffix if isempty(aperlocations) aperlocations = strfind(tempstring, 'um'); %look for suffix end topsuffixlocation(x) = aperlocations(1); %suffix location transitionindex = strfind(tempstring, '_'); %look for all prefixes distances = topsuffixlocation(x) - transitionindex; %array of distances between suffix and prefix mindistance = min(distances(distances>0)); %find minimum positive topdimension(x) = str2double(cell2mat(extractBetween(tempstring, topsuffixlocation(x) - mindistance + 1, topsuffixlocation(x) - 1))); %parsed diameter

%find bottom mesa radius 74

if (contains(tempstring,'half')) bottomdimension(x) = 1.5*topdimension(x); elseif (contains(tempstring,'double')) bottomdimension(x) = 2*topdimension(x); else bottomdimension(x) = topdimension(x); end end else for x = 1:datacolumns %if not searching for the dimensions topdimension(x) = defaultdimension; bottomdimension(x) = defaultdimension; end end

%convert dimension to area if (deviceshape == 1) toparea = ((10^-6*topdimension./2).^2)*3.14; % A = pi*(R^2) bottomarea = ((10^-6*bottomdimension./2).^2)*3.14; elseif (deviceshape == 2) toparea = (10^-6*topdimension).^2; % A = x^2 bottomarea = (10^-6*bottomdimension).^2; end

% Z = R+jX = 1/Y = 1/(G+jB) %Capacitance results B = 2*pi*(freq.*Cp); % B = susceptance Rp = 1./G; Rs = G./((G.^2)+(B.^2)); react = -1*B./((G.^2)+(B.^2)); % X = Reactance, variable name already taken Cs = -1./(2*pi*(freq.*react)); Z = Rs + j*react;

% Fitting % coeff(1) = dH % coeff(2) = dL % coeff(3) = pLH % coeff(4) = pLL % coeff(5) = pLser % ydata = Z = Rs + jX

%initialize lintop = []; linbottom = [];

%reshape 100 by x matrix to 100*x by 1 array of frequencies linfreq = reshape(freq, [numel(Z),1]); %create 100*x by 1 array of top and bottom areas for count = 1:size(freq,2) lintop = vertcat(lintop,repmat(toparea(count),size(freq,1),1)); linbottom = vertcat(linbottom,repmat(bottomarea(count),size(freq,1),1)); 75 end matbottom = reshape(linbottom, [size(freq,1), size(freq,2)]);

%reshape Z data into 700x1 array ydata = reshape(Z,[numel(Z),1]); %Send variables to minimization equation minimizethis = @(coeff) Z_funct3(coeff,linfreq,lintop,linbottom,epsilon,ydata);

%initial conditions coeff0 = [1e-7, 1e-8, 1e-2, 2e-3, 1e-6, 5e-6];

%Display plot with initial conditions guess = 0; if (guess==1) guessed_data = reshape(Z_funct(coeff0,0,linfreq,lintop,linbottom,epsilon), [size(freq,1), size(freq,2)]); else guessed_data = zeros([size(freq,1), size(freq,2)]); end

%Do minimization [coeff_solved,res] = fminsearch(minimizethis,coeff0); %Reshape the fitted data fitted_data = reshape(Z_funct(coeff_solved,0,linfreq,lintop,linbottom,epsilon), [size(freq,1), size(freq,2)]);

%Do many fits with many different initial conditions, find minimum sweepfit = 0; %yes/no %lower and upper bounds - just for ICs, not results lower = [5e-8, 1e-10, 1e-4, 1e-7, 1e-9, 1e-9]; upper = [5e-6, 5e-7, 1e-0, 1e-2, 1e-4, 1e-4]; steps = 5; %number of steps in between upper and lower bounds co1 = logspace(log10(lower(1)),log10(upper(1)),steps); co2 = logspace(log10(lower(2)),log10(upper(2)),steps); co3 = logspace(log10(lower(3)),log10(upper(3)),steps); co4 = logspace(log10(lower(4)),log10(upper(4)),steps); co5 = logspace(log10(lower(5)),log10(upper(5)),steps); co6 = logspace(log10(lower(6)),log10(upper(6)),steps); counter = 0; minres = 1e20; %initialize residuals = zeros([steps^5, 1]); %keep track of residuals for each case if (sweepfit==1) for count1 = 1:steps for count2 = 1:steps for count3 = 1:steps for count4 = 1:steps for count5 = 1:steps for count6 = 1:steps %Find best fit coeffin = [co1(count1) co2(count2) co3(count3) co4(count4) co5(count5) co6(count6)]; 76

[x,res] = fminsearch(minimizethis,coeffin); counter = counter+1; residuals(counter) = res; percentdone = 100*counter/(steps^6) if (res < minres) minres = res; bestcoeff = x; bestinput = coeffin; end end end end end end end %minimize again using final results [x,res] = fminsearch(minimizethis,bestinput); fitted_data = reshape(Z_funct(x,0,linfreq,lintop,linbottom,epsilon), [size(freq,1), size(freq,2)]); end

%send results to plotting function plotdata(Z,fitted_data,guessed_data,freq,matbottom)

Zfunct3 function F = Z_funct3(coeff,linfreq,lintop,linbottom,epsilon,ydata) % Fitting % Two series resistances, one for each junction % Z = (pLser/AL) + (pLph*dH/(dH*AH+j*w*epsilon*AH*pLH)) + (pLpl*dL/(dL*AL+j*w*epsilon*AL*pLpl)) % coeff(1) = dH % coeff(2) = dL % coeff(3) = pLph % coeff(4) = pLpl % coeff(5) = pLsh % coeff(6) = pLsl % ydata = Z = Rs + jX % lintop = AL % linbottom = AH % linfreq = w co1 = coeff(1); co2 = coeff(2); co3 = coeff(3); co4 = coeff(4); co5 = coeff(5); co6 = coeff(6);

Zcalc = log10((co5./linbottom) + (co6./lintop) + (co3.*co1./(co1.*linbottom+j.*linfreq.*epsilon.*linbottom.*co3)) + (co4.*co2./(co2.*lintop+j.*linfreq.*epsilon.*lintop.*co4))); Zmeas = log10(ydata); % Z = (pLser/AL) + (pLH*dH)/(dH*AH+j*w*epsilon*AH*plH) + (pLL*dL)/(dL*AL + j*w*epsilon*AL*pLL) temp = Zcalc-Zmeas; F = sum(abs(temp).^2); end