EEE 531: Semiconductor Device Theory I
Instructor: Dragica Vasileska
Department of Electrical Engineering Arizona State University
Topics covered: 1. Introduction to MOSFET operation
EEE 531: Semiconductor Device Theory I 1. Introduction
• Firs proposal for a MOSFET 5 Critical Dimension
] Cell Edge
device was given by s r e t
Lilienfeld and Heil in 1930. e
m 1 o r
• First operational device was c i m [
made in 1947 at Bell Labs. n o i
• Since then, the MOSFET s n e
m 0.1
dimensions have been con- i D
tinuously scaled to achieve 0.05 1990 1995 2000 2005 2010 more functions on a chip. yYeear r
FFrroomm S SIAIA r rooaaddmmaapp f foorr sseemmicicoonndduuccttoorrss ( (11999977))
EEE 531: Semiconductor Device Theory I • MOSFET is a four-terminal device. Basic device configura- tion is illustrated on the figures below. Side-view of the device Top-view of the device
Basic device parameters: channel length L channel width W oxide thickness d junction depth r ox substrate dopingj N A EEE 531: Semiconductor Device Theory I • There are basically four types of MOSFETs: (a) n-cnannel, enhancement mode device G I S D D symbol n+ n+ p-type SC V V G T (b) n-cnannel, depletion mode device G S D I symbol D n+ n+ p-type SC V V G T
EEE 531: Semiconductor Device Theory I (c) p-cnannel, enhancement mode device I G D V S D T V symbol G p+ p+ n-type SC
(d) p-cnannel, depletion mode device I G D S D V symbol T V G p+ p+ n-type SC
EEE 531: Semiconductor Device Theory I • The role of the Gate electrode for n-channel MOSFET:
VV == 00 source drain GG
VV >> VV source drain GG TT
Positive gate voltage does two things: (1) Reduces the potential energy barrier seen by the electrons from the source and the drain regions. (2) Inverts the surface, and increases the conductivity of the channel. EEE 531: Semiconductor Device Theory I • The role of the Drain electrode for n-channel MOSFET:
dn/dE VV == 00,, VV >> 00 GG DD dn/dE source E Large potential barrier allows only few C electrons to go from the source to the drain drain (subthreshold conduction) dn/dE VV >> VV ,, VV >> 00 GG TT DD dn/dE source E Smaller potential barrier allows a large drain C number of electrons to go from the source to the drain
EEE 531: Semiconductor Device Theory I • Qualitative description of MOSFET operation: G ((aa)) VV >> VV, , VV >> 00 ((ssmmaalll)) S D GG TT DD Variation of electron density n+ n+ along the channel is small: p-type SC I D VD
G ((bb))VV >> VV,, V V >> 00 ((llaarrggeerr)) S D GG TT DD + + Increase in the drain current n n reduces due to the reduced conductivity of the channel at p-type SC the drain end.
EEE 531: Semiconductor Device Theory I G ((cc))VV >> VV,, V V == VV --VV S D GG TT DD GG TT n+ n+ Pinch-off point. Electron density at the drain-end of the p-type SC channel is identically zero.
G ((dd))VV >> VV,, V V >> VV --VV S D GG TT DD GG TT n+ n+ Post pinch-off characteristic. L The excess drain voltage is dropped across the highly re- p-type SC sistive pinch-off region deno- ted by L.
EEE 531: Semiconductor Device Theory I • IV-characteristics (long-channel devices):
I D
(c) (d) Linear (b) region
Saturation (a) region V D
EEE 531: Semiconductor Device Theory I 17 3 N A 810 cm , dox 3 nm VG 0.8 V, VD 20 mV, VT 0.33 V ] V e [ c E
d n a b
n o i t c u d n
o drain C source
D i st an ce [ m ] [m] Distance EEE 531: Semiconductor Device Theory I VG 0.8 V, VD 20 mV Accumulation of carriers Surface inversion ] 3 - m [
y t i s
n drain e d
n o
r source t c e l E
m] [ ce Dista tan nce is [m] D
EEE 531: Semiconductor Device Theory I VG 0.8 V, VD 0.2V, VT 0.33 V
Negating effect of the drain ] 3 - m [
y t i s
n drain e d
n o r t
c source e l E
m] Dis [ tance ce [m tan ] Dis
EEE 531: Semiconductor Device Theory I VG 0.8 V, VD 0.56V, VT 0.33 V ] V e [ c E
d n a b
source n o i t c u d
n drain ] o m
C [ ce n ta is Distance [m] D
EEE 531: Semiconductor Device Theory I VG 0.8 V, VD 0.56V, VT 0.33 V ] 3 - m [
y t i s n e d drain n o r t source c e l E
m] [ ce an Dista ist nce [m] D
EEE 531: Semiconductor Device Theory I VG 0.8 V, VD 0.9V, VT 0.33 V
Pinched-off
] channel 3 - m [
y t i s n
e drain d
n o r
t source c e l E
m] [ e D nc istance sta [m] Di
EEE 531: Semiconductor Device Theory I VG 0.8 V, VD 1.56V, VT 0.33 V
3D View Contour plot
0.1 ] V e [
c 0.08 E
d
n 0.06 a b
n source o i 0.04 t ] c
u m d [ n 0.02 o e C c n drain a t 0 Distanc is 0 0.05 0.1 0.15 e [m] D Distance [m]
EEE 531: Semiconductor Device Theory I VG 0.8 V, VD 1.56V, VT 0.33 V
Pinched-off channel ] 3 - m [
y t i s n e d
n drain o r t c e
l source E
] [m D ce istance [ tan m] Dis
EEE 531: Semiconductor Device Theory I EEE 531: Semiconductor Device Theory I
Instructor: Dragica Vasileska
Department of Electrical Engineering Arizona State University
Topics covered:
2. Gradual channel approximation for current calculation (A) square-law theory (B) bulk-charge theory (C) transconductance, output conductance and series resistance (D) limitations of the two models EEE 531: Semiconductor Device Theory I 2. Gradual channel approximation
• This model is due to Shockley. • Assumption: The electric field variation in the direction parallel to the SC/oxide interface is much smaller than the electric field variation in the direction perpendicular to the interface: z G W x S D oxide y n+ n+ L dF dF x y p-type SC dx dy
EEE 531: Semiconductor Device Theory I • Recall the expressions for the threshold voltage for real MOS capacitor: 1 Gate voltage: VT 2F 2qN Aks0 2F VFB Cox Q 1 Qit f Qot Qm Flat band voltage: VFB MS ot m q Cox Cox Cox Cox • Beyond the point that determines the onset of strong inversi- on ( =2 ), any excess charge on the gate balanced with s F excess charge in the semiconductor, is given by: QG QB QN Ctot VG VT QN Cox VG VT QB QB QB s QB 2F • Based on how we consider Q , we have: B (A) Square-law theory: Q = 0 B (B) Bulk-charge theory: Q 0 B EEE 531: Semiconductor Device Theory I (A) Square-law theory • The charge on the gate is completely balanced by Q (x), i.e: N QN (x) Ctot VG VT V (x)
V = 0 S E V(x) FS V x D E x=0 C E = E - V • Total current density in the channel: FD FS D dn dV J qn F(x) qD qn n n n dx n dx negligible Note: Total current density approximately equal to the electron current density (unipolar device).
EEE 531: Semiconductor Device Theory I • Integrating the current density, we obtain drain current I : D
W yc (x) dV I dz dy qn(x, y) (x, y) D n 0 0 dx dV yc (x) W qn(x, y)n (x, y)dy dx 0 Q(x) N eff High-resolution transmission electron micrograph of the interface dV between Si and SiO Q (x) W 2 N eff dx (Goodnick et al., Phys. Rev. B 32, p. 8171, 1985) dV 2.71 Å 3.84 Å C W V V V (x) ox eff G T dx
EEffffeeccttiivvee eelleeccttrroonn mmoobbiilliittyy,, iinn wwhhiicchh i inntteerrffaaccee--rroouugghhnneessss iiss ttaakkeenn i innttoo aaccccoouunntt..
EEE 531: Semiconductor Device Theory I • The role of interface-roughness on the low-field electron mobility: Phonon Coulomb
1500 (aN + bN )-1 400 s depl ] ] s s -
- -1/3
V N
V 300 / s 1000 17 3 / 2 N 7 10 cm A 2 m m c c [ [
200
y experimental data y t i t l i 500 uniform i l i b
b step-like (low-high) o
o retrograde (Gaussian) M M 0 100 1015 1016 1017 1018 1012 1013 Doping [cm-3] Inversion charge density N [cm-2] s Interface-roughness
BBuullkk ssaammpplleess SSiiiinnvveerrssiioonn l laayyeerrss
EEE 531: Semiconductor Device Theory I • The experimentally observed universal mobility behavior is due to the dominant surface-roughness influence on the low- field electron mobility under strong inversion conditions. • Various models proposed for the variation of the effective transverse electric field upon the inversion (N ) and deple- s tion (N ) charge density: depl
Stern and Howard: F 11 N N eff 32 s depl
Matsumoto and Uemura: Feff 0.5Ns Ndepl Krutsick and White:
EEE 531: Semiconductor Device Theory I • There are several empirical expressions for the effective field dependence of the low-field electron mobility: Effective-field dependence: 1105 342 , n,eff 0.657 p,eff 0.617 1 Feff / 30.5 1 Feff /15.4 Gate-voltage dependence: 0 n,eff , 0.02 0.08 1/V 1 (VGS VT ) • Universal mobility eff N N N behavior: A3 A2 A1
N A1 N A2 N A3
Feff EEE 531: Semiconductor Device Theory I • We now use the conservation of current argument, to get: V L D IDdx Weff Cox VG VT V (x) dV 0 0 W C I eff ox V V V 1V 2 , for V V V D L G T D 2 D D G T • This last result represents the expression for the current, valid up to the pinch-off point. • The current expression beyond the pinch-off point, at which
VD VG VT QN (L) 0 is obtained by construction, to give: W C I eff ox V V 2, for V V V D 2L G T D G T
EEE 531: Semiconductor Device Theory I (B) Bulk-charge theory • Square-law theory assumes that excess Q is solely balanced G by Q , and that W=W =const. along the channel. N T • The violation of this assumption is clearly shown on the figure below:
17 3 N A 810 cm , dox 3 nm VG 0.8 V, VD 1.56 V, VT 0.33 V ] m [
h t p e D
source drain
Length [m] EEE 531: Semiconductor Device Theory I • Taking into account the contribution by the bulk charges, the more exact electron density is given by: QN (x) Cox VG VT V (x) QB (x) where: QB (x) qN A W (x) WT 2k 2k s 0 s 0 W (x) 2F V (x) , WT 2F qN A qN A • Following the same steps as in the square-law theory, we get: W C 3/ 2 eff ox 2 V 3V I V V V 1V 4V 1 D 1 D D L G T D 2 D 3 W F 2 4 F F 2k qN 2 s 0 A F WT qN A VW Cox Cox
EEE 531: Semiconductor Device Theory I • The pinch-off voltage V , is obtained from the condition Dsat that Q (L)=0, which gives: N 2 V V V V V V V V G T 1 W 1 W Dsat G T W 2 4 4 F F F • Comparison between the two theories: I D Square-law
N increaAsing Bulk charge V D
EEE 531: Semiconductor Device Theory I (C) Transconductance, drain conductance, series resistance • Using square-law theory and for small V , we get: D W C I eff ox V V V D L G T D W C I D eff ox transconducance: gm VD VG L VD const. I W C D eff ox drain conductance: gd VG VT VD L VG const. • For large values for V , we get: D W C g eff ox V V , g 0 m L G T d
EEE 531: Semiconductor Device Theory I • The simplified low-frequency and high-frequency MOSFET small-signal equivalent circuits are shown below: i i d C d G D G gd D g v v m gs r v v C r v gs d ds gs gs g v d ds m gs S S Low-frequency High-frequency
• The cut-off frequency (frequency for which the short-circuit current gain equals one) is given by: g 1 L f m , t T tr 2 Cgs Cgd 2ttr veff
Transit time of the electrons in the channel
EEE 531: Semiconductor Device Theory I • Assumption made in the previous derivations is that the entire voltage drop is across the channel. • In real devices, both the drain and the source resistances R d and R may play an important role, thus limiting the device s performance.
V DS V V R I V GS G s D GS VDS VD Rs Rd I D oxide n+ R R n+ S D
p-type SC
EEE 531: Semiconductor Device Theory I • These series resistances modify the transconductance and the output conductance:
I D gm0 gm VG 1 gm0Rs gd 0 (Rs Rd ) VD const. I D gd 0 gd VD 1 gm0Rs gd 0(Rs Rd ) VG const.
Transfer characteristic Output characteristic I D I R =R =0 D s d V R =R =0 G3 s d R 0 s R 0 d V G2 V G1 V V G D EEE 531: Semiconductor Device Theory I (D) Limitations of the square-law and bulk-charge theories: (1) They do not include the subthreshold region. (2) Both theories do not self-saturate. One must obtain the post-pinch off characteristics by construction. (3) The exact charge model self-saturates and naturally includes the subthreshold.
EEE 531: Semiconductor Device Theory I EEE 531: Semiconductor Device Theory I
Instructor: Dragica Vasileska
Department of Electrical Engineering Arizona State University
Topics covered: 3. MOSFET subthreshold characteristics
EEE 531: Semiconductor Device Theory I 3. Subthreshold characteristics • Above threshold current is governed by the channel resistance. Drift current dominates. • Below threshold current is barrier limited. Diffusion current dominates. • Recall PN junctions: Current depends exponentially on the applied bias the excess minority carrier density at the edge of the SCR depends exponentially on the applied voltage. • MOSFETs appear to have the same problem electrons injected into the channel from the source also become minority carriers and need to climb a potential barrier. The important point in MOSFET operation is that the gate electrode eliminates this barrier. Only in subthreshold the barrier will play significant role in limiting the current flow in the device.
EEE 531: Semiconductor Device Theory I G S D x n+ n+ p-type SC y
Accumulation condition EF
Depletion condition: EF • small inversion charge • small drain current • slight potential gradient from source to drain
Inversion condition EF
EEE 531: Semiconductor Device Theory I • Subthreshold current flows when the device is in weak inversion: F s 2F • In long-channel devices, the voltage drop V is entirely D across the drain-substrate junction, which makes the in-plane component of the field (F ) small, and current is diffusion x limited: dn I qA D D eff n dx
Effective cross-section for the subthreshold current • If the electron diffusion length is much larger than L, the electron density varies linearly when going from the source (n ) to the drain (n ): ss sd x n = n(0) source end n(x) n n n ss ss ss sd n = n(L) drain end of the L sd channel EEE 531: Semiconductor Device Theory I • Electron densities at the source and drain end of the channel:
q q q F E q F s F s EFp qVD qVG E qV V Fn G D W Ws D y-axis y-axis
Source end of the channel: Drain end of the channel: E E ( y) E E ( y) n ( y) n exp F i n ( y) n exp Fn i ss i k T sd i B kBT ( y) ( y) V n exp n exp D po V po T VT EEE 531: Semiconductor Device Theory I • We now interpolate the potential variation along the depth with: 1 ( y) s F( y 0) y s Fs y, Fs 2qN Aks0s ks0
Surface Surface electric potential field • Consider now the electron density at the source end of the channel:
s Fs y s Fs y nss ( y) n po exp n po exp n po exp VT VT VT
This term suggests that the effective thickness of the inversion layer along the depth (y-direction) is:
VT ks0VT qN A yeff Fs qN A 2ks0s EEE 531: Semiconductor Device Theory I • Substituting these results into the diffusion current expres- sion gives: 2 W n V 1 V V V 2 i T s T D T I D nks0 VT e 1 e L N A s 2LDp Important notes: - The subthreshold current is nearly independent of V if D V > 3V D T - The subthreshold current depends exponentially on s - The subthreshold current depends upon the ratio W/L • For V > 3V , the subthreshold current simplifies to: D T V V 1 V T s T T s I D b e ln(I D ) ln(b) ln s 2 s VT 1 VT d ln(I D ) 1 ds VT 2s EEE 531: Semiconductor Device Theory I • To obtain the expression for the subthreshold swing S, we now utilize the relationship between the surface potential and the gate voltage:
Qs (s ) 1 VG s VFB s 2qN Aks0s VFB Cox Cox dV C ( ) G 1 s s ds Cox • Combining the results for dln(I ) and dV , gives: D G 2 1 dV C ( ) 2 C S G V ln10 1 s s 1 s d log(I ) T C 2 C D ox a ox where a 2 k / L C . If a >> C /C then: s 0 Dp ox s ox
dVG Cs (s ) S VT ln101 Smin 60 mV / decade d log(I D ) Cox EEE 531: Semiconductor Device Theory I • The subthreshold swing tells us how fast we can turn the device off. Devices with good turn-off characteristics have subthreshold swings between 70 and 80 mV/decade.
10-4
) -6 A 10 • • ( V T t n
e • r 10-8 Short-channel r
u device C
n -10 i 10
a Long-channel r I
D off device 10-12 • 0 0.2 0.4 0.6 0.8 1 Gate Voltage (V)
EEE 531: Semiconductor Device Theory I EEE 531: Semiconductor Device Theory I
Instructor: Dragica Vasileska
Department of Electrical Engineering Arizona State University
Topics covered: 4. Threshold voltage adjustment
EEE 531: Semiconductor Device Theory I 4. Threshold voltage adjustment • The threshold voltage is an important device parameter whose values should not fall outside certain prescribed limits. • The conflicting design requirements between reducing V , D V , I , C, and increasing performance are schematically T leak shown in the figure below:
Reduce P ~ V 2 switch DD Design space is shrinking! V Reduce T P ~ V leak T
Increase Performance V DD EEE 531: Semiconductor Device Theory I • We now recall the expressions for the threshold voltage to understand which parameters are easily and reproducibly changed to give the desired threshold voltage: Q (2 ) 1 s F VT 2F VFB 2F 2qN Aks0 2F VFB Cox Cox
Q 1 f Qit (2F ) Qm The variation of N VFB MS A q Cox Cox Cox makes significant contribution here. E E MS M sc C F bulk M sc 0.5Eg kBT ln(N A / ni )
For each factor of 10 in doping concentration change, this term changes by 2.3 k T (not very much). B EEE 531: Semiconductor Device Theory I • To summarize, threshold voltage controlling parameters are: (A) Substrate doping (B) Substrate bias via s (C) Oxide thickness (useful for major threshold voltage control, but not for threshold voltage adjustments).
(A) Substrate doping • The key process parameter for threshold voltage control is the substrate doping. • For general, non-uniform doping density, the relationship between V and is: G s Depletion region depth W Qs (s ) q VG s VFB s NB (y)dy VFB Cox Cox 0 Acceptor-type doping density EEE 531: Semiconductor Device Theory I • The substrate doping concentration can be modified, for example, using ion implantation process. • Two limiting cases are interesting to consider: - very shallow heavily-doped surface layer - general ion-implanted impurity profile • For very shallow surface layer, we have:
NB (y) N A Di(0) Dose: # of atoms per unit area q W VG s N A Di(0) dy VFB Cox 0 qN W qD A i Acceptors positive shift s VFB Cox Cox Donors negative shift
EEE 531: Semiconductor Device Theory I • For ion-implanted impurity profiles:
2 D ion dose D y R i N (y) i exp p R range i 2R 2 p p 2Rp R straggle p
Ni (y) Ni (y) Ni R p Di (Ni N A)di
N A N A di y (depth) y (depth) Rp AApppprrooxxiimmaattiioonn ttoo t thhee RReeaall i ioonn--iimmppllaanntteedd pprrooffiillee rreeaall pprrooffiillee
EEE 531: Semiconductor Device Theory I • Two special cases need to be considered for the step doping profile: d < W all implanted ions are in the SCR i
qD 1 V V 2 i 2qN k 2 qD d / 2k T FB F A s 0 F i i s 0 Cox Cox small effect
d > W the depth over which we have implanted ions i exceeds the SCR depth 1 VT VFB 2F 2qNiks0 2F Cox Need to substitute for different doping
EEE 531: Semiconductor Device Theory I (B) Substrate bias • Reverse, or back-biasing, is another method that has been employed to adjust the threshold voltage.
q q qs F E F E F qV Fp s BS
W EFn
y-axis W
s 2F onset of strong inversion s 2F VBS onset of strong inversion Energy-band diagram Energy-band diagram for V = 0 for V 0 BS BS EEE 531: Semiconductor Device Theory I • From the energy-band diagrams shown in the previous slide, it is clear that the surface will invert when s 2F VBS • The threshold voltage is then given by: 1 VT VFB 2F VBS 2qNiks0 2F VBS Cox Important notes: VT
Back-biasing always N A2 N A1 increases V T Current-voltage relations N A1 remain the same provided:
2F 2F VBS VBS • It is generally desirable to have low substrate-bias sensitivity (shallow channel implant +appropriate ion dose)
EEE 531: Semiconductor Device Theory I (C) Threshold voltage extraction • Criterion 1: V =V for which I =10 A (Not accurate, but easy to use) T G D • Criterion 2:
ID
The intercept on the I = 0 axis D gives the threshold voltage.
VG VT
EEE 531: Semiconductor Device Theory I EEE 531: Semiconductor Device Theory I
Instructor: Dragica Vasileska
Department of Electrical Engineering Arizona State University
Topics covered:
5. Small-geometry effects - Subthreshold slope increase - Short-channel effects - Narrow-width effects - Hot-carrier effects - Discrete impurity effects - Schematic description of realistic device structure EEE 531: Semiconductor Device Theory I 5. Short-Channel Effects in Scaled Si-MOSFETs
VG • Increase in the subthreshold current: t ox VD - drain-induced barrier lowering • Threshold voltage modification: N+ N+ D D L - short-channel effects N - narrow-width effects A - quantum-mechanical charge Long-channel device description • Transconductance degradation: V / G t / ox VD/ - finite inversion layer capacitance - depletion of the polysilicon gates N+ N+ D D L/ • Parasitic BJT action: - punch-through effect N A - substrate current increase due to carrier Scaled device multiplication and regenerative feedback • Hot-carrier effects: MMininimimuumm c chhaannnneel-ll-elennggthth b beeloloww w whhicichh - oxide charging ssigignnifiifcicaannt ts shhoorrt-tc-chhaannnneel le effefecctsts a arree - velocity saturation eexxppeecctetedd t oto o occccuurr:: - velocity overshoot 1 3 - ballistic transport L A r T (W W )2 min j ox s D • Classical statistical effects: - random dopant fluctuations EEE 531: Semiconductor Device Theory I (A) Subthreshold Current and Threshold Voltage
• For a long-channel device, the subthreshold current is independent of V , once V >3V D D T ]
A Device that shows [ long-channel
D • The situation is rather different I behavior for small devices, where one N =1015 cm-3 B observes:
increase in the subthreshold swing ] A [ Device with drain voltage dependence of
D
I severe short- channel behavior the subthreshold current due to Drain Induced Barrier N =1014 cm-3 B Lowering (DIBL) V [V] G
EEE 531: Semiconductor Device Theory I (B) Short-channel effects • In all our previous analysis, it was assumed that the gate charge Q equals the sum of the electron charge Q and G N depletion charge Q . B • Even in long-channel device, this is not strictly true. Part of the channel charge is controlled by the source and drain, not by the gate. Only the charge in the shaded +V area is controlled by the gate G G S D
n+ n+
p-type SC
EEE 531: Semiconductor Device Theory I • With increasing V , the amount of charge controlled by the D drain increases lower gate voltage is needed to invert the channel, i.e. V decreases. T • This, in turn, leads to increase in the drain current.
I D Short-channel device
Long-channel device
V D
EEE 531: Semiconductor Device Theory I • Graphical description of the problem: L y r n+ j W L’
r y r W 2 W 2 r 1 2W / r j j j j L' L 2y L 2rj 1 2W / rj 1 • Total charge controlled by the gate (gate-width Z) is:
- long-channel device: QBZL qN AZL - short-channel device: 1 L L' Q' ZL qN Z (L L') Q' qN B A 2 B A 2L EEE 531: Semiconductor Device Theory I • Recall the expression for the threshold voltage:
QB VT 2F VFB Cox • The threshold voltage shift is then given by: Q' Q qN W r 2W r 2W V B B A j 1 1 V j 1 1 T C C L r W L r ox ox j j
5 0.7 )
V 0.6
4 (
)
e V 0.5 T g V a
( (SCE)
t Low Drain Voltage
3 V DD l 0.4 e o g
V V High Drain Voltage
T a 2 0.3 d t
l (DIBL) l o
o 0.2 V h 1 s
V T e 0.1 r SCE: Short Channel Effect
h DIBL: Drain-induced Barrier Lowering
0 T 0 0.1 1 0.1 1 10 Channel Length ( m) Channel Length ( m) EEE 531: Semiconductor Device Theory I (C) Narrow-width effects • The channel width also affects the threshold voltage, due to the additional lateral component in the CSR width (the gate controlled region extends on the sides, which gives: LZQ ' LQ Z 2qN 1 W 2 B B A 4 T Field LQ Z 1 qN W 2 oxide B 2 A T Gate oxide • The difference in charge is: W T qN W 2 Q' Q A T B B 2Z • This gives the following threshold Extra depletion charge voltage shift: Q' Q qN W 2 W V B B A T V T Increase in T C 2ZC W 2Z ox ox threshold voltage EEE 531: Semiconductor Device Theory I • Graphical representation of the V shift: T
Variation of V T with channel width Z
• The combined effect of both short-channel and narrow-width effect gives: W W W rj V V 1 2 1 1 T W Z r Z L j For more detailed expression and actual doping profiles, numerical analysis is needed.
EEE 531: Semiconductor Device Theory I EEE 531: Semiconductor Device Theory I
Instructor: Dragica Vasileska
Department of Electrical Engineering Arizona State University
Topics covered:
5. Small-geometry effects - Subthreshold slope increase - Short-channel effects - Narrow-width effects - Hot-carrier effects - Discrete impurity effects - Schematic description of realistic device structure EEE 531: Semiconductor Device Theory I (D) Hot-carrier effects • Under high bias conditions, the electrons at the drain end of the channel become very energetic (hot). This can give rise to several undesirable effects, such as: Velocity saturation Punch-through effect Snapback breakdown (parasitic BJT action) Oxide charging and tunneling currents Velocity overshoot effect • The ballistic transport effects, such as velocity overshoot lead to smaller transit time of the carriers and are, therefore, desirable effects.
EEE 531: Semiconductor Device Theory I Velocity saturation • Long-channel devices I -V curves nearly constant in saturation D D • Short-channel device Electric fields become very high and the drift-velocity becomes constant (mobility decreases).
10 107 T = 300 K A v ] e s / r a
m 1 g c e [ Drift velocity and Drift velocity and
e y t n i average electron
6 e c 10 average electron r o l g y e 0.1 eenneerrggiieess ffoorr bbuullkk SSii v
t [ e f i V r ] D
105 0.01 10-1 100 101 102 103 Electric field [kV/cm]
EEE 531: Semiconductor Device Theory I • A simplified expression is obtained using:
ID qAeff nvd , Aeff Zyeff
Device width Effective thickness of the inversion layer i.e. the velocity-limited drain current equals to:
ID qZyeff nvd qyeff nZvd ZvdCox (VG VT ) QN • Comparing the above expression with the mobility-limited one for a long-channel device, we get: V V v eff G T For V -V =5 V we sat G T 2L get L =1.25 m (v = 107 cm/s) sat EEE 531: Semiconductor Device Theory I Channel length = 0.2 m
Calculated Experimental Calculated IV-characteristics IV-characteristics with device without velocity velocity saturation saturation effect
EEE 531: Semiconductor Device Theory I Punch-through effect • Occurs when the source and drain depletion regions touch. • The majority electrons in the source get injected into the depletion region where they are swept by the high electric field. • Drain current is dominated by the space-charge current (~V 2) and not by the inversion layer current. D • To eliminate this effect, n+ n+ a punch-through stop is used. This is done with deep ion- implantation process.
Depletion region boundaries
EEE 531: Semiconductor Device Theory I MMaarrggininaal l lolonngg--cchhaannnneel l DDeevvicicee wwitithh sseevveerree sshhoorrtt-- ddeevvicicee ((DDeevvicicee 11)) cchhaannnneel l eefffeeccttss ((DDeevvicicee 22)) ] ] A A [ [ D D I I
V [V] V [V] D D
EEE 531: Semiconductor Device Theory I Snapback breakdown • Electrons near the drain region impact ionize, i.e. generate electron-hole pairs. • Electrons are swept by the drain, and holes go to the substrate, forward-biasing the source- substrate junction. This leads to higher electron injection into the substrate. • More electrons in the substrate I means more impact ionization, i.e. D positive feedback effect. Short-channel • The snapback portion comes device because the source-substrate-drain form a BJT in parallel to the MOSFET that exhibits negative resistance or snapback. Long-channel device V EEE 531: Semiconductor Device Theory I D Oxide charging and tunneling currents • Oxide charging, or charge injection and trapping, is another undesirable effect. • Electrons at the drain end of the channel have sufficient energy to overcome the barrier at the Si/SiO interface and 2 be trapped in the oxide.
SSiinnccee tthhee eeffffeecctt iiss ccuummuullaattiivvee, , iitt lliimmiittss tthhee uusseeffuull ‘‘lliiffee’’ooff tthhee ddeevviiccee.. LLDDDD rreeggiioonnss aarree uusseedd ttoo rreedduuccee ooxxiiddee c chhaarrggiinngg..
EEE 531: Semiconductor Device Theory I • Tunneling currents lead to gate leakage. The three types of tunneling processes are schematically shown below:
V < V = ox B ox B B V > ox B
t ox
FN FN/Direct Direct
• For t 40 Å, Fowler-Nordheim (FN) tunneling dominates ox • For t < 40 Å, direct tunneling becomes important ox • I > I at a given V when direct tunneling active dir FN ox • For given electric field: - I independent of oxide thickness - IFN dependent on oxide thickness dir
EEE 531: Semiconductor Device Theory I • As oxide thickness decreases, gate current becomes more important. It eventually dominates the off-state leakage current (I at V = 0). D G
10-4 Ion ) 10-6 m / 10-8 I A off (
t 10-10 n e
r 10-12 r I
u G -14 C 10
10-16 0 50 100 150 200 250 Technology Generation (nm)
EEE 531: Semiconductor Device Theory I Velocity overshoot effect • We can describe the motion of the electrons between collisions by simple Newton’s Law: dv m * dx qF dt x • In a simplified approach (momentum balance equation for an average carrier) that neglects diffusion, we have
dvdx m *vdx m * qFx dt m • For a uniform electric field applied at t=0, the solution of the above equation is of the form:
q t v (t) m F e m 1 dx m * x
EEE 531: Semiconductor Device Theory I • When steady-state has been reached, the electrons have traveled the distance: 2 m qm d vdx (t)dt Fx 0 em * • For F =10 kV/cm, we have that: x -> d 200Å for electrons in Si • Why do we observe velocity overshoot? (1) The energy relaxation time is larger than momentum relaxation time (2) At first, the electric field simply displaces the distribu- tion function with little change on its shape. (3) Later on, collisions broaden the distribution, the electron temperature increases and drift velocity drops. • Velocity overshoot effect reduces the electron transit time, i.e. leads to faster devices.
EEE 531: Semiconductor Device Theory I EEE 531: Semiconductor Device Theory I
Instructor: Dragica Vasileska
Department of Electrical Engineering Arizona State University
Topics covered:
5. Small-geometry effects - Subthreshold slope increase - Short-channel effects - Narrow-width effects - Hot-carrier effects - Discrete impurity effects - Schematic description of realistic device structure EEE 531: Semiconductor Device Theory I (E) Discrete impurity effects • In ultra-small devices, discrete impurity effects become important. This is clearly seen in the experimental measurements shown below.
Experimental investigations:
T. Mizuno, J. Okamura, A. Toriumi, IEEE Trans. Electron Dev. 41, 2216 (1994). J.T. Horstmann, U. Hilleringmann and K.F. Goser, IEEE Trans. Electron Dev. 45, 299 (1998).
EEE 531: Semiconductor Device Theory I • The atomistic nature of the impurity atoms leads to fluctuations in the potential. • The potential fluctuations affect the magnitude of the current and the threshold voltage for devices fabricated on a same chip.
substrate Conduction band edge along depth and parallel to the SC/oxide interface ] V e [
y g r e n source ] E m drain [ th drain ep length [m] d ] V e [
Simulated devices have: y Simulated devices have: g ] r m L = 0.1 m, Z = 50 nm e L = 0.1 m, Z = 50 nm n [ The applied voltages are: E th The applied voltages are: g V = 0 V, V = 10 mV n G D source e VG = 0 V, VD = 10 mV l width [m] EEE 531: Semiconductor Device Theory I • Influence on the subthreshold transfer characteristics:
Conduction band edge Current flow 150
140 ] ] m e m n c [ n i 130
[ r
a h u r t h t o d d i d s
i 120 W W 110
100 60 80 100 120 140 Length [m] Length [nm]
10-7 T=300 K V =10 mV 10-8 D TThhee s spprreeaadd o off t thhee t trraannssffeerr N =8x1017cm-3 characteristics along the gate A characteristics along the gate ] 10-9 t =3 nm
axis is due to the non unifor- A ox axis is due to the non unifor- [
mity of the potential barrier -10
mity of the potential barrier D 10 that allows for early turn-on I I (discrete model) that allows for early turn-on D at some parts of the channel. 10-11 I (discrete model) at some parts of the channel. DAV I (continuum model) 10-12 D 0.0 0.1 0.2 0.3 0.4 0.5 0.6 V [V] EEE 531: Semiconductor Device Theory I G • Threshold voltage fluctuations are clearly seen on the example shown below, where we plot the # of channel dopant atoms (~I ) D as a function of V for two devices taken at the ends of the G distribution of the statistical ensemble of 30 devices considered in this study. All devices considered here have identical geometry.
6 160 statistical ensemble (a) L =W =50 nm, N =5x1018 cm-3 (b) s 140 G G A
5 of 30 devices with n
o V =0.1 V
identical geometry r 120 D t c
y 4
N =312 e c l 100 av e n
l e 3 (N)=70 N=284, V =0.739 [V] e 80 u T n q n e
r 60 2 a F h c
40 f
1 o N=328, V =0.86 [V] 20 T # 0 0 280 290 300 310 320 330 340 350 0.4 0.6 0.8 1.0 1.2 1.4 1.6 Number of channel dopant atoms Gate voltage V [V] G
EEE 531: Semiconductor Device Theory I • Scatter plots of the threshold voltage versus the number of dopant atoms clearly show that devices with larger channel width have smaller threshold voltage fluctuations. We use L =50 nm, N = G A 5x1018 cm-3, T =2 nm in this study. ox
0.86 0.86 0.86 (a) W =35 nm W =50 nm (b) W =100 nm (c) ] 0.84 G ] 0.84 G ] 0.84 G V V V [ [ [
0.82 e e 0.82 e 0.82 g g g a a a t 0.8 t t l l l o o 0.8 o 0.8 v v v 0.78 d d d l l l
o o 0.78 o 0.78 h 0.76
4 3 4 4q SiF kBT / q Tox N A Vth 3 4qSiF N A ox Leff Weff
EEE 531: Semiconductor Device Theory I • Variation of the threshold voltage standard deviation with substrate doping, oxide thickness and device width is shown below.
4 3 4 q SiB Tox N A kBT N A Approach 1 [1]: Vth ; B ln 2 ox Leff Weff q ni
4 3 4 4q SiB kBT / q Tox N A Approach 2 [2]: Vth 3 4qSiB N A ox Leff Weff
[1] T. Mizuno, J. Okamura, and A. Toriumi, IEEE Trans. Electron Dev. 41, 2216 (1994). [2] P. A. Stolk, F. P. Widdershoven, and D. B. Klaassen, IEEE Trans. Electron Dev. 45, 1960 (1998).
40 100 60 35 => approach 1 => approach 1 Vth Vth => approach 2 30 80 => approach 2 50 Vth Vth
] => our simulation results
] => our simulation results ] Vth V 25 Vth V
60 V 40 m m [
20 m [
[
h t h h 30
t 40 15 t V V => approach 1 V 10 Vth => approach 2 Vth 20 20 5 => our simulation results Vth 0 0 10 1x1018 3x1018 5x1018 7x1018 0 1 2 3 4 5 20 40 60 80 100 120 140 Doping density N [cm-3] Oxide thickness T [nm] Device width [nm] A ox
EEE 531: Semiconductor Device Theory I • To understand the role that the 1.4 (a) position of the impurity atoms plays L =50 nm, W =35 nm ] G G
V 1.3 [
on the threshold voltage fluctuations, 18 -3
N =5x10 cm , T =3 nm
e A ox
statistical ensembles of 5 devices g
a 1.2 t from the low-end, center and the l o high-end v
high-end of the distribution were d 1.1 l low-end o
considered. h
s center
e 1 r
• Significant correlation was observed h T between the threshold voltage and 0.9 the number of atoms that fall within 160 180 200 220 240 260 280 300 the first 15 nm depth of the channel. Number of channel dopant atoms
1 200 (b) L =50 nm, W =35 nm, T =3 nm 180 5 samples of average G G ox s
e 160 0.8 18 -3
c N =5x10 cm i
140 n A v o e 120 i t
D 5 samples at 0.6
a
f 5 samples at 100 l e o minimum
80 maximum r r r Moving slab e 60 o 0.4 b c
m 40 N range
T N D D u
20 V N 0.2 0 depth 1 1 1 1 2 2 2 2 2 2 2 2 6 7 8 9 0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 10 15 20 25 Number of Atoms in Channel Depth [nm] EEE 531: Semiconductor Device Theory I 20 • Impurity distribution in the channel (b) also affects the carrier mobility and ] 15 saturation current of the device. A center [
• Significant correlation was observed t n
e 10 r
between the drift velocity (saturation r low-end u c
current) and the number of atoms that n fall within the first 10 nm depth of the i 5 a r
channel. D V =1.5 V, V = 1V G D high-end 0 160 180 200 220 240 260 280
1.5 107 Number of channel dopant atoms (a) 1
] low-end
s (c) /
m 7 0.8 c 1 10 average velocity [
correlation
y center t n
i drain current o
c 0.6 i correlation t o l 6 a
V =1.5 V, V =1 V l e 5 10 G D v e L =50 nm
r t L =50 nm, W =35 nm high-end 0.4 G r f
i G G
o W =35 nm r 18 -3 G C D N =5x10 cm A T =3 nm 0.2 ox 0 160 180 200 220 240 260 280 N =5x1018 cm-3 A Number of channel dopant atoms 0 0 5 10 15 20 25 Depth [nm] EEE 531: Semiconductor Device Theory I (F) Schematic description of realistic device structures
Below shown is a schematics of realistic device structures and highlight of some critical issues in device fabrication.
• Low resistivity
RC Delay{ Interconnect metal (Al, Cu) • Low K dielectric
Interlevel dielectric (Low K) • Ti, Co silicide? • Gate depletion S D • Oxide integrity W G Shallow Trench Isolation (STI) • Oxide thickness • Short channel LDD Halo/pocket effects (e.g., DIBL) Anti punchthrough • Epi wafers?
EEE 531: Semiconductor Device Theory I • Cross-sectional micrograps of a 60-nm MOSFET built at Bell Labs with 1.2 nm gate oxide. In production 2010: • 64-Gb DRAM • 200-GHz transistor speeds • 10-GHz processor clocks
EEE 531: Semiconductor Device Theory I