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EE/MSEN/MECH 6322 Semiconductor Processing Technology Fall 2009 Walter Hu

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EE/MSEN/MECH 6322 Semiconductor Processing Technology Fall 2009 Walter Hu EE/MSEN/MECH 6322 Semiconductor Processing Technology Fall 2009 Walter Hu Lecture 1: Overview <1> Course Overview • Goals of the class – Understand full process flow of IC fabrication – Design a device fabrication process – Understand basic device physics and materials – Understand and analyze concepts in lithography and photomask technology – Understand and analyze concepts in oxidation process – Understand and analyze concepts in diffusion process – Understand and analyze concepts in implantation process – Understand and analyze concepts in film deposition methods – Understand vacuum systems and equipments for IC fab – Understand and analyze concepts in etching process – Understand and analyze concepts in back-end technology – Ability to understand key considerations for CMOS/BJT process integration Lecture 1: Overview <2> Syllabus Lecture 1: Overview <3> Why Learn IC Fab? Most important technology In the last 40 years? Integrated Circuits Most important technology In the coming decade? Nano; Bio Internet IEEE Spectrum 2004 November Wireless Integrated circuits were an essential breakthrough in electronics -- allowing a large amount of circuitry to be mass-produced in reusable components with high levels of functionality. Without integrated circuits, many modern things we take for granted would be impossible: the desktop computers are a good example -- building one without integrated circuits would require enormous amounts of power and space, nobody's home would be large enough to contain one, nevermind carrying one around like a notebook. Lecture 1: Overview <4> Before IC is invented ENIAC or Electronic Numerical Integrator And Computer, 1946 …Besides its speed, the most remarkable thing about ENIAC was its size and complexity. ENIAC contained 17,468 vacuum tubes, 7,200 crystal diodes, 1,500 relays, 70,000 resistors, 10,000 capacitors and around 5 million hand-soldered joints. It weighed 30 short tons (27 t), was roughly 8.5 feet by 3 feet by 80 feet (2.6 m by 0.9 m by 26 m), took up 680 square feet (63 m²), and consumed 150 kW of power. … Lecture 1: Overview <5> First Transistor 1st commercially successful TR 1947 Raytheon CK722, 1953 Ge-based pnp low 1st transistor power TR AT&T Bell Lab 3 inventors (John 1st Si transistor Bardeen, Walter made by Gordon Brattain, and Teal at TI in William Shockley) share 1954 Nobel prize Sources: http://roiconnect.com/transistor.htm Source: http://www.lucent.com/minds/transistor/ http://www.pbs.org/transistor/science/events/silicont1.html Lecture 1: Overview <6> Integrated Circuit Inventors Integrated Circuit (IC): a large number of individual components (transistors, resistors, capacitors, etc.) fabricated side by side on a common substrate and wired together to perform a particular circuit function. 1958, Jack Kilby, Texas Instrument In 1962, Steven Hofstein and Fredric Heiman at the RCA research laboratory in Princeton, New Jersey, invented a new family of devices called metal-oxide semiconductor field-effect transistors Andy Grove, (MOS FETs for short). Although these transistors Robert Noyce, were somewhat slower than bipolar transistors, and Gordon they were cheaper, smaller and used less power. Moore with Also of interest was the fact that modified metal- Intel 8080 layout. oxide semiconductor structures could be made to act as capacitors or resistors. Sources: http://www.ti.com/corp/docs/kilbyctr/jackbuilt.shtml; http://www.maxmon.com/1926ad.htm; Intel Lecture 1: Overview <7> Moore’s Law The number of transistors per square inch on integrated circuits doubles every year, later every 1.5 year. Source: Intel, Gordon Moore, presentation at ISSC 2003 Lecture 1: Overview <8> IC Manufacturing Cost 100 nano$ per transistor! Source: Intel, Gordon Moore, presentation at ISSC 2003 Lecture 1: Overview <9> IC Market Source: Intel, Gordon Moore, presentation at ISSC 2003 Lecture 1: Overview <10> IC Technology Market MOS Memories MPU BJT ASICs Compound Misc. CMOS TTL Digital MOS Analog BJT NMOS Analog MOS GaAs ECL BiCMOS Lecture 1: Overview <11> Planar Fabrication Process Lecture 1: Overview <12> Periodic Table-Semiconductors Source: http://www.pmel.org/HandBook/PeriodicTable/periodic.htm Lecture 1: Overview <13> Properties of Semiconductors From Appendix III, Streetman and Banerjee Lattice a Density Bandgap Eg n p [Å] [g/cm^3] style [eV] [cm^2/V-s] [cm^2/V-s] Si Diamond 5.43 2.33 indirect 1.11 1350 480 Ge Diamond 5.65 5.32 indirect 0.67 3900 1900 GaAs Zincblende 5.65 5.31 direct 1.43 8500 400 InP Zincblende 5.87 4.79 direct 1.35 4000 100 GaN Z,W 4.5 6.1 direct 3.4 380 CdS Z,W 4.137 4.82 direct 2.42 250 15 InSb Zincblende 6.48 5.78 direct 0.18 10^5 1700 Si crystal Lecture 1: Overview <14> Bonds and Carriers Near absolute zero, all Si bonds are complete. Each Si atom contributes one electron to each of the four bond pairs. Increasing temperature adds energy to the system and breaks bonds in the lattice, generating electron-hole pairs. Intrinsic conductivity: 1010 cm-3 at 23˚C Intrinsic Si Donor Impurities in Silicon Acceptor Impurities in Silicon Lecture 1: Overview <15> Intrinsic Carrier Concentration • The density of carriers in a semiconductor as a function of temperature and material properties is: 2 3 EG -6 ni BT exp cm kT • EG = semiconductor bandgap energy in eV (electron volts) • k = Boltzmann’s constant, 8.62 x 10-5 eV/K • T = absolute temperature, K • B = material-dependent parameter, 1.08 x 1031 K-3 cm-6 for Si • Bandgap energy is the minimum energy needed to free an electron by breaking a covalent bond in the semiconductor crystal. Lecture 1: Overview <16> Intrinsic Carrier Concentration • Electron density is n (electrons/cm3) and ni for intrinsic material n = ni. • Intrinsic refers to properties of pure materials. 10 -3 • ni ≈ 10 cm for Si Also see Fig. 1-16, p16 in textbook Lecture 1: Overview <17> Electron-Hole Concentrations • A vacancy is left when a covalent bond is broken. • The vacancy is called a hole. • A hole moves when the vacancy is filled by an electron from a nearby broken bond (hole current). • Hole density is represented by p. • For intrinsic silicon, n = ni = p. • The product of electron and hole concentrations 2 is pn = ni . • The pn product above holds when a semiconductor is in thermal equilibrium (not with an external voltage applied). Lecture 1: Overview <18> Drift Current • Electrical resistivity and its reciprocal, conductivity , characterize current flow in a material when an electric field is applied. • Charged particles move or drift under the influence of the applied field. • The resulting current is called drift current. • Drift current density is j = Qv (C/cm3)(cm/s) = A/cm2 j = current density, (Coulomb charge moving through a unit area) Q = charge density, (Charge in a unit volume) v = velocity of charge in an electric field. Note that “density” may mean area or volumetric density, depending on the context. Lecture 1: Overview <19> Mobility • At low fields, carrier drift velocity v (cm/s) is proportional to electric field E (V/cm). The constant of proportionality is the mobility, : • vn = - nE and vp = pE , where • vn and vp = electron and hole velocity (cm/s), 2 • n and p = electron and hole mobility (cm /Vs) • Hole mobility is less than electron since hole current is the result of multiple covalent bond disruptions, while electrons can move freely about the crystal. Lecture 1: Overview <20> Velocity Saturation At high fields, carrier velocity saturates and places upper limits on the speed of solid-state devices. Lecture 1: Overview <21> Intrinsic Silicon Resistivity • Given drift current and mobility, we can calculate resistivity: drift 2 jn = Qnvn = (-qn)(- nE) = + qn nE A/cm drift 2 jp = Qpvp = ( qp)( pE) = + qp pE A/cm drift = jT jn + jp = q(n n + p p)E = E Defines electrical conductivity: -1 = q(n n + p p) (cm) Resistivity is the reciprocal of conductivity: = 1/ (cm) Lecture 1: Overview <22> Ex1: Resistivity of Silicon Lecture 1: Overview <23> Acceptor Impurities in Silicon Hole is propagating through the silicon. Lecture 1: Overview <24> Carrier Concentrations • If n > p, the material is n-type. If p > n, the material is p-type. • The carrier with the largest concentration is the majority carrier, the smaller is the minority carrier. 3 • ND = donor impurity concentration atoms/cm 3 NA = acceptor impurity concentration atoms/cm • Charge neutrality requires q(ND + p - NA - n) = 0 2 • It can also be shown that pn = ni , even for doped semiconductors in thermal equilibrium. Lecture 1: Overview <25> n-Type Material 2 • Substituting p = ni /n into q(ND + p - NA - n) = 2 2 0 yields n - (ND - NA)n - ni = 0. • Solving for n (N N ) (N N )2 4n2 n2 n D A D A i and p i 2 n • For (ND - NA) >> 2ni, n (ND - NA) P-type Materials: For (NA - ND) >> 2ni, p (NA - ND). Lecture 1: Overview <26> Practical Doping Levels • Majority carrier concentrations are established at manufacturing time and are independent of temperature (over practical temp. ranges). • However, minority carrier concentrations are 2 proportional to ni , a highly temperature dependent term. • For practical doping levels, n (ND - NA) for n-type and p (NA - ND) for p-type material. • Typical doping ranges are 1014/cm3 to 1021/cm3. Lecture 1: Overview <27> Mobility and Resistivity Mobility is a function of Doping in Semiconductors Impurities Disrupt the Periodic Lattice Structure Lecture 1: Overview <28> Diffusion Current • Second Mechanism to Produce Current in Semiconductors • In practical semiconductors, it is quite useful to create carrier concentration gradients by varying the dopant concentration and/or the dopant type across a region of semiconductor. • This gives rise to a diffusion current resulting from the natural tendency of carriers to move from high concentration regions to low concentration regions.
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