EE105 – Fall 2014 Microelectronic Devices and Circuits

Prof. Ming C. Wu [email protected] 511 Sutardja Dai Hall (SDH)

Lecture 8: MOSFET (1): physics 1

MOS (Metal-Oxide-Semiconductor) Capacitor Structure

• First electrode - Gate: Consists of low-resistivity material such as metal or doped polycrystalline silicon • Second electrode - Substrate or Body: n- or p-type semiconductor • Dielectric - Silicon dioxide: stable high-quality electrical insulator between gate and substrate.

Lecture 8: MOSFET (1): physics 2

1 MOS Capacitors in Three Bias Regions

Accumulation Inversion Accumulation Depletion

Depletion

Inversion

Threshold voltage: VTN • Total capacitance modeled as series combination of fixed Gate voltage: VG • Accumulation: V << V oxide capacitance and G TN voltage-dependent • Depletion: V < V G TN depletion-layer capacitance. • Inversion: VG > VTN

Lecture 8: MOSFET (1): physics 3

NMOS Transistor Structure

• 4 device terminals: Gate(G), Drain(D), Source(S) and Body(B). • Source and drain regions form pn junctions with substrate.

• vSB, vDS and vGS always positive during normal operation.

• vSB always < vDS and vGS to reverse bias pn junctions

Lecture 8: MOSFET (1): physics 4

2 NMOS Transistor: Qualitative I-V Behavior

• VGS << VTN : Only small leakage current flows.

• VGS < VTN: Depletion region formed under gate merges with source and drain depletion regions. No current flows between source and drain.

• VGS > VTN: Channel formed between source and drain. If vDS > 0, finite iD flows from drain to source.

• iB = 0 and iG = 0.

Lecture 8: MOSFET (1): physics 5

NMOS Transistor: Triode Region Characteristics

Charge per unit length in channel: " Q'(x) = −WCox (vGS − v(x)−VTN ) [F/cm] v(x) : voltage of channel at position x

i(x) = Q'(x)vx (x),

vx (x) : electron velocity at x dv(x) v (x) = −µ E = −µ x n x n dx

µn : electron mobility L L " dv(x) ∫ i(x)dx = ∫ WµnCox (vGS − v(x)−VTN ) dx 0 0 dx " !W $ Kn = µnCox # & vDS " L % " iDL = WµnCox (vGS − v(x)−VTN )dv(x) " ∫ Cox = εox Tox : oxide capacitance 0

per unit area # vDS & iD = Kn %vGS −VTN − (vDS εox = oxide permittivity (F/cm) $ 2 '

Tox = oxide thickness (cm) for vGS −VTN ≥ vDS ≥ 0

Lecture 8: MOSFET (1): physics 6

3 NMOS Transistor: Saturation Region

• If vDS increases above triode region limit, the channel region disappears and is said to be pinched-off. • Current saturates at constant value,

independent of vDS. • Saturation region operation mostly used for analog amplification.

Lecture 8: MOSFET (1): physics 7

NMOS Transistor: Saturation Region (cont.)

" µnCox W 2 iD = (vGS −VTN ) for vDS ≥ vGS −VTN 2 L

vDSAT = vGS −VTN is termed the saturation or pinch-off voltage

Lecture 8: MOSFET (1): physics 8

4 Transconductance of an MOS Device

• Transconductance relates the change in drain current to a change in gate-source voltage

∂i g = D m ∂v GS Q − pt • Taking the derivative of the expression for the drain current in saturation region, € " W 2ID gm = µnCox (VGS −VTN ) = L VGS −VTN

Lecture 8: MOSFET (1): physics 9

Channel-Length Modulation

• As vDS increases above vDSAT, the length of the depleted channel beyond the pinch-off point, DL, increases and the actual L decreases.

• iD increases slightly with vDS instead of being constant.

" µnCox W 2 iD = (vGS −VTN ) (1+ λvDS ) 2 L

λ = channel length modulation parameter

Lecture 8: MOSFET (1): physics 10

5 Body Effect or Substrate Sensitivity

• Non-zero vSB changes threshold voltage, causing substrate sensitivity modeled by

V V v 2 2 TN = TO +γ( SB + φF − φF )

where

VTO = threshold voltage for vSB = 0 γ = body - effect parameter ( V)

2 φF = surface potential (V)

€ Lecture 8: MOSFET (1): physics 11

NMOS Model Summary

Lecture 8: MOSFET (1): physics 12

6 PMOS Transistors: Enhancement-Mode Structure

• p-type source and drain regions in an n-type substrate.

• vGS < 0 required to create p-type inversion layer in channel region

• For current flow, vGS < VTP • To maintain reverse bias on source-substrate and drain

-substrate junctions, vSB < 0 and vDB < 0 • Positive bulk-source potential

causes VTP to become more negative

Lecture 8: MOSFET (1): physics 13

PMOS Transistors: Output Characteristics

• For vGS > VTP, transistor is off.

• For more negative vGS, drain current increases in magnitude. • PMOS device is in the triode

region for small values of VDS and in saturation for larger values.

• Remember VTP < 0 for an enhancement mode transistor

Lecture 8: MOSFET (1): physics 14

7 PMOS Model Summary

Lecture 8: MOSFET (1): physics 15

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