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Amplifiers: Audio Texas Instruments Incorporated decoupling and audio filtering for the Class-D amplifier By Richard Palmer, Application Specialist, Audio; and Timothy Darling, Analog Field Specialist

Introduction Figure 1. Simplified Class-D system overview Class-D audio amplifiers are very similar to - mode power supplies in that both compare an input Power Supply signal with a reference to Decoupling Filter create an error that controls a pulse-width mod- ulation (PWM) circuit. The PWM signal controls the switching action of the out- Audio Input Filter Class-D APA Output Filter Audio put power stage consisting Input (HPF) TPA005D14 (LPF) Output of DMOS power in an H-bridge configura- tion. The result is a square wave output which, when passed through a low-pass filter (LPF), produces an amplified version of the audio support the Class-D amplifier in the audio system. Each input. The Texas Instruments website has information of the filter functions will be explained with emphasis on available on the operation of the Class-D audio power selection and placement of components. amplifiers.1 A partial schematic of the TPA005D14 EVM, SLOP 204, This application note describes proper decoupling of is shown in Figure 2. The 5-V device is capable of deliver- the power supply, selection and implementation of audio ing 2 watts of continuous output power into a 4-Ω load input and output filters, and some basic layout considera- with less than 0.5% total harmonic across the tions for the TI TPA005D14 Class-D stereo audio power 20-Hz to 20-kHz audio range. The full EVM amplifier. Figure 1 shows the major function blocks that schematic and performance characteristics can be found in the user’s guide. Power supply decoupling2 Figure 2. Power supply decoupling circuit Power supply decoupling requires providing the bulk capacitance needed

TPA005D14 to supply the low-frequency charge and 1 48 SHUTDOWN COSC the capacitance needed for the switch- 2 47 MUTE AGND C10 3 46 ing transient response. MODE AGND 1 µF 4 LINN RINN 45 5 44 LINP RINP Bulk capacitance 6 43 LCOMP RCOMP 7 C16 C14 C13 AGND FAULT_0 42 C12 C11 C15 Power supply decoupling plays a key 8 41 330 µF 10 µF 1 µF VDD FAULT_1 1 µF 10 µF 330 µF 9 40 role in achieving top performance from VDD LPVDD RPVDD VDD2 10 39 LOUT+ LOUTP ROUTP ROUT+ Class-D amplifiers. The capacitance at C27 L2 11 38 L1 C28 15 µH LOUTP ROUTP µ 12 37 15 H the power inputs provides a low- C30 0.22 µF PGND PGND 0.22 µF C31 13 36 1 µF C26 PGND PGND C29 1 µF impedance for the device L4 14 35 L3 µ 15 µH LOUTN ROUTN 15 µH µ 0.22 F 15 34 0.22 F that reduces the ripple of the power LOUT- LOUTN ROUTN ROUT- 16 33 LPVDD RPVDD supply voltage created by the pulse 17 32 HPDL HPDR 18 31 currents of the Class-D device. This HPLOUT HPROUT 19 30 HPLIN HPRIN reduces the distortion in the output and 20 29 AGND V2P5 21 28 produces a much cleaner audio output. PVDD PVDD 22 27 VCP PGND are modeled using equivalent 23 26 C18 CP3 CP4 24 25 series resistance (ESR), equivalent 1 µF CP2 CP1 series inductance (ESL), capacitive reactance (XC) and inductive reactance (XL). The equivalent impedance of a 24 www.ti.com/audio

Analog and Mixed-Signal Products August 1999 Analog Applications Texas Instruments Incorporated Amplifiers: Audio Power capacitor over frequency is simply modeled using the equivalent resistance of the trace, ESR and load. This Equation 1. can deteriorate the output signal and cause distortion. The solution is to add two ceramic capacitors to the filter, 2 2 Z = ESR +(XC − XL) (1) one immediately adjacent to the power supply pin (C12 and C13 in Figure 2), and the other between the pin and XL is small for below 1 MHz and can be the bulk (C11 and C14 in Figure 2). neglected since the switching frequency range of the Capacitor C12 (or C13) is chosen to be very small to pro- TPA005D14 is 100 to 500 kHz. XC is maximum and domi- vide a short time constant and, consequently, the available nates at DC, and decreases as the frequency increases until charge is small and is quickly depleted by a large current resonance is reached (XC = XL), at which point Z = ESR. transient. As charge is depleted from C12, charge from The ESR of a capacitor is considered to be constant over C11 (or C14) begins to arrive at the power pin. The charge the 100-kHz to 500-kHz switching frequency range of the from C15 then arrives as the charge for C11 is being Class-D amplifier. Capacitors C15 and C16 in Figure 2 depleted. The result is a smooth output signal. The volt- provide the bulk capacitance required for each channel. age on the power pin will drop if the time constant of C11 Assuming that the power supply current is constant and or C15 is too long. The long time constant of C15 ensures has negligible ripple, the capacitor current is negligible, that plenty of charge will be available for the power pin and the switching frequency and dc load resistance are during the remainder of the transient. known, the peak power for a given load is used to calcu- late the peak current as shown in Equation 2. Filtering in the path Each channel consists of inputs = (2) IPeak PPeak RL and bridge-tied load (BTL) outputs. Filtering of the The minimum capacitance, shown in Equation 3, needed inputs is required to avoid DC offsets. The output filter is to maintain a specified ripple voltage, assuming ESR = 0, recommended for applications requiring minimization of is then: quiescent current and EMI. Figure 3 shows the filtering scheme used in the TPA005D14 EVM. C ≥ (IPeak × TD × DMax ) VRipple (3) where T = 1/f is the period, D is the maximum Input filter D switch Max The differential input requires filters for both the non- duty cycle and VRipple is the desired ripple voltage. In almost every case the ripple voltage caused by the ESR inverting and the inverting inputs of the amplifier. The will dominate. The ESR required to achieve the same input filters set the low frequency corner and block DC and currents. Each filter consists of one external VRipple for the IPeak from Equation 2 is: capacitor (CIN) in series with the fixed internal resistance ≤ (4) ESR VRipple IPeak (RIN) of the amplifier input. This creates a first-order high-pass filter (HPF) with a –3-dB corner frequency This value assumes that the capacitor ripple is ≤10% of shown in Equation 5 of: the ESR ripple (the capacitance is ≥10 × C of Equation 3). The capacitor ESR should be 30 to 50% lower than fLO =1 (2πRINCIN ) (5) Equation 4 to allow for increases due to temperature, Ω ESL and aging. Capacitors can be paralleled to reduce where RIN = 10 k (typical), and CIN = 1 µF for a –3-dB ESR and power dissipation. value of 15.9 Hz. fLO can be easily adjusted by changing CIN. The inverting input should be AC grounded for single- Transient response of the decoupling capacitors ended inputs using the same value of CIN as the non- The bulk capacitor C15 (or C16) of Figure 2 is large inverting input. and requires an electrolytic capacitor. The time required to transfer the charge of C15 to the load is long due to Output filter the time constant created between the capacitance and Several choices of filters exist and are characterized by the cutoff frequency (–3-dB point), passband and ripple, and stop band attenuation. In this case Figure 3. Audio signal input and output filters an L-C filter with a Butterworth approximation was chosen for its maximally flat magnitude response and the small number of components Differential required to implement the filter. The order of Inputs TPA005D14 the filter determines how many poles exist at CIN L the same frequency. Each pole increases the RINP ROUTP attenuation above the cutoff frequency (in the Right C CL RL stop band) by 20 dB per decade. A second- Channel CIN C RINN ROUTN order LPF reduces f by –40 dB per decade (a L s C L 5-V signal will be reduced to 50 mV). The IN LOUTP switching frequency (f ) impacts the choice of LINP C s Left C R the filter order—the higher the f , the lower the C L L s Channel CIN LOUTN order required to achieve a given attenuation. LINN L The trade-off is a decrease in efficiency and increases in EMI. Continued on next page www.ti.com/audio 25

Analog Applications August 1999 Analog and Mixed-Signal Products Amplifiers: Audio Power Texas Instruments Incorporated

Continued from previous page 2 × R 2 × R L = L = L (9) The and –3-dB cutoff frequency are ω 4πf derived in Equation 6 using a half-circuit model and 0 C found to be Figure 4 shows the measured response of the TPA005D14 EVM for R = 4 Ω and f = 30 kHz using an 1 V (s) C H(s) = × O Audio Precision System II. The response shows a gain of 2 s + 2s + 1 VI(s) 10 V/V, input corner frequency of 15.9 Hz and an output cutoff frequency of 28 kHz. = 1/(2LCL) 2 (6) Component selection s + [1 (RLCL)]s + [1 (2LCL)] The output are key elements in the perform- ance of the Class-D system. The most important specifications for the inductors are the = 1 fC (7) DC and peak current ratings. These must be chosen to 2π 2LC L avoid magnetic saturation of the . Magnetic saturation greatly increases distortion in the circuit as the where RL is the DC resistance of the speaker. The factor of 2L is due to the conversion from the half circuit to BTL power is increased and can be minimized by choosing an values. Frequency scaling ω = 2πf gives the final inductor with a current rating greater than the sum of the 0 C DC and AC current components. Shielded inductors will Equations 8 and 9 for determining CL and L. Table 1 shows various values for L and C for a given f and R . also help reduce distortion and EMI and minimize cross- L C L talk. The output filter capacitors, C, in Figure 3 provide high-frequency paths for the switching frequency and = 1 = 1 CL (8) and assist in supplying charge to the load. Capacitors with 2 × R ω 2 2 × πR f L 0 L C a low equivalent series resistance (ESR) and stability over the required voltage and temperature are recom- mended. These capacitors are empirically chosen to be Table 1. Second-order Butterworth L-CL values approximately 20% of CL. DC LOAD CUTOFF INDUCTOR CAPACITOR Layout considerations RESISTANCE, FREQUENCY, VALUE, VALUE, Ω Good layout practices and a well thought-out design are RL ( ) fC (kHz) L (µH) CL (µF) 4 20 22.5 1.41 critical toward obtaining maximum performance levels 4 25 18.0 1.13 from the TPA005D14 amplifier. The main areas of concern 4 30 15 0.94 are the ground plane, power plane and the audio input 4 35 12.9 0.80 and output. Each is discussed briefly below. Refer to 8 20 45 0.70 Figure 2 for pin numbers and names. See the Class-D 8 25 36 0.56 application notes and user guides at the Texas Instruments 1 8 30 30 0.47 website for more information on the Class-D APA. 8 35 26 0.40

Figure 4. Measured response of the TPA005D14 EVM

20

15 )

B 10 d (

n i a 5 G

0

-5

100 1 k 10 k 100 k Frequency (Hz)

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Analog and Mixed-Signal Products August 1999 Analog Applications Texas Instruments Incorporated Amplifiers: Audio Power

Ground plane at a point near the large decoupling capacitor. The small Experimentation with several types of ground planes inductance of the traces and the charge supplied by the has shown that with good planning and layout practices a large decoupling capacitor greatly reduce the ripple current solid ground plane works as well as other types of ground- of the main power bus at these pins. The demand for ing schemes. This is due in part to the system’s relatively transient currents is small and is satisfied by placing 1-µF low frequencies of operation and to the careful layout of capacitors adjacent to the VDD pin and PVDD pin 21. The the components and traces. The solid ground plane also main power bus should terminate into the LPVDD and serves to assist the PowerPADTM 3 in the dissipation of heat, RPVDD pins, with a 1-µF capacitor placed adjacent to keeping the amplifier relatively cool and eliminating the each pair of pins. A 10-µF capacitor is then placed between need for an external heat sink. The pinout of the TPA005D14 the power pins and the large decoupling capacitor. These allows good separation of the inputs and outputs, minimiz- traces should be symmetric and wide to facilitate even ing ground return paths and high frequency loops. It is power distribution and should be directly over the ground important that any components connecting an IC pin to to reduce EMI and minimize the ground return path. the ground plane be connected to the nearest ground for Inputs and outputs that particular pin. Table 2 lists the ground pins for the The Class-D input traces should be kept as short as main sections of the Class-D audio power amplifier. Care possible between the ac coupling capacitors and the should be taken to prevent the ground return path of any amplifier inputs to reduce noise pickup. The inputs must high current components (e.g. the output filter capaci- be separated from the outputs, particularly the inductors, tors) from directly passing through other ground connec- to minimize magnetic coupling. The headphone traces tions of the IC, particularly the input. may be in close proximity to the Class-D output since the Table 2. Ground pins two amplifiers are not active at the same time. It is criti- cal to minimize the trace lengths between the device out- GROUND APPLICABLE RELATED IC PINS put pins and the LC filter components, particularly those PIN CIRCUITS that contain the full 250-kHz square wave. These traces 47 Controls (shutdown, 1, 2, 3 should be capable of handling a maximum rms current of mute, mode) at least 0.7 amps without distorting the signal, and peak Class-D inputs 4, 5, 44, 45 currents of at least 1 amp. The traces to the inductors Ramp generator 6, 43, 48 should be kept short but separated from the input circuit Grounds 7, 46 as much as possible and should be placed on adjacent lay- Input power (VDD) 8 ers so that they overlap to reduce the EMI. Fault indicators 41, 42 12, 13, Output power (LPVDD, 9, 16, 33, 40 Summary 36, 37 RPVDD) The methods described have been successfully used in Class-D outputs 10, 11, 14, 15, 34, 35, 38, 39 the design of the TPA005D14 Class-D Audio Power 20 Headphone 17, 18, 19, 29, 30, 31, 32 Amplifier EVM, SLOP 204, providing typical THD+N 27 21, 22, 23, 24, 25, 26, 28 measurements of 0.1% for a 1-kHz, 1-watt output into a 4- load. Three power decoupling capacitors provide a Power plane quick, smooth response to the large current demands of The chip has three main power sections: the input cir- the output circuit and, with proper layout, are able to cuit power pins (VDD), the output stage power pins supply the transients to the input circuit and charge (LPVDD and RPVDD) and the power for the headphone pump. A solid ground plane is effective when components and charge pump circuits (PVDD). When the device is are placed close to the ground pin for their circuit, and fully operational, the VDD pin draws only a few milliamps ground and high-frequency bypass loops are minimized. of current and the PVDD pins draw several tens of milli- EMI and distortion are greatly reduced by keeping the amps, in contrast to the amps of current drawn by the input traces short and ac-coupling all inputs, minimizing LPVDD and RPVDD pins. The power traces should be the output trace lengths to the filter and overlapping the kept short and the decoupling capacitors placed as close to output traces to the inductors of each channel on adja- the power pins as possible. It is important to terminate cent layers. the capacitor ground close to the ground for the particu- References lar power section while paying attention to ground return current paths. This minimizes ground loops and provides 1. http://www.ti.com/audio very short ground return paths and high-frequency loops. 2. “TPA005D02 Class-D Stereo Audio Power Amplifier The VDD pin supplies power for sensitive analog circuitry. Evaluation Module User’s Guide,” Texas Instruments It is the most sensitive pin of the device and must be kept Inc., September 1998, literature number SLOU032; as noise free as possible. The PVDD pins are not as sensi- http://www-s.ti.com/sc/techlit/slou032 tive to noise as the VDD pin and supply the current for the 3. “PowerPAD Thermally Enhanced Package,” Technical headphone regulator and control circuits when the device Brief, Texas Instruments Inc., literature number is in Class-AB mode and for the charge pump circuit when SLMA002; http://www-s.ti.com/sc/techlit/slma002 in Class-D mode. The power traces for the VDD and PVDD power inputs should be connected to the main power bus

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