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Home , Amplifier, Capacitor, Clipping (audio), Common emitter, Inductor

The Bipolar Junction (BJT) • Transistor operation. • CE and CB transistor connections. • Transistor d.c. . Base bias, emitter base current bias, bias, constant emitter current bias, two divider bias e.t.c. • The DC and the Q point. • and bypass . • The T and the π hybrid transistor models. • Small and small BJT . • Transistor voltage A. • The AC load line and optimum Q point selection. • Amplifier efficiency. Class A, B and class C amplifiers. • Push pull and complementary symmetry amplifiers. • Emitter followers and Darlington pairs. When we connect a p type material with

Depletion an n type one holes from the p material region migrate into the an and electrons from the n migrate into the p type material. As a result around the pn junction a is formed void from electrons an holes that acts as an prohibiting the flow of charges. If we p n reverse bias the by holding the p type material in lower potential than the n type (as shown in the figure) the depletion region widens since the holes will move more to the left and the electrons more to the right. will not flow through the diode UNLESS: Electric current will not flow through the Depletion e region diode UNLESS, with some miraculous way e e e e we manage to inject the wrong charge e carriers into the wrong region.Here this e e miraculous way is indicated with the funnel e that injects electrons (the wrong charge e e e carriers) into the p region. These electrons p n will be pushed by the battery into the depletion region where the points from right to left (opposite to the one generated by the battery) and they are being propelled to the n region. Thus we have an electric current passing through a junction reverse biased. The transistor provides a mechanism for injecting the “wrong” polarity charges into either the p or the n type of a reverse biased junction. This mechanism is nothing more than a forward biases np junction to the right of the reverse biased pn junction shown in the figure. We make first of all the p region smaller emitter collector than the two n regions so that we ensure base ourselves that the depletion region will n p n cover the whole p region and therefore all the wrong type charges injected in the p region will be propelled to the rightmost n region through the reverse biased pn junction. Remember that the electric field in the depletion region acts as a barrier for the holes in the p region but propels the electrons. We will name the middle p region the base the n region of the forward biased diode the emitter and the n region of the reverse biased diode that collects the charges emitted by the forward biased diode, the collector. Almost all (99%) of the forward biased emitter-base diode will enter (collected) in the collector. The current passing down from the base is almost 0. The emitter base voltage is approximately 0.7V for a Si transistor. Caution : In order for the transistor to emitter collector correctly, that is in order for the collector to base collect all the charges injected to the base n p n from the emitter it is not enough that the emitter base junction be forward biased. The base collector junction MUST be reverse biased. If the BE junction becomes forward biased the transistor current stops and the transistor becomes saturated. As we will see the collector emitter combination CE behaves like a mental open. Common emitter or CE configuration of the transistor is when the emitter is shared by both the input and the output as shown in the figure. It is the most commonly used configuration of the transistor and we will examine it here in more detail. (Another configuration is the common base CB where the base is shared by the input and output.) In the picture the very small base

current (controlled by V B1 ) controls the very large collector current flowing from the emitter to the collector.

The same things hold for a pnp transistor. For such a transistor simply we have to change the polarity of the shown in the figure to ensure forward bias of the base emitter and reverse bias of the base collector junctions. Schematic representation of an n - p - n transistor. In order for a transistor to be useful for us, we need to connect it with external d.c. supplies and . This is called transistor biasing . This biasing fixes the operating point, or Q point of the transistor that is the set of two currents (base current I B and collector = emitter current, I C=I E) as well as two voltages, the voltage difference between the base and the emitter V BE , and the voltage difference between the collector and the emitter V CE ). We use the following notation for the d.c. bias voltages:

We symbolize external d.c. voltages with the capital letter V and double capital subscripts (e.g. V CC , V BB , V EE ).

We symbolize the d.c. voltage (with respect to the circuit ) of a particular transistor lead with the capital letter V, with subscript the capital letter for the particular transistor lead (e.g. V E the Emitter voltage, V B the Base voltage, V C the Collector voltage).

We symbolize the d.c. voltage difference between two transistor leads with the capital letter V and two capital letters standing for the transistor leads (e.g. V BE is the d.c. voltage difference between the base and the emitter, V CE is the dc voltage difference between the collector and the emitter and V EB is the voltage difference between the emitter and the base). Since the Base – Emitter junction must always be forward biased the d.c. voltage difference between the Base and the emitter should be always around 0.7 for a Si transistor. V BE = 0.7V (for rough estimations some times we may approximate that voltage with 0Volts).

The Collector – Base junction must always be reverse biased.

Since 99.9% of the charge carriers generated at the Emitter (due to the forward biasing of the Base Emitter junction) move on to the Collector we note two things.

A. The collector current is almost equal to the emitter current. IC=I E, and it is almost 100% due to these “wrong” charge carriers generated at the Emitter. That is we usually ignore the current due to the reverse biasing of the collector base junction.

B. The emitter current is proportional to the base current by a (large) value β. I C = βIB. The value is between 100 and 300, varies with Temperature and in the data sheet is noted by the letter hFE . A transistor working as an amplifier must have a Q point away from both and cutoff. It must work as we say in the Active region.

A transistor employed in a logical gate, works in the saturation and cutoff regions. Its operation between these two regions and it has only two possible outputs. A low and a high. In order for a transistor to work as an amplifier we first choose it Q (operating) point via d.c. biasing . Then we superimpose the signal to be amplified which is an a.c. signal (it may contain a lot of harmonics but no dc component). The a.c. source is connected to the transistor via a the purpose of which is to isolate the voltages and currents of the transistor from the a.c. signal source circuitry. The same way if the amplified a.c. signal from the capacitor needs to be fed to further transistor amplifier stages the connection is done via a capacitor which isolates the d.c. voltages and currents of the first transistor (first amplifier stage) from the d.c. voltages and currents of the second transistor (second amplifier stage). This way we have independence of the Q point of the transistor form previous and subsequent stages. The capacitors act as open switches for d.c. but as shorts for a.c. signals.

Since a.c. and d.c. signals behave differently in amplifier circuits that contain biased and coupling capacitors, we analyze these circuits differently for d.c. and a.c. signals. In each case we use a different equivalent circuit. The analysis with the d.c. equivalent circuit involves only d.c. voltages and currents and its purpose is to define the operation Q point of each transistor. That is, to guarantee that the transistor is working properly as an amplifier away from the saturation and cutoff regions. The analysis with the a.c. equivalent circuit involves only a.c. signals and its purpose is mainly to find the amplification of each amplifier stage. For a.c. voltages and currents we agree to use the following notation.

We symbolize external d.c. voltages with the lower letter v and double lower subscripts (e.g. υcc , υbb , υcc ).

We symbolize the d.c. voltage (with respect to the circuit ground) of a particular transistor lead with the capital letter V, with subscript the capital letter for the particular transistor lead (e.g. V E the Emitter voltage, V B the Base voltage, V C the Collector voltage).

We symbolize the d.c. voltage difference between two transistor leads with the capital letter V and two capital letters standing for the transistor leads (e.g. V BE is the d.c. voltage difference between the base and the emitter, V CE is the dc voltage difference between the collector and the emitter and V EB is the voltage difference between the emitter and the base). There are three different configurations of using a transistor. Depending on if the ground is on the Emitter, Base or Collector side we have the common Emitter CE, common Base CB, or CC configuration. The common Emitter CE is the most widely used. If in the CE connection we need to find the Base current IB we have:

VBB = IB RB +V BE  IB = (V BB -0.7V)/R B . The Base current vs. the base emitter voltage curve looks like the curve of a forward biased diode.Notice that the base current is fixed by the choice of V BB external dc voltage and R B external resistance.

The Base curve and the Base Current If in the CE connection we need to find the collector emitter voltage difference we have: V CC = +V CE  VCE = V CC -IC RC. The collector current can be taken to be almost equal to the emitter current which is equal to the base current times the beta amplification factor of the transistor I C = I E = βIB. In a transistor the collector current vs. the collector emitter voltage difference (for various base currents) is:

The Base emitter curve and the collector current. When we employ the transistor as an amplifier we want it to work in the Active region where the collector d.c. current is constant independent on the V CE and dependent only of our choice of base current.

If the transistor falls in the cutoff region the collector current is very small although the collector emitter voltage maybe large. The collector emitter side of the transistor behaves like a mental open. This happens when we don’t have enough base current to make the transistor work in the upper Active region.

If the transistor falls in the (left) saturation region, the collector current falls rapidly (the transistor amplification factor the beta becomes low) and the collector emitter voltage behaves like a mental short. This happens when the base current is too large it produces too high collector current and almost all of the external d.c. collector bias voltage, drops on the collector resistor and not on the collector emitter junction.

Therefore the base current must be chosen carefully to be neither too large nor too small. The collector emitter voltage vs. the collector current curve (or the collector curve) along with the load line of the transistor VCC = V CE +I C RC  IC = -VCE /R C+V CC /R C provide some insight for the transistor operation. The collector emitter dc voltage cannot become larger than the external voltage V CC and the collector current cannot become larger than V CC /R C. The designer first calculates the base current and from this he calculates the expected collector current as if the transistor operates in the active region. Then the designer has to ensure himself that his design does not let the transistor fall in the saturation or in the cutoff regions.

If the calculated collector current is larger or equal (or close enough) to V CC /R C the transistor is saturated and the gain drops significantly from the expected active region value (collector emitter mental short).

Then from the collector current (provided the transistor does not saturate) he calculates the collector emitter voltage. If the designer finds the collector emitter voltage equal or (close enough) to VCC (collector emitter mental open) this means that the transistor is working at the cutoff region and the collector current is too low.

Ideally the Q point of the transistor should be located at the middle of the load line in the active region. Emitter bias : In the common emitter CE configuration we fix the emitter current (instead of the base current) by moving the resistance from the base to the emitter. This type of basing generates a more stable Q point immune from changes in the current gain ( β) and is more popular in amplifier designs. Base bias : In the common emitter CE configuration we fix the base current and we attempt to make the transistor work in the active region. The operation of the transistor depends heavily in changes of current gain ( β) due to temperature variations or because we need to change the transistor. This type of biasing is not used usually for amplifier designs but for digital gate designs. Instead the designer opts for emitter bias. bias : A special type of emitter bias where we don’t use separate for the base, but the base voltage is provided from the collector dc voltage via a voltage divider. It is a widely used biasing circuit. Two supply emitter bias : Ground the base provide a positive voltage to the collector and a negative voltage to the emitter.

In a transistor amplifier in the CE configuration the signal to be amplified must contain a.c components only. It is connected to the base of the transistor via a coupling capacitor. This capacitor isolates the d.c voltages and currents that bias the transistor from the signal source and vice versa. The total base voltage is the d.c. base voltage due to the transistor biasing plus the small ac signal voltage. The output amplified signal is taken from the collector or emitter via another bypass capacitor which provides ac isolation of the transistor from the next amplifier stages.

First amplifier stage Second amplifier stage Signal source output resistance CE transistor CE transistor properly properly coupling biased coupling biased coupling capacitor capacitor capacitor

A.C. signal υ source i

The capacitor C 1 acts like an ac short and draws all the ac emitter current and it is called a bypass capacitor. The resistance R E draws all the dc emitter current. Therefore the emitter voltage is at its dc (constant) potential VE and the base emitter voltage is at V BB +υs-VE =0.7V+ υs the constant 0.7 Volts plus the small ac signal voltage. Therefore the base current has its dc component plus a small ac component ib due to the small signal voltage and it is calculated from the forward biased I-V diode curve. This generates an emitter current with two components a dc one I E=I C plus a small ac one ic = ie = ib/β. The ac current ic passes through the resistor R C and therefore the collector has an ac voltage component υc = -icRC which is the output amplified signal superimposed on a dc component V CC -ICRE. The minus sign at the ac output voltage means that the phase difference between the input and the output signal is 180 0 that is, the output signal is reversed. The output signal over the input ac signal is called the gain of the amplifier and the designer needs to calculate it. In order to derive it we need to use the equivalent circuit of the transistor and do the analysis with the equivalent amplifier circuit. The equivalent amplifier circuit is different for ac and dc signals due to the different effect of the bypass capacitors. We have two transistor simple equivalent circuit models, the T model and the π model. Both models should lead us to the same results. THE T TRANSISTOR ic MODEL

ic n ib υb p υb + + ib n / ie re υ ie e - - υe The input resistance of the transistor as seen from the base emitter input / is βre and it can be found as follows:

/ υbe ie re / rinput = zin = = = βre ib ib THE π TRANSISTOR ic MODEL

n υb ib + ib p υb + / ic βre n

ie υe ie - - υe / How much is r e (the emitter resistance)? It is the differential resistance of a forward biased base emitter junction and as you remember it is 25.2mV/I E, where I E is the dc current passing through the emitter.

/ 25 2. mV re = I E Now that we know the equivalent π circuit of the transistor we can write down and analyze the equivalent circuit of the CE voltage divider emitter biased transistor amplifier shown below:

This circuit becomes for ac signals: And we can use this circuit to calculate the ac gain of the voltage amplifier. υ s ⇒ υo = −ie (RC // RL ) = −ib β (RC // RL ) = − / β (RC // RL ) βre R // R r R // R r C L c ⇒ C L c υo = −υs / = −υs / A = / = / re re re re If the signal source has an output resistance R G, its effect is that the input signal at the amplifier is not υs the but the signal appearing at the voltage divider where the first resistance is R G and the second is the / input resistance to the transistor amplifier that is:zin = R 1//R 2// βre . Now we will talk about the difference between the transistor d.c. load line, the a.c. load line and the way to optimally select the Q point of the transistor that is the d.c.

working values of I EQ , I CQ , I BQ and V CEQ . Consider the following circuit.

with:

Rdc = RC + RE

V V ⇒ CE CC The d.c load line is given by the equation: VCC = IC (RC + RE ) +VCE IC = − + Rdc Rdc

If we plot I C as a function of V CE we get the d.c. load line of the transistor. If we plot I C as a function of V CE the dc load line with slope –1/Rdc intersects the horizontal V CE axis at the point (V CE )max = V CC (the maximum value of V CE )and the perpendicular I C axis at the point (I C)max =V CC /Rdc (the maximum value of the collector current I C). If the collector current is very close to V CC /Rdc the transistor becomes saturated, the current gain drops dramatically and the CE connection behaves like a mental short. If the CE voltage is very close to V CC the collector current becomes 0 and the transistor is at its cuttoff. The CE connection behaves like a mental open . The designer chooses the operating Q values of the transistor I CQ ,V CEQ ,I BQ somewhere in the active region of the dc load line. When I have an ac signal at the base of the transistor the small ac signal is superimposed at the dc bias voltages and currents of the transistor. That is the collector current becomes iC = I CQ +ic and υCE = V CEQ +υce , where υce and ic are the small ac components and the are the total ac+dc voltages and currents. Now the question is what is the line that represents the iC as a function of υCE ? This line is called the ac load line of the transistor and it is different than the dc load line because the transistor has a different equivalent circuit for ac and dc signals. That is ac signals behave differently than the dc voltages and currents. This happens because of the bypass and coupling capacitors. They are like a short to the ac signals and like an open switch to the dc signals. Therefore the ac signals are not for example going to see the RE emitter resistance. In order to find the ac equivalent circuit (and therefore the ac load line) we: 1) Short all the capacitors 2) use the T or the hybrid equivalent of the transistor and 3) we ground all the dc power supplies. If we do this we arrive at the circuit: By using υce =-icRdc and υCE = V CEQ +υce , iC = I CQ +ic we arrive at the ac load line of the transistor:

υCE VCEQ υce = −ic Rac ⇒υCE −VCEQ = −(iC − ICQ )Rac ⇒ iC = − + + ICQ Rac Rac This line cuts the horizontal axis υ at the point CE (υCE ) max = VCEQ + Rac I CQ And if we use the equation for the dc load line and the fact that the Q dc values of the voltages and currents belong at this line then we have:

VCC = I CQ Rdc + VCEQ (υCE )max = VCC − (Rdc − Rac )ICQ

We can therefore see that the maximum value of the total CE voltage (dc+ac) is less than

VCC the value indicated by the dc load line, since the dc resistance is higher than the ac. V The ac load line cuts the perpendicular axis i at the point CEQ C (iC ) max = + I CQ Rac And if we use the equation for the dc load line and the fact that the Q dc values of the voltages and currents belong at this line then we have: V   CC  1 1  VCC = I CQ Rdc + VCEQ (iC ) max = +VCEQ  −  Rdc  Rac Rdc  We can therefore see that the maximum value of the total C current (dc+ac) is larger than

VCC /Rdc the value indicated by the dc load line, since the dc resistance is higher than the ac. If we look at the ac load line we can also observe that the I CQ and VCEQ dc quiescent values belong to this line therefore the ac load line cuts the dc load line exactly at the Q point. V If we plot the ac load line we get: υCE CEQ iC = − + + ICQ Rac Rac If we look at the ac load line at the previous page we see that the output ac signal swings

around the dc Q value. The maximum output ac signal υce we can have without any is either V CEQ or ICQ Rac whichever is larger. Do not forget that the transistor clips what ever is beyond the cutoff and below the saturation points, and keeps only the output within the active region of the transistor. In order to maximize the output signal swing and the transistor’s efficiency the designer chooses the Q point, in the middle of the ac load line . We have:

Rac I CQ = VCEQ = VCC − I CQ Rdc ⇒

VCC VCC Rac I CQ = VCEQ = Rdc + Rac Rdc + Rac

These are the optimum values of the transistor’s quiescent bias collector dc current and collector emitter dc voltage for maximum possible output signal swing and transistor efficiency as an amplifier. A transistor biased in such a way to be used as an amplifier is called class A amplifier. Its maximum possible efficiency is 25% (too low for applications in appliances working with batteries). Lets try to calculate the efficiency of the amplifier when there is maximum output swing. The delivered to the load is: Lets try to calculate the efficiency of the amplifier when there is maximum output swing. The ac power delivered to the load is: υ 2 i 2 R 2 I 2 R 2 P = ce ,rms = c,rms ac = CQ ac L R R 2R L L L 2 ICQ Rac The total ac power delivered to both R and R is: L C Pac = P 2 The amplifier efficiency is defined as: η = ac where P CC is the total dc power supplied by the PCC external voltages (here V CC ) and is P CC = V CC ICQ . Therefore the efficiency is: P I R R R // R η = ac = CQ ac = ac = C L ⇒ PCC 2VCC (2 Rac + Rdc ) (2 RC // RL + RC + RE ) R R η = L C 2[]RL RC + (RC + RE RC )(+ RL )

1 1 If we ignore R E(<

(PC )min =< υCE iCE >avg =< (VCEQ +υce )( ICQ + ic ) >avg = 2 2 = VCEQ ICQ + <υce ic >= VCEQ ICQ − < ic Rac >= VCEQ ICQ − ic,rms Rac ⇒ I 2 R (P ) = V I − I 2 R − CQ ac C min CC CQ CQ dc 2

We observe the interesting fact that if there is an output ac signal at my amplifier the transistor consumes less power (it gets less hot) than when the amplifier is on but without any without any ac signal to amplify. The total power spent by the power supply is spent as

dc power at the R C, R E resistors (at the dc resistance Rdc ) and at the transistor (collector base reverse biased junction) and as ac power at R C and at the load resistors (at the ac resistance Rac) One way to improve the efficiency of a class A amplifier is to use instead of a collector resistor

RC an L with 0 resistance and very large .The (very large) inductor will act as a short for the dc current and as an open switch for the ac current.

Therefore Rdc = R E and Rac = R L. For the inductor coupled class A amplifier for maximum output swing and maximum amplifier efficiency we need to choose:

VCC VCC VCC I CQ = = ≈ Rac + Rdc RC + RE RC

VCC RC VCEQ = I CQ Rac = ≈ VCC RC + RE

Therefore the transistor for very small resistance R E (which is usually the case) is working almost at cutoff. The dc power provided by the power supply and the ac power consumed by the load are:

V 2 P = V I ≈ CC and therefore the (maximum) efficiency of the transistor (achieved CC CC CQ when the output has its maximum swing) is 50%. RL 2 2 I CQ RL VCC Pac = ≈ 2 2RL This is a plot of the dc and ac load lines for the class A inductor coupled amplifier we examined. Observe that first, the transistor is working near the cutoff (for very small values of

RE) and second that the dc load line is almost normal (for also very small values of R E). The efficiency of a class A amplifier where the transistor works entirely in the active region , is disturbingly low. This means that my dc power supply has to spend a lot of power to maintain the Q point of the transistor (that is to maintain the transistor in the active region) and only a small part of the dc power is spend for the ac amplified output signal. The best we can do as we saw is 25% (we can reach 50% with , but they are bulky and difficult to be implemented into IC circuits). Therefore a class A amplifier is not the best choice for an efficient device especially for household appliances operating with batteries.

The situation is vastly improved with the so called class B amplifier where in a single stage, two transistors are employed each conducting only during half of the period of the ac signal. The Q operating point of each transistor is set at exactly the cutoff and therefore the quiescent d.c. collector current is 0.

During the first part of the output signal (then the output signal is positive) the first transistor is conducting providing the output signal to the load. During the second part of the output signal period (when the output signal is negative) the other transistor is conducting providing the output signal to the load. Such a transistor arrangement sometimes is called push – pull configuration. The efficiency of such an amplifier can reach almost 80%.

Next we will examine an amplifier where the signal source and the load are coupled to the transistors via . This is a class B amplifier (inductor coupled) with two transistors in push-pull configuration. It is obvious that not both transistors could be conducting. When the input signal is positive Q1 is conducting and Q2 is cutoff. When the input signal is negative the opposite holds.

This is the ac and dc load lines of the Q1 transistor. When the input signal is positive and Q1 conducts υCE falls below VCC and the transistor conducts. During the negative cycle of the input signal Q1 is cutoff. Next we will try to find the efficiency of the amplifier.During half of the cycle of the input signal

Q1 conducts and its collector current is i c1 (t)=imax sin(ωt). The average power spent by the dc power supply is: 1 π 2 ⇒ PCC = ∫VCC imax sin ()()ωt d ωt PCC ≈ VCC imax π 0 π 1 The average ac power consumed at the load is: P = i 2 R / L 2 max L / PL π imax RL The amplifier efficiency is: η = = ⋅ PCC 4 VCC

/ Since for maximum output swing imax = V CC /R L (see the ac load line), the amplifier efficiency becomes: π η = = 78 5. % 4 In order to get more voltage gain we can cascade two (or more) amplifier stages. The (a.c.) output from the first stage feeds via a a second stage. The total gain is the product of the gains of each individual stage. For example consider the following two stage amplifier.Each of the two transistors is biased identically so both stages have the same Q point. We need to find the equivalent a.c. circuit. Calculation of the total voltage gain of the two stage VDEB (voltage divider emitter biased) amplifier. The voltage gain depends heavily on the forward biased base emitter resistance which depends on the emitter dc current, on the temperature and of the transistor gain beta. By introducing some a.c. emitter feedback we can further stabilize the a.c. voltage gain. AC emitter feedback

This type of connection makes the amplifier gain independent from transistor parameters and reduces ac signal . A.C. emitter feedback. We can further stabilize the a.c. gain by leaving some of the emitter resistance un-bypassed for the a.c. signal. The circuit appears below. We assume that the signal source does not have an output resistance R G. This is the a.c. equivalent circuit for a CE stage with a.c. emitter feedback. The a.c. gain now is not so much dependent on the transistor. CC emitter follower

This type of connection although offers no voltage gain it provides flexibility with respect to the output resistance. It is usually used to mach the amplifier with the load and it appears as final stage at an amplifier. Emitter follower (or Common Collector CC) transistor amplifier. If we use no collector resistance

RC and no bypass capacitor at the emitter resistance RE we can get the ac output signal from the transistor emitter. This type of transistor connection has some interesting properties.

In order to calculate the output resistance first we calculate the current. Then we calculate the open circuit voltage. This is the final expression for the output resistance. By manipulating R 1, R 2, RE we can make the output resistance equal to the load resistance for maximum ac power transfer to the load.

Complementary Symmetry Amplifiers . By taking advantage that we can have transistors with two different polarities (npn and pnp) we can connect two transistors the way shown in the figure. If the transistors have exactly the same properties then VAQ = 0. Also if the signal is positive Q1 is conducting and Q2 is cut off. When the signal is negative Q1 is cut off and Q2 is conducting. Essentially each transistor behaves exactly like the class B amplifier transistor we have examined.