The Bipolar Junction Transistor (BJT) • Transistor operation. • Common emitter CE and common base CB transistor connections. • Transistor d.c. biasing. Base bias, emitter base current bias, shunt feedback bias, constant emitter current bias, two resistor voltage divider bias e.t.c. • The DC load line and the Q point. • Coupling and bypass capacitors. • The T and the π hybrid transistor models. • Small signal and small frequency BJT amplifiers. • Transistor amplifier voltage gain A. • The AC load line and optimum Q point selection. • Amplifier efficiency. Class A, B and class C amplifiers. • Push pull and complementary symmetry amplifiers. • Emitter followers and Darlington pairs. When we connect a p type material with Depletion an n type one holes from the p material region migrate into the an and electrons from the n migrate into the p type material. As a result around the pn junction a depletion region is formed void from electrons an holes that acts as an insulator prohibiting the flow of charges. If we p n reverse bias the diode by holding the p type material in lower potential than the n type (as shown in the figure) the depletion region widens since the holes will move more to the left and the electrons more to the right. Electric current will not flow through the diode UNLESS: Electric current will not flow through the Depletion e region diode UNLESS, with some miraculous way e e e e we manage to inject the wrong charge e carriers into the wrong region.Here this e e miraculous way is indicated with the funnel e that injects electrons (the wrong charge e e e carriers) into the p region. These electrons p n will be pushed by the battery into the depletion region where the electric field points from right to left (opposite to the one generated by the battery) and they are being propelled to the n region. Thus we have an electric current passing through a junction reverse biased. The transistor provides a mechanism for injecting the “wrong” polarity charges into either the p or the n type of a reverse biased junction. This mechanism is nothing more than a forward biases np junction to the right of the reverse biased pn junction shown in the figure. We make first of all the p region smaller emitter collector than the two n regions so that we ensure base ourselves that the depletion region will n p n cover the whole p region and therefore all the wrong type charges injected in the p region will be propelled to the rightmost n region through the reverse biased pn junction. Remember that the electric field in the depletion region acts as a barrier for the holes in the p region but propels the electrons. We will name the middle p region the base the n region of the forward biased diode the emitter and the n region of the reverse biased diode that collects the charges emitted by the forward biased diode, the collector. Almost all (99%) of the forward biased emitter-base diode will enter (collected) in the collector. The current passing down from the base lead is almost 0. The emitter base voltage is approximately 0.7V for a Si transistor. Caution : In order for the transistor to work emitter collector correctly, that is in order for the collector to base collect all the charges injected to the base n p n from the emitter it is not enough that the emitter base junction be forward biased. The base collector junction MUST be reverse biased. If the BE junction becomes forward biased the transistor current stops and the transistor becomes saturated. As we will see the collector emitter combination CE behaves like a mental open. Common emitter or CE configuration of the transistor is when the emitter is shared by both the input and the output as shown in the figure. It is the most commonly used configuration of the transistor and we will examine it here in more detail. (Another configuration is the common base CB where the base is shared by the input and output.) In the picture the very small base current (controlled by V B1 ) controls the very large collector current flowing from the emitter to the collector. The same things hold for a pnp transistor. For such a transistor simply we have to change the polarity of the voltages shown in the figure to ensure forward bias of the base emitter and reverse bias of the base collector junctions. Schematic representation of an n - p - n transistor. In order for a transistor to be useful for us, we need to connect it with external d.c. power supplies and resistors. This is called transistor biasing . This biasing fixes the operating point, or Q point of the transistor that is the set of two currents (base current I B and collector = emitter current, I C=I E) as well as two voltages, the voltage difference between the base and the emitter V BE , and the voltage difference between the collector and the emitter V CE ). We use the following notation for the d.c. bias voltages: We symbolize external d.c. voltages with the capital letter V and double capital subscripts (e.g. V CC , V BB , V EE ). We symbolize the d.c. voltage (with respect to the circuit ground) of a particular transistor lead with the capital letter V, with subscript the capital letter for the particular transistor lead (e.g. V E the Emitter voltage, V B the Base voltage, V C the Collector voltage). We symbolize the d.c. voltage difference between two transistor leads with the capital letter V and two capital letters standing for the transistor leads (e.g. V BE is the d.c. voltage difference between the base and the emitter, V CE is the dc voltage difference between the collector and the emitter and V EB is the voltage difference between the emitter and the base). Since the Base – Emitter junction must always be forward biased the d.c. voltage difference between the Base and the emitter should be always around 0.7 Volts for a Si transistor. V BE = 0.7V (for rough estimations some times we may approximate that voltage with 0Volts). The Collector – Base junction must always be reverse biased. Since 99.9% of the charge carriers generated at the Emitter (due to the forward biasing of the Base Emitter junction) move on to the Collector we note two things. A. The collector current is almost equal to the emitter current. IC=I E, and it is almost 100% due to these “wrong” charge carriers generated at the Emitter. That is we usually ignore the current due to the reverse biasing of the collector base junction. B. The emitter current is proportional to the base current by a (large) value β. I C = βIB. The value is between 100 and 300, varies with Temperature and in the data sheet is noted by the letter hFE . A transistor working as an amplifier must have a Q point away from both saturation and cutoff. It must work as we say in the Active region. A transistor employed in a logical gate, works in the saturation and cutoff regions. Its operation switches between these two regions and it has only two possible outputs. A low and a high. In order for a transistor to work as an amplifier we first choose it Q (operating) point via d.c. biasing . Then we superimpose the signal to be amplified which is an a.c. signal (it may contain a lot of harmonics but no dc component). The a.c. source is connected to the transistor via a capacitor the purpose of which is to isolate the dc bias voltages and currents of the transistor from the a.c. signal source circuitry. The same way if the amplified a.c. signal from the capacitor needs to be fed to further transistor amplifier stages the connection is done via a capacitor which isolates the d.c. voltages and currents of the first transistor (first amplifier stage) from the d.c. voltages and currents of the second transistor (second amplifier stage). This way we have independence of the Q point of the transistor form previous and subsequent stages. The capacitors act as open switches for d.c. signals but as shorts for a.c. signals. Since a.c. and d.c. signals behave differently in amplifier circuits that contain biased transistors and coupling capacitors, we analyze these circuits differently for d.c. and a.c. signals. In each case we use a different equivalent circuit. The analysis with the d.c. equivalent circuit involves only d.c. voltages and currents and its purpose is to define the operation Q point of each transistor. That is, to guarantee that the transistor is working properly as an amplifier away from the saturation and cutoff regions. The analysis with the a.c. equivalent circuit involves only a.c. signals and its purpose is mainly to find the amplification of each amplifier stage. For a.c. voltages and currents we agree to use the following notation. We symbolize external d.c. voltages with the lower letter v and double lower subscripts (e.g. υcc , υbb , υcc ). We symbolize the d.c. voltage (with respect to the circuit ground) of a particular transistor lead with the capital letter V, with subscript the capital letter for the particular transistor lead (e.g. V E the Emitter voltage, V B the Base voltage, V C the Collector voltage). We symbolize the d.c.