Chapter 3 Basics Semiconductor Devices and Processing

Hong Xiao, Ph. D. www2.austin.cc.tx.us/HongXiao/Book.htm

Objectives

• Identify at least two semiconductor materials from the periodic table of elements • List n-type and p-type dopants • Describe a diode and a MOS transistor • List three kinds of chips made in the semiconductor industry • List at least four basic processes required for a chip manufacturing

1 Topics

• What is semiconductor • Basic semiconductor devices • Basics of IC processing

What is Semiconductor

• Conductivity between conductor and insulator • Conductivity can be controlled by dopant • Silicon and germanium • Compound semiconductors –SiGe, SiC – GaAs, InP, etc.

2 Periodic Table of the Elements

Semiconductor Substrate and Dopants

Substrate

P-type Dopant

N-type Dopants

3 Orbital and Energy Band Structure of an Atom Valence shells Conducting band, Ec

Nuclei Band gap, Eg

Valence band, Ev

Band Gap and Resistivity

Eg = 1.1 eV Eg = 8 eV

Aluminum Sodium Silicon Silicon dioxide 2.7 µΩ•cm 4.7 µΩ•cm ~ 1010 µΩ•cm > 1020 µΩ•cm Conductors Semiconductor Insulator

4 Crystal Structure of Single Crystal Silicon Shared electrons Si

Si Si Si Si

Si Si Si Si Si

Si Si Si - Si

Why Silicon

• Abundant, inexpensive • Thermal stability • Silicon dioxide is a strong dielectric and relatively easy to form • Silicon dioxide can be used as diffusion doping mask

5 N-type (Arsenic) Doped Silicon and Its Donor Energy Band

Conducting band, Ec Si Si Si Extra E ~ 0.05 eV Electron d Si As Si Eg = 1.1 eV

Si Si - Si

Valence band, Ev

P-type (Boron) Doped Silicon and Its Donor Energy Band

Conducting band, E Si Si Si c Hole Eg = 1.1 eV Si B Si

Ea ~ 0.05 eV Si Si - Si Valence band, E Electron v

6 Illustration of Hole Movement

Conducting band, Ec Conducting band, Ec Conducting band, Ec

Electron Eg = 1.1 eV Electron Eg = 1.1 eV Electron Eg = 1.1 eV

Ea ~ 0.05 eV

Valence band, Ev Valence band, Ev Valence band, Ev Hole Hole Hole

Dopant Concentration and Resistivity

Resistivity

P-type, Boron

N-type, Phosphorus

Dopant concentration

7 Dopant Concentration and Resistivity • Higher dopant concentration, more carriers (electrons or holes) • Higher conductivity, lower resistivity • Electrons move faster than holes • N-type silicon has lower resistivity than p- type silicon at the same dopant concentration

Basic Devices

• Resistor • Capacitor •Diode • Bipolar Transistor • MOS Transistor

8 Resistor

ρ l h w l R = ρ wh ρ: Resistivity

Resistor

• Resistors are made by doped silicon or polysilicon on an IC chip • Resistance is determined by length, line width, height, and dopant concentration

9 Capacitors

κ l

hl h C = κ d d κ: Dielectric Constant

Capacitors

• Charge storage device • Memory Devices, esp. DRAM • Challenge: reduce capacitor size while keeping the capacitance •High-κ dielectric materials

10 Capacitors

Dielectric Layer

Dielectric Poly 2 Layer Poly Si Si Poly Si Oxide Si Poly 1 Heavily Doped Si

Parallel plate Stacked Deep Trench

Metal Interconnection and RC Delay

Dielectric, κ Metal, ρ

I l

d w

11 Diode

• P-N Junction • Allows electric current go through only when it is positively biased.

Diode

V1 V2

P1 P2

current 1 2 • V > V , • P1 > P2, current

• V1 < V2 ,no current •P1 < P2, no current

12 Figure 3.14

Transition region

−− + + −− + + −− + + PN−− + + −− + +

Vn V0 Vp

Intrinsic Potential

kT NaNd V0 = ln 2 q ni

• For silicon V0 ~ 0.7 V

13 I-V Curve of Diode

I

V

-I 0

Bipolar Transistor

• PNP or NPN • Switch • Amplifier • Analog circuit • Fast, high power device

14 NPN and PNP Transistors

E B E C

B NNP

C

C B E C B PPN E

NPN Bipolar Transistor

Emitter Base Collector Al•Cu•Si

SiO2 n+ p n+ p+ p+ n-epi Electron flow n+ buried layer P-substrate

15 Sidewall Base Contact NPN Bipolar Transistor

Metal CVD oxide CVD CVD Base Emitter oxide oxide Collector

Poly ppn+ Field Field Field n Epi + oxide oxide n oxide n+ Buried Layer

P-substrate

MOS Transistor

• Metal-oxide-semiconductor • Also called MOSFET (MOS Field Effect Transistor) • Simple, symmetric structure • Switch, good for digital, logic circuit • Most commonly used devices in the semiconductor industry

16 NMOS Device Basic Structure

V G VD

VG “Metal” Gate

Ground VD n+ n+ p-Si Source Drain

NMOS Device

Positive charges

VG > VT > 0 V > 0 VG = 0 VD Electron flow D

“Metal” Gate + + + + + + + SiO2 SiO2 −−−−−−− n+ n+ n+ n+ p-Si p-Si Source Drain Source Drain

No current Negative charges

17 PMOS Device

Negative charges

Hole flow VG < VT < 0 V > 0 VG = 0 VD D

“Metal” Gate

SiO SiO −−−−−−− 2 2 + + + + + + + p+ p+ p+ p+ n-Si n-Si Source Drain Source Drain

No current Positive charges

MOSFET

18 MOSFET and Drinking Fountain

MOSFET Drinking Fountain

• Source, drain, gate • Source, drain, gate valve • Source/drain biased • Pressurized source • Voltage on gate to • Pressure on gate (button) turn-on to turn-on • Current flow between • Current flow between source and drain source and drain

Basic Circuits

• Bipolar •PMOS •NMOS • CMOS •BiCMOS

19 Devices with Different Substrates

• Bipolar Dominate Silicon • MOSFET IC industry •BiCMOS Germanium • Bipolar: high speed devices

• GaAs: up to 20 GHz device Compound • Light emission diode (LED)

Market of Semiconductor Products Compound 100% 4% } 8% Bipolar

50% MOSFET 88%

1980 1990 2000

20 Bipolar IC

• Earliest IC chip • 1961, four bipolar transistors, $150.00 • Market share reducing rapidly • Still used for analog systems and power devices • TV, VCR, Cellar phone, etc.

PMOS

• First MOS field effect transistor, 1960 • Used for digital logic devices in the 1960s • Replaced by NMOS after the mid-1970s

21 NMOS

• Faster than PMOS • Used for digital logic devices in 1970s and 1980s • Electronic watches and hand-hold calculators • Replaced by CMOS after the 1980s

CMOS

• Most commonly used circuit in IC chip since 1980s • Low power consumption • High temperature stability • High noise immunity • Symmetric design

22 CMOS Inverter

Vdd

PMOS

V in Vout

NMOS

Vss

CMOS IC

+ + n Source/DrainGate Oxide p Source/Drain

Polysilicon

p-Si STI n-Si USG Balk Si

23 BiCMOS • Combination of CMOS and bipolar circuits • Mainly in 1990s • CMOS as logic circuit • Bipolar for input/output • Faster than CMOS • Higher power consumption • Likely will have problem when power supply voltage dropping below one volt

IC Chips

•Memory • Microprocessor • Application specific IC (ASIC)

24 Memory Chips

• Devices store data in the form of electric charge • Volatile memory – Dynamic random access memory (DRAM) – S random access memory (SRAM) • Non-volatile memory – Erasable programmable read only memory (EPROM) –FLASH

DRAM

• Major component of computer and other electronic instruments for data storage • Main driving force of IC processing development • One transistor, one capacitor

25 Basic DRAM Memory Cell

Word line

NMOS

Capacitor

Bit line Vdd

SRAM

• Fast memory application such as computer cache memory to store commonly used instructions • Unit memory cell consists of six transistors • Much faster than DRAM • More complicated processing, more expensive

26 EPROM

• Non-volatile memory • Keeping data ever without power supply • Computer bios memory which keeps boot up instructions • Floating gate • UV light memory erase

EPROM

Passivation Dielectric V G VD

Inter-poly Poly 2 Control Gate Dielectric Poly 1 Floating Gate Gate n+ n+ Oxide p-Si Source Drain

27 EPROM Programming

Passivation Dielectric V >V >0 G T VD > 0

Inter-poly Poly 2 Control Gate Dielectric e- e- e- e- e- e- Floating Gate Gate - n+ e n+ Oxide p-Si Source Drain Electron Tunneling

EPROM Programming

Passivation UV light Dielectric V >V >0 G T VD > 0

Inter-poly Poly 2 Control Gate Dielectric e- e- Floating Gate Gate n+ n+ Oxide p-Si Source Drain Electron Tunneling

28 Hong Xiao, Ph. D. www2.austin.cc.tx.us/HongXiao/Boo 57 k.htm

IC Fabrication Processes

Ion implantation, Diffusion Epi, Poly Adding Grown thin film, SiO2 CV Dielectri Deposited thin film PVD Meta Electrical

Wafer Clean Patterned etch Removing Etch Blanket IC Dielectri Strip Fab. CMP Meta Meta Annealing Oxid Heating Reflow Implantati Alloying Exposure (heating)

Patterning Photolithography PR coating (adding) Baking (heating, Developing

29 Basic Bipolar Process Steps

• Buried layer doping • Epitaxial silicon growth • Isolation and transistor doping • Interconnection • Passivation

Buried Layer Implantation

SiO2

n+ P-silicon

30 Epitaxy Grow

n-epi n+ buried layer

P-silicon

Isolation Implantation

p+ p+ n-epi n+ buried layer

P-silicon

31 Emitter/Collector and Base Implantation

+ p + p+ n n p+ n-epi n+ buried layer

P-silicon

Metal Etch SiO 2 Emitter Base Collector Al•Cu•Si

n+ p + p+ n p+ n-epi n+ buried layer

P-silicon

32 Passivation Oxide Deposition

SiO2 Emitter Base Collector Al•Cu•Si CVD oxide n+ p + p+ n p+ n-epi n+ buried layer

P-silicon

MOSFET

• Good for digital electronics • Major driving forces: – Watches – Calculators –PC – Internet – Telecommunication

33 1960s: PMOS Process

• Bipolar dominated • First MOSFET made in Bell Labs • Silicon substrate • Diffusion for doping – Boron diffuses faster in silicon –PMOS

PMOS Process Sequence (1960s)

Wafer clean (R) Etch oxide (R) Field oxidation (A) Strip photo resist (R) Mask 1. (Source/Drain) (P) Al deposition (A) Etch oxide (R) Mask 4. (Metal) (P) Strip photo resist/Clean (R) Etch Aluminum (R) S/D diffusion (B)/Oxidation (A) Strip photo resist (R) Mask 2. (Gate) (P) Metal Anneal (H) Etch oxide (R) CVD oxide (A) Strip photo resist/Clean (R) Mask 5. (Bonding pad) (P) Gate oxidation (A) Etch oxide (R) Mask 3. (Contact) (P) Test and packaging

34 Wafer clean, field oxidation, and photoresist coating

Native Oxide

N-Silicon N-Silicon

Primer Field Oxide Field Oxide

Photoresist

N-Silicon N-Silicon

Photolithography and etch

Source/Drain Mask UV Light Source/Drain Mask Field Oxide

Photoresist PR

N-Silicon N-Silicon

Field Oxide Field Oxide

PR PR

N-Silicon N-Silicon

35 Source/drain doping and gate oxidation

Field Oxide Field Oxide

p+ p+ N-Silicon N-Silicon

Field Oxide Gate Oxide Field Oxide

p+ p+ p+ p+ N-Silicon N-Silicon

Contact, Metallization, and Passivation

Gate Oxide Al∙Si Field Oxide Gate Oxide Field Oxide

p+ p+ p+ p+ N-Silicon N-Silicon

Gate Oxide Field Oxide Gate Oxide CVD Cap Oxide

p+ p+ p+ p+ N-Silicon N-Silicon

36 Illustration of a PMOS

Gate Oxide CVD Cap Oxide

p+ p+ N-Silicon

NMOS Process after mid-1970s

• Doping: ion implantation replaced diffusion • NMOS replaced PMOS – NMOS is faster than PMOS • Self-aligned source/drain

• Main driving force: watches and calculators

37 Self-aligned S/D Implantation

Phosphorus Ions, P+

n ide o x c o li si ld ly ie o F P Gate n+ n+ p-silicon

Source/Drain Gate oxide

NMOS Process Sequence (1970s)

Wafer clean PSG reflow Grow field oxide Mask 3. Contact Mask 1. Active Area Etch PSG/USG Etch oxide Strip photo resist/Clean Strip photo resist/Clean Al deposition Grow gate oxide Mask 4. Metal Deposit polysilicon Etch Aluminum Mask 2. Gate Strip photo resist Etch polysilicon Metal anneal Strip photo resist/Clean CVD oxide S/D and poly dope implant Mask 5. Bonding pad Anneal and poly reoxidation Etch oxide CVD USG/PSG Test and packaging

38 NMOS Process Sequence

Field Clean p-Si p-Si Oxidation

Oxide Gate Etch p-Si p-Si Oxidation

poly poly Poly Dep. Poly Etch p-Si p-Si

P+ Ion poly poly + + Annealing Implant p-Sin p-Si n

NMOS Process Sequence

PSG PSG PSG PSG Dep. poly poly Reflow p-Si p-Si

Al·Si PSG PSG PSG Metal poly poly Etch Dep. p-Si p-Si Al·Si Al·Si SiN

Metal PSG PSG Nitride Etch poly poly Dep. p-Si n+ p-Si n+

39 CMOS

• In the 1980s MOSFET IC surpassed bipolar • LCD replaced LED • Power consumption of circuit • CMOS replaced NMOS • Still dominates the IC market

• Backbone of information revolution

Advantages of CMOS

• Low power consumption • High temperature stability • High noise immunity

40 CMOS Inverter, Its Logic Symbol and Logic Table

Vdd Vin Vout PMOS

Vin Vout

NMOS In Out

Vss 01 10

CMOS Chip with 2 Metal Layers

PD2 Nitride PD1 Oxide Metal 2, Al·Cu·Si IMD USG dep/etch/dep Al·Cu·Si PMD BPSG LOCOSSiO n+ n+ 2 p+ p+ p+ p+ Poly Si Gate N-well P-type substrate

41 CMOS Chip

Lead-tin with 4 Metal Passivation 2, nitride alloy bump Layers Passivation 1, USG Metal 4 Copper Tantalum barrier layer FSG

Metal 3 Copper FSG Nitride etch stop layer FSG Nitride Metal 2 Copper seal layer FSG Tungsten plug Tantalum FSG M 1 Cu Cu barrier layer FSG T/TiN barrier & Tungsten local PSG Tungsten adhesion layer Interconnection STI n+ n+ USG p+ p+ PMD nitride P-well N-well P-epi barrier layer P-wafer

Summary

• Semiconductors are the materials with conductivity between conductor and insulator • Its conductivity can be controlled by dopant concentration and applied voltage • Silicon, germanium, and gallium arsenate • Silicon most popular: abundant and stable oxide

42 Summary

• Boron doped semiconductor is p-type, majority carriers are holes • P, As, or Sb doped semiconductor is p-type, the majority carriers are electrons • Higher dopant concentration, lower resistivity • At the same dopant concentration, n-type has lower resistivity than p-type

Summary

• R=ρ l/A • C=κ A/d • Capacitors are mainly used in DRAM • Bipolar transistors can amplify electric signal, mainly used for analog systems • MOSFET electric controlled switch, mainly used for digital systems

43 Summary

• MOSFETs dominated IC industry since 1980s • Three kinds IC chips microprocessor, memory, and ASIC • Advantages of CMOS: low power, high temperature stability, high noise immunity, and clocking simplicity

Summary

• The basic CMOS process steps are transistor making (front-end) and interconnection/passivation (back-end) • The most basic semiconductor processes are adding, removing, heating, and patterning processes.

44