Dual Gate Mosfet Application
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UCC27531 35-V Gate Driver for Sic MOSFET Applications (Rev. A)
(1) Application Report SLUA770A–March 2016–Revised May 2018 UCC27531 35-V Gate Driver for SiC MOSFET Applications Richard Herring........................................................................................... High Power Driver Solutions ABSTRACT SiC MOSFETs are gaining popularity in many high-power applications due to their significant switching performance advantages. SiC MOSFETs are also available with attractive voltage ratings and current capabilities. However, the characteristics of SiC MOSFETs require consideration of the gate-driver circuit to optimize the switching performance of the SiC device. Although SiC MOSFETs are not difficult to drive properly, many typical MOSFET drivers may result in compromised switching speed performance. The UCC27531 gate driver includes features and has operating parameters that allow for driving SiC power MOSFETs within the recommended optimum drive configuration. This application note reviews the characteristics of SiC MOSFETs and how to drive them to achieve the performance improvement that SiC can bring at the system level. The features of UCC27531 to achieve optimal performance of SiC are explained and results from a demonstration circuit are provided. 1 Introduction In the past, the majority of applications such as uninterruptible power supplies (UPS), photovoltaic (PV) inverters, and motor drive have utilized IGBTs for the power devices due to the combination of high- voltage ratings exceeding 1 kV and high current capability. Usable switching frequency of IGBTs has typically been limited to 20–30 kHz, due to the high turnoff losses caused by the long turnoff current tail. Design comparisons have shown that SiC MOSFET designs can operate at considerably higher switching frequency and achieve the same or better efficiency. Although the device cost of the SiC MOSFETs are higher than the equivalent IGBTs, the significant savings in transformer, capacitor, and enclosure size results in a lower system cost. -
Design and Process Developments Towards an Optimal 6.5 Kv Sic Power MOSFET
Design and process developments towards an optimal 6.5 kV SiC power MOSFET Victor Soler ADVERTIMENT La consulta d’aquesta tesi queda condicionada a l’acceptació de les següents condicions d'ús: La difusió d’aquesta tesi per mitjà del r e p o s i t o r i i n s t i t u c i o n a l UPCommons (http://upcommons.upc.edu/tesis) i el repositori cooperatiu TDX ( h t t p : / / w w w . t d x . c a t / ) ha estat autoritzada pels titulars dels drets de propietat intel·lectual únicament per a usos privats emmarcats en activitats d’investigació i docència. No s’autoritza la seva reproducció amb finalitats de lucre ni la seva difusió i posada a disposició des d’un lloc aliè al servei UPCommons o TDX. No s’autoritza la presentació del seu contingut en una finestra o marc aliè a UPCommons (framing). Aquesta reserva de drets afecta tant al resum de presentació de la tesi com als seus continguts. En la utilització o cita de parts de la tesi és obligat indicar el nom de la persona autora. ADVERTENCIA La consulta de esta tesis queda condicionada a la aceptación de las siguientes condiciones de uso: La difusión de esta tesis por medio del repositorio institucional UPCommons (http://upcommons.upc.edu/tesis) y el repositorio cooperativo TDR (http://www.tdx.cat/?locale- attribute=es) ha sido autorizada por los titulares de los derechos de propiedad intelectual únicamente para usos privados enmarcados en actividades de investigación y docencia. No se autoriza su reproducción con finalidades de lucro ni su difusión y puesta a disposición desde un sitio ajeno al servicio UPCommons No se autoriza la presentación de su contenido en una ventana o marco ajeno a UPCommons (framing). -
Graphene Field-Effect Transistor Array with Integrated Electrolytic Gates Scaled to 200 Mm
Graphene field-effect transistor array with integrated electrolytic gates scaled to 200 mm N C S Vieira1,3, J Borme1, G Machado Jr.1, F Cerqueira2, P P Freitas1, V Zucolotto3, N M R Peres2 and P Alpuim1,2 1INL - International Iberian Nanotechnology Laboratory, 4715-330, Braga, Portugal. 2CFUM - Center of Physics of the University of Minho, 4710-057, Braga, Portugal. 3IFSC - São Carlos Institute of Physics, University of São Paulo, 13560-970, São Carlos-SP, Brazil E-mail: [email protected] Abstract Ten years have passed since the beginning of graphene research. In this period we have witnessed breakthroughs both in fundamental and applied research. However, the development of graphene devices for mass production has not yet reached the same level of progress. The architecture of graphene field-effect transistors (FET) has not significantly changed, and the integration of devices at the wafer scale has generally not been sought. Currently, whenever an electrolyte-gated FET (EGFET) is used, an external, cumbersome, out-of-plane gate electrode is required. Here, an alternative architecture for graphene EGFET is presented. In this architecture, source, drain, and gate are in the same plane, eliminating the need for an external gate electrode and the use of an additional reservoir to confine the electrolyte inside the transistor active zone. This planar structure with an integrated gate allows for wafer-scale fabrication of high-performance graphene EGFETs, with carrier mobility up to 1800 cm2 V-1 s-1. As a proof-of principle, a chemical sensor was achieved. It is shown that the sensor can discriminate between saline solutions of different concentrations. -
Is EE Right for You?
Erik Jonsson School of Engggineering and The Un ivers ity o f Texas a t Da llas Computer Science Is EE Right for You? • “Toto, I have a feeling we’re not in Kansas anymore.” • Now that you are here, diii?id you make the right choice? • Electrical engineering is a challenging and satisfying profession. That does not mean it is easy. In fact, with the possible exceptions of medicine or law, it is the MOST difficult. • There are some things you need to consider if you really, really want to be an engineer. • We will consider a few today. EE 1202 Lecture #1 – Why Electrical Engineering? 1 © N. B. Dodge 01/12 Erik Jonsson School of Engggineering and The Un ivers ity o f Texas a t Da llas Computer Science Is EE Right for You (2)? • Why did you decide to be an electrical engineer? – Parents will pay for engineering education (it’s what they want). – You like math and science. – A relative is an engineer and you like him/her. – You want to challenge yourself, and engineering seems challenging. – You think you are creative and love technology. – You want to make a difference in society . EE 1202 Lecture #1 – Why Electrical Engineering? 2 © N. B. Dodge 01/12 Erik Jonsson School of Engggineering and The Un ivers ity o f Texas a t Da llas Computer Science The High School “Science Student” Problem • In high school, you were FAR above the average. – And you probably didn’t study too hard, right? • You liked science and math, and they weren’t terribly hard. -
Electrical Engineering Technology
Electrical Engineering Technology Electrical Engineering Program Accreditation The Electrical Engineering Technology program at Central Piedmont is accredited by the Engineering Technology Accreditation Commission Technology (TAC) of the Accreditation Board of Engineering and Technology (ABET). The Associate in Applied Science degree in Electrical Engineering How to Apply: Technology has been specifically designed to prepare individuals to Complete a Central Piedmont admissions application through Get become advanced technicians in the workforce. Started on the Central Piedmont website. Electrical Engineering Technicians (Associates degree holders) typically build, install, test, troubleshoot, repair, and modify developmental and Contact Information production electronic components, equipment, and systems such as For questions about the program or for assistance as a student in the industrial/computer controls, manufacturing systems, instrumentation program, contact faculty advising. The Electrical Engineering Technology systems, communication systems, and power electronic systems. program is in the Engineering Technology Division. For additional information, visit the Electrical Engineering Technology website or call the A broad-based core of courses ensures that students develop the skills Program Chair at 704.330.6773. necessary to perform entry-level tasks. Emphasis is placed on developing the ability to think critically, analyze, and troubleshoot electronic systems. General Education Requirements Beginning with electrical fundamentals, course work progressively ENG 111 Writing and Inquiry 3.0 introduces electronics, 2D Computer Aided Design (CAD), circuit Select one of the following: 3.0 simulation, solid-state fundamentals, digital concepts, instrumentation, C++ programming, microprocessors, programmable Logic Controllers ENG 112 Writing and Research in the Disciplines (PLCs). Other course work includes the study of various fields associated ENG 113 Literature-Based Research with the electrical/electronic industry. -
Advanced MOSFET Structures and Processes for Sub-7 Nm CMOS Technologies
Advanced MOSFET Structures and Processes for Sub-7 nm CMOS Technologies By Peng Zheng A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Engineering - Electrical Engineering and Computer Sciences in the Graduate Division of the University of California, Berkeley Committee in charge: Professor Tsu-Jae King Liu, Chair Professor Laura Waller Professor Costas J. Spanos Professor Junqiao Wu Spring 2016 © Copyright 2016 Peng Zheng All rights reserved Abstract Advanced MOSFET Structures and Processes for Sub-7 nm CMOS Technologies by Peng Zheng Doctor of Philosophy in Engineering - Electrical Engineering and Computer Sciences University of California, Berkeley Professor Tsu-Jae King Liu, Chair The remarkable proliferation of information and communication technology (ICT) – which has had dramatic economic and social impact in our society – has been enabled by the steady advancement of integrated circuit (IC) technology following Moore’s Law, which states that the number of components (transistors) on an IC “chip” doubles every two years. Increasing the number of transistors on a chip provides for lower manufacturing cost per component and improved system performance. The virtuous cycle of IC technology advancement (higher transistor density lower cost / better performance semiconductor market growth technology advancement higher transistor density etc.) has been sustained for 50 years. Semiconductor industry experts predict that the pace of increasing transistor density will slow down dramatically in the sub-20 nm (minimum half-pitch) regime. Innovations in transistor design and fabrication processes are needed to address this issue. The FinFET structure has been widely adopted at the 14/16 nm generation of CMOS technology. -
Electrical and Computer Engineering: Past, Present, and Future
Electrical and Computer Engineering: Past, Present, and Future Randy Berry1, chair, Department of Electrical and Computer Engineering The field of electrical and computer engineering (ECE) has had an enormously successful history. This field has pushed the frontiers of fundamental research, led to the emergence of entirely new disciplines, and revolutionized our daily lives. ECE departments2 are found in nearly every engineering school and have historically been one of the larger departments both in terms of faculty and student enrollments. Academically, a strong ECE department is highly correlated with the reputation of an engineering school. Of the top 10 engineering schools in the latest US News and World Report rankings of graduate programs, nine have top 10 ranked ECE programs. Nevertheless, ECE is a field that finds itself facing challenges. In this paper, we will look to the field’s past issues and note how the field repeatedly reinvented itself to push to new heights. Finally, we argue that the time is ripe for another reinvention and show how aspects of such a reinvention are already emerging. Areas such as machine learning and data science, the Internet of things, and quantum information systems provide promising directions for ECE — and embracing them provides a path to a bright future. The Present Situation In many ways, ECE is a victim of its own successes. Advances such as computer-aided design tools reduce the number of designers needed. The increased integration reflected in Moore’s law means that more functionality can be integrated into a single integrated circuit (IC), replacing the need for engineering to integrate multiple components in custom designs. -
Design, Implementation, Modeling, and Optimization of Next Generation Low-Voltage Power Mosfets
Design, Implementation, Modeling, and Optimization of Next Generation Low-Voltage Power MOSFETs by Abraham Yoo A thesis submitted in conformity with the requirements for the degree of Doctor of Philosophy Department of Materials Science and Engineering University of Toronto © Copyright by Abraham Yoo 2010 Design, Implementation, Modeling, and Optimization of Next Generation Low-Voltage Power MOSFETs Abraham Yoo Doctor of Philosophy Department of Materials Science and Engineering University of Toronto 2010 Abstract In this thesis, next generation low-voltage integrated power semiconductor devices are proposed and analyzed in terms of device structure and layout optimization techniques. Both approaches strive to minimize the power consumption of the output stage in DC-DC converters. In the first part of this thesis, we present a low-voltage CMOS power transistor layout technique, implemented in a 0.25µm, 5 metal layer standard CMOS process. The hybrid waffle (HW) layout was designed to provide an effective trade-off between the width of diagonal source/drain metal and the active device area, allowing more effective optimization between switching and conduction losses. In comparison with conventional layout schemes, the HW layout exhibited a 30% reduction in overall on-resistance with 3.6 times smaller total gate charge for CMOS devices with a current rating of 1A. Integrated DC-DC buck converters using HW output stages were found to have higher efficiencies at switching frequencies beyond multi-MHz. ii In the second part of the thesis, we present a CMOS-compatible lateral superjunction FINFET (SJ-FINFET) on a SOI platform. One drawback associated with low-voltage SJ devices is that the on-resistance is not only strongly dependent on the drift doping concentration but also on the channel resistance as well. -
Fundamentals of MOSFET and IGBT Gate Driver Circuits
Application Report SLUA618A–March 2017–Revised October 2018 Fundamentals of MOSFET and IGBT Gate Driver Circuits Laszlo Balogh ABSTRACT The main purpose of this application report is to demonstrate a systematic approach to design high performance gate drive circuits for high speed switching applications. It is an informative collection of topics offering a “one-stop-shopping” to solve the most common design challenges. Therefore, it should be of interest to power electronics engineers at all levels of experience. The most popular circuit solutions and their performance are analyzed, including the effect of parasitic components, transient and extreme operating conditions. The discussion builds from simple to more complex problems starting with an overview of MOSFET technology and switching operation. Design procedure for ground referenced and high side gate drive circuits, AC coupled and transformer isolated solutions are described in great details. A special section deals with the gate drive requirements of the MOSFETs in synchronous rectifier applications. For more information, see the Overview for MOSFET and IGBT Gate Drivers product page. Several, step-by-step numerical design examples complement the application report. This document is also available in Chinese: MOSFET 和 IGBT 栅极驱动器电路的基本原理 Contents 1 Introduction ................................................................................................................... 2 2 MOSFET Technology ...................................................................................................... -
Driving Egantm Transistors for Maximum Performance
Driving eGaNTM Transistors for Maximum Performance Johan Strydom: Director of Applications, Efficient Power Conversion Corporation Alex Lidow: CEO, Efficient Power Conversion Corporation The recent introduction of enhancement mode MOSFET development, silicon has approached GaN transistors (eGaN™) as power MOSFET/ its theoretical limits. In contrast, GaN is young in IGBT replacements in power management its life cycle, and will see significant improvement applications enables many new products that in the years to come. promise to add great system value. In general, an eGaN transistor behaves much like a power MOSFET with a quantum leap in performance, but to extract all of the newly-available eGaN transistor performance requires designers to understand the differences in drive requirements. eGaN Power Transistor Characteristics As with silicon power MOSFETs, applying a positive bias to the gate relative to the source of an eGaN power transistor causes a field effect, which attracts electrons that complete a Figure 1. Theoretical resistance times die area limits of GaN, silicon, and silicon carbide versus voltage. bidirectional channel between the drain and the source. When the bias is removed from the gate, the electrons under it are dispersed into the GaN, Figure of Merit (FOM) recreating the depletion region and, once again, giving it the capability to block voltage. The FOM is a useful method for comparing power devices and has been used by MOSFET To obtain a higher-voltage device, the distance manufactures to show both generational between the drain and gate is increased. Doing improvements and to compare their parts to so increases the on-resistance of the transistor. -
Work Function and Process Integration Issues of Metal
WORK FUNCTION AND PROCESS INTEGRATION ISSUES OF METAL GATE MATERIALS IN CMOS TECHNOLOGY REN CHI NATIONAL UNIVERSITY OF SINGAPORE 2006 WORK FUNCTION AND PROCESS INTEGRATION ISSUES OF METAL GATE MATERIALS IN CMOS TECHNOLOGY REN CHI B. Sci. (Peking University, P. R. China) 2002 A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE OCTOBER 2006 _____________________________________________________________________ ACKNOWLEGEMENTS First of all, I would like to express my sincere thanks to my advisors, Prof. Chan Siu Hung and Prof. Kwong Dim-Lee, who provided me with invaluable guidance, encouragement, knowledge, freedom and all kinds of support during my graduate study at NUS. I am extremely grateful to Prof. Chan not only for his patience and painstaking efforts in helping me in my research but also for his kindness and understanding personally, which has accompanied me over the past four years. He is not only an experienced advisor for me but also an elder who makes me feel peaceful and blessed. I also greatly appreciate Prof. Kwong from the bottom of my heart for his knowledge, expertise and foresight in the field of semiconductor technology, which has helped me to avoid many detours in my research work. I do believe that I will be immeasurably benefited from his wisdom and professional advice throughout my career and my life. I would also like to thank Prof. Kwong for all the opportunities provided in developing my potential and personality, especially the opportunity to join the Institute of Microelectronics, Singapore to work with and learn from so many experts in a much wider stage. -
1Q 2013Issue Analog Applications Journal
Texas Instruments Incorporated High-Performance Analog Products Analog Applications Journal First Quarter, 2013 © Copyright 2013 Texas Instruments Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof.