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Design and Process Developments Towards an Optimal 6.5 Kv Sic Power MOSFET

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Design and Process Developments Towards an Optimal 6.5 Kv Sic Power MOSFET Design and process developments towards an optimal 6.5 kV SiC power MOSFET Victor Soler ADVERTIMENT La consulta d’aquesta tesi queda condicionada a l’acceptació de les següents condicions d'ús: La difusió d’aquesta tesi per mitjà del r e p o s i t o r i i n s t i t u c i o n a l UPCommons (http://upcommons.upc.edu/tesis) i el repositori cooperatiu TDX ( h t t p : / / w w w . t d x . c a t / ) ha estat autoritzada pels titulars dels drets de propietat intel·lectual únicament per a usos privats emmarcats en activitats d’investigació i docència. No s’autoritza la seva reproducció amb finalitats de lucre ni la seva difusió i posada a disposició des d’un lloc aliè al servei UPCommons o TDX. No s’autoritza la presentació del seu contingut en una finestra o marc aliè a UPCommons (framing). Aquesta reserva de drets afecta tant al resum de presentació de la tesi com als seus continguts. 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WARNING On having consulted this thesis you’re accepting the following use conditions: Spreading this thesis by the i n s t i t u t i o n a l r e p o s i t o r y UPCommons (http://upcommons.upc.edu/tesis) and the cooperative repository TDX (http://www.tdx.cat/?locale- attribute=en) has been authorized by the titular of the intellectual property rights only for private uses placed in investigation and teaching activities. Reproduction with lucrative aims is not authorized neither its spreading nor availability from a site foreign to the UPCommons service. Introducing its content in a window or frame foreign to the UPCommons service is not authorized (framing). These rights affect to the presentation summary of the thesis as well as to its contents. In the using or citation of parts of the thesis it’s obliged to indicate the name of the author. Design and Process Developments towards an Optimal 6.5 kV SiC Power MOSFET Victor Soler PhD in Electronic Engineering Barcelona, 2019 PhD program in electronic engineering Department of electronic engineering Design and process developments towards an optimal 6.5 kV SiC power MOSFET Doctoral thesis by: Victor Soler 0000-0001-8341-8549 Thesis advisors: Director Prof. Philippe Godignon Co-director Dr. José Rebollo Institut de microelectròncia de Barcelona IMB-CNM (CSIC) 2019 ABSTRACT Keywords: Silicon Carbide; High-voltage; Power MOSFET; Wide Bandgap Semiconductors; Edge Termination; Cell Design. A sustainable future requires efficient power electronic converters at any stage of the electrical energy consumption. Silicon carbide (SiC) is one of the most technologically advanced wide bandgap semiconductors that can outperform silicon limits for power devices. SiC power MOSFETs are of the greatest interest since they are unipolar gate-controlled switches with high blocking voltage capability and reasonably low specific on-resistance. The focus of this thesis is on the design optimisation and process technology refinement towards the improvement of high-voltage SiC MOSFETs. Previous developments in our group were taken as a reference for this work. The results of this research allowed the fabrication of large-area SiC power MOSFETs with voltage ranges targeting 1.7 kV up to 6.5 kV. The inherent properties of SiC entail challenging technological solutions to successfully integrate a power MOSFET of such high-voltage capability. To ensure suitable blocking capability, different planar edge termination structures have been designed, optimised by TCAD simulation and implemented on PiN diodes. The termination schemes considered are single- zone JTE, FGRs and a novel RA-JTE structure combining JTE with rings. RA-JTE design, with the lowest sensitivity to fabrication process deviations and a lower consumed area, achieved more than 90% of the ideal breakdown voltage and suitable blocking capability up to 6.5 kV. The optimisations performed on the unit-cell of the SiC power MOSFET target both the layout design and the fabrication process. The optimisation has been performed by TCAD modelling and experimental evaluation of specific test structures. Several techniques to improve the performance of the fabricated devices have been considered: i) the use of an offset retrograde p-body profile to provide an adequate Vth value while preventing p-body punch-through, ii) a submicronic self-aligned channel definition, iii) a boron treatment to the gate oxide to improve channel mobility, iv) a discrete location of the p-contact to reduce cell-pitch, v) the use of a lower-doped-source (LDS) to improve i Design and process developments towards an optimal 6.5 kV SiC power MOSFET reliability, vi) the optimisation of the JFET area, and vii) the integration of gate runners to improve the switching performance. As a result of these investigations, a full mask-set were designed and used for processing wafers of several voltage-class in different batches. All the fabrication steps have been carried out at IMB-CNM cleanroom. The electrical characterisation of large-area devices has evidenced an optimal Vth in the range of 5 V, a proper gate control, and a good blocking capability. We obtained relatively high specific on-resistance due to the large cell pitch dimensions required by IMB-CNM cleanroom design rules as well as a still low channel mobility. Fabricated SiC MOSFETs are capable of switching at high bus voltages (tested up to 80% of the rated voltage). Although, their switching performance is limited by internal gate resistance. Fabricated devices have shown better short- devices, mainly due to the circuitcell design capability considerations. (>15 μs) than existing commercial The evaluation of electrical performance evidenced the successful functionality of the fabricated VDMOS up to 6.5 kV and validates our new RA- JTE termination design. On the other hand, the novel boron doping treatment to the gate oxide clearly demonstrated to improve the on-resistance of our devices in all voltage classes without affecting breakdown and short-circuit capabilities. Nevertheless, it strongly compromises stability and reliability at temperatures above 100 °C. These results show that the MOS interface quality is still the major issue for the development of reliable SiC power MOSFETs. Finally, alternative SiC structures have also been investigated to take advantage of the SiC superior material properties. These include a SiC IGBT showing conductivity modulation, and a preliminary SiC CMOS cell able to operate at high temperatures. ii PREFACE The improvement of power electronics devices has a direct impact on numerous industry sectors such as electric distribution, traction and electric vehicles (EV). Focusing on electric distribution, the development of higher- efficient, high-voltage power devices is crucial for the construction of future smart-grids, easing the integration of distributed resources such as energy storage, mixed power supply, and plug-in EV. It is widely accepted that a new generation of semiconductor power devices, able to operate in the range of kilovolts, will be crucial in the future for driving down the cost of generation, transmission and distribution of power electronics systems. Nevertheless, silicon (Si) power device technology is currently reaching its limits with respect to its fundamental material properties, impacting the capability and efficiency of novel power semiconductor systems. On the other hand, the properties of wide bandgap (WBG) semiconductors, clearly superior to those of Si, will lead to enhanced power devices with much better performances than conventional Si devices. WBG-based devices, being capable to operate at higher voltages and frequencies, will increase the efficiency of high-voltage converters. Aside this, silicon carbide (SiC) power devices provide an additional advantage by requiring smaller cooling systems, which is crucial in some applications. Today, WBG are crucial parts in numerous industrial applications. For instance, the recent implantation of the 5G mobile network rely on high speed switching GaN devices. Over the last few years, SiC devices have provided a technology alternative to silicon power modules in various low voltage (600 V to 1.7 kV) applications, in which the SiC power MOSFET is the preferred option among the different other switch architectures (BJT, JFET). Today, large part of the development and production of SiC power MOSFETs is destined to the hybrid and full electric vehicle market, providing better efficiency and a considerable reduction of the total volume, weight and cost of the full system. Furthermore, SiC devices will also lead the next generation of power devices in higher voltage ratings ( 3.3 kV) to achieve a more rational use of the energy ≥ iii Design and process developments towards an optimal 6.5 kV SiC power MOSFET by increasing the efficiency of the power converters at any stage of the energy generation-distribution-storage cycle. In this sense, the main motivation of this thesis is to develop and improve the SiC power devices technology in terms of static and dynamic performance, as well as reliability, towards their future adoption in higher voltage applications.
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