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UCC27614 Single Channel 30-V, 10-A High Speed Low Side Gate Driver

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UCC27614 Single Channel 30-V, 10-A High Speed Low Side Gate Driver UCC27614 SLUSE26A – JUNE 2021 – REVISED AUGUST 2021 UCC27614 Single Channel 30-V, 10-A High Speed Low Side Gate Driver 1 Features 3 Description • Typical 10-A Sink 10-A Source Output Currents The UCC27614 family of devices is single channel, • Absolute Maximum VDD Voltage: 30 V high-speed, low-side gate drivers capable of • Available in 2-mm x 2-mm SON8 package effectively driving MOSFET, IGBT, SiC, and GaN • Typical 17.5-ns propagation delay power switches. UCC27614 has typical peak drive • Typical 2.5-ns rise and 4-ns fall time with 1.8-nF strength of 10 A, which helps reduce the rise and load fall time of the power switches. This results in • EN (enable) pin in SOIC8 package low switching losses and high efficiency. The small • IN- pin can be used for enable/disable functionality propagation delay of the UCC27614 helps improve • VDD independent input thresholds (TTL the dead-time optimization, pulse width utilization, compatible) control loop response, and transient performance of • Wide VDD operating range from 4.5 V to 26 V the system. This further improves the power stage • Input and enable pins capable of withstanding up efficiency. to –10 V UCC27614 can handle –10-V inputs. This helps • Output held low when inputs are floating or during improve system robustness where moderate ground VDD UVLO bouncing exists in the system. The inputs are • Under voltage lockout (UVLO) independent of supply voltage and can be connected • Can be used as inverting or non-inverting driver to most controller outputs. This allows maximum • Operating junction temperature range of –40°C to control flexibility. An independent enable signal allows 150°C the power stage to be controlled independent of the 2 Applications main control logic. The gate driver can quickly shut off the power stage if there is a fault (which requires • Telecom switch mode power supplies the power train to be turned-off) in the system. • Power factor correction (PFC) circuits The enable function can also help improve system • Solar power supplies robustness. Many high frequency switching power • Motor drives supplies exhibit high frequency noise at the gate of • High frequency line drivers the power device, which can get injected into the • Pulse transformer drivers output pin of the gate driver and can cause the driver • High power buffers INFORMATION ADVANCE to malfunction. Due to transient reverse current and reverse voltage capability of the UCC27614, the driver + VBias CVDD performs well in such conditions and such systems. UCC27614 ± EN/IN- VDD To Switch Different undervoltage lockout (UVLO) options are From Node available so that the appropriate gate driver can be Controller VDD used for a specific type of power switch such as LO IN/IN+ GaN, MOSFET, SiC MOSFET, or IGBT. The strong OUT Rg GND internal pulldown MOSFET holds the output low if the VDD voltage is below the specified UVLO threshold. OUT GND This active pulldown feature further improves system robustness. The UCC27614 10-A drive current in the 2-mm × 2-mm package improves system power density. This small package also enables optimum gate driver placement and improved layout. Simplified Application Diagram Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) UCC27614 SON (8) 2.0 mm x 2.0 mm UCC27614 SOIC (8) 4.90 mm × 3.91 mm (1) For all available packages, see the orderable addendum at the end of this data sheet. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change without notice. UCC27614 SLUSE26A – JUNE 2021 – REVISED AUGUST 2021 www.ti.com Table of Contents 1 Features............................................................................1 7.4 Device Functional Modes..........................................15 2 Applications.....................................................................1 8 Applications and Implementation................................ 16 3 Description.......................................................................1 8.1 Application Information............................................. 16 4 Revision History.............................................................. 2 8.2 Typical Application.................................................... 17 5 Pin Configuration and Functions...................................3 9 Power Supply Recommendations................................23 6 Specifications.................................................................. 4 10 Layout...........................................................................24 6.1 Absolute Maximum Ratings........................................ 4 10.1 Layout Guidelines................................................... 24 6.2 ESD Ratings............................................................... 4 10.2 Layout Example...................................................... 25 6.3 Recommended Operating Conditions.........................4 10.3 Thermal Consideration............................................25 6.4 Thermal Information....................................................4 11 Device and Documentation Support..........................26 6.5 Electrical Characteristics.............................................5 11.1 Third-Party Products Disclaimer............................. 26 6.6 Switching Characteristics............................................6 11.2 Receiving Notification of Documentation Updates.. 26 ADVANCE INFORMATION 6.7 Timing Diagrams.........................................................6 11.3 Support Resources................................................. 26 6.8 Typical Characteristics................................................ 8 11.4 Trademarks............................................................. 26 7 Detailed Description...................................................... 11 11.5 Electrostatic Discharge Caution.............................. 26 7.1 Overview................................................................... 11 11.6 Glossary.................................................................. 26 7.2 Functional Block Diagram.........................................12 12 Mechanical, Packaging, and Orderable 7.3 Feature Description...................................................12 Information.................................................................... 26 4 Revision History DATE REVISION NOTES August 2021 A Advance Information 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: UCC27614 UCC27614 www.ti.com SLUSE26A – JUNE 2021 – REVISED AUGUST 2021 5 Pin Configuration and Functions IN+ 1 8 IN- GND 2 7 VDD 2mm GND 3 6 VDD OUT 4 5 OUT Figure 5-1. 8-Pin SON DSG Package Top View UCC27614 VDD 1 8 VDD IN 2 7 OUT EN 3 6 OUT GND 4 5 GND Figure 5-2. 8-Pin SOIC D Package Top View Table 5-1. Pin Functions PIN I/O DESCRIPTION NAME DSG D EN — 3 I Enable or disable control pin. Connect this pin to VDD if not used in the system. Device ground or reference. Connect this pin to the source of the power device such as MOSFET, GND 2,3 4,5 G IGBT, or SiC MOSFET. Also connect negative terminal of the bias supply and bypass capacitor to this pin. Non-inverting PWM input. Connect this pin to the controller PWM output through a resistor for high IN — 2 I common mode noise rejection. Non-inverting PWM input. Connect this pin to the controller PWM output through a resistor for high IN+ 1 — I common mode noise rejection. If not used, connect to VDD. Inverting PWM input. Connect this pin to the controller PWM output through a resistor for high IN- 8 — I common mode noise rejection. If not used, connect to GND. INFORMATION ADVANCE Output of the driver. Connect either directly or through a resistor to the gate of the power device OUT 4,5 6,7 O such as MOSFET, IGBT, or SiC MOSFET. Driver bias supply. Connect the positive node of the voltage source to this pin through an impedance VDD 6,7 1,8 P for high common mode noise rejection. Bypass this pin with two ceramic capacitors, generally 1 µF and 0.1 µF, which are referenced to GND pin of this device. Connect to GND through large copper plane. Thermal Pad — — This is internally connected to GND pin of the device. Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: UCC27614 UCC27614 SLUSE26A – JUNE 2021 – REVISED AUGUST 2021 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) (2) (3) MIN MAX UNIT Supply voltage VDD –0.3 30 V Output Voltage (DC) VOUT –0.3 VDD +0.3 V Output Voltage (200-ns Pulse) VOUT –2 VDD +3 V Input Voltage IN, EN, IN+, IN– –10 30 V Operating junction temperature, TJ –40 150 °C Soldering, 10 s 300 Lead temperature °C Reflow 260 ADVANCE INFORMATION Storage temperature, Tstg –65 150 °C (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. (2) All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. See Section 6.4 of the data sheet
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