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applied sciences

Article Analysis of Work-Function Variation Effects in a Tunnel Field-Effect Depending on the Device Structure

Garam Kim 1 , Jang Hyun Kim 2 , Jaemin Kim 1 and Sangwan Kim 3,*

1 Department of Electronic Engineering, Myongji University, Yongin 17058, Korea; [email protected] (G.K.); [email protected] (J.K.) 2 School of Electrical Engineering, Pukyong National University, 45 Yongso-ro, Nam-gu, Busan 608-737, Korea; [email protected] 3 Department of Electrical and Engineering, Ajou University, Suwon 16499, Korea * Correspondence: [email protected]

 Received: 7 May 2020; Accepted: 3 August 2020; Published: 4 August 2020 

Featured Application: This work can be applied to analyze and reduce the WFV effect of TFETs.

Abstract: Metal gate technology is one of the most important methods used to increase the low on-current of tunnel field-effect (TFETs). However, metal gates have different work-functions for each grain during the deposition process, resulting in work-function variation (WFV) effects, which means that the electrical characteristics vary from device to device. The WFV of a planar TFET, double-gate (DG) TFET, and electron-hole bilayer TFET (EHBTFET) were examined by technology computer-aided design (TCAD) simulations to analyze the influences of device structure and to find strategies for suppressing the WFV effects in TFET. Comparing the WFV effects through the turn-on voltage (Vturn-on) distribution, the planar TFET showed the largest standard deviation (σVturn-on) of 20.1 mV, and it was reduced by 26.4% for the DG TFET and 80.1% for the EHBTFET. − − Based on the analyses regarding metal grain distribution and energy band diagrams, the WFV of TFETs was determined by the number of metal grains involved in the tunneling current. Therefore, the EHBTFET, which can determine the tunneling current by all of the metal grains where the main gate and the sub gate overlap, is considered to be a promising structure that can reduce the WFV effect of TFETs.

Keywords: tunnel field-effect transistors (TFETs); work-function variation (WFV); electron-hole bilayer TFET (EHBTFET)

1. Introduction The trend towards reducing the power consumption and improving the scale-down properties of complementary metal-oxide semiconductor (CMOS) devices results in a decreased voltage supply. To achieve a high on/off current ratio at a low supply voltage, the subthreshold swing (SS) must be lowered. However, metal-oxide-semiconductor (MOS) field-effect transistors () cannot lower the SS below 60 mV/dec due to the physical limitations of their operation [1–3]. To overcome this problem, new devices based on various principles have been proposed and studied, such as the negative capacitance field-effect transistor (NCFET) [4–6], resistive gate field-effect transistor (FET) (ReFET) [7], nano-electro mechanical FET (NEMFET) [8,9], positive feedback FET [10,11], impact ionization metal-oxide-semiconductor (I-MOS) [12,13], conventional transistor with an oxide-based threshold switching device [14], and tunnel FET (TFET) [15–22]. Among them, TFETs are considered

Appl. Sci. 2020, 10, 5378; doi:10.3390/app10155378 www.mdpi.com/journal/applsci Appl. Sci. 2020, 10, 5378 2 of 10 Appl. Sci. 2020, 10, x FOR PEER REVIEW 2 of 11 as one of the most promising ultra-low power devices due to its high CMOS process compatibility and as one of the most promising ultra-low power devices due to its high CMOS process compatibility andlow-level low-level leakage leakage current current [15– [15–22].22]. However, TFETs suffer from low-level on-current (Ion) as an alternative of MOSFETs. Therefore, However, TFETs suffer from low-level on-current (Ion) as an alternative of MOSFETs. Therefore, there have been much research to improve the Ion of TFETs by modifying the materials and structures there have been much research to improve the Ion of TFETs by modifying the materials and structures ofof TFETs TFETs [23–31]. [23–31]. Among Among them, them, metal metal gate gate technology, technology, which which is also is alsowidely widely used used in MOSFETs, in MOSFETs, can can improve the gate controllability and increase Ion by eliminating the polysilicon depletion effect [32]. improve the gate controllability and increase Ion by eliminating the polysilicon depletion effect [32]. However,However, metal metal gates gates have have different different work-functions work-functions for for each each grain grain due due to to different different grain grain orientations orientations duringduring the the deposition deposition process. process. This This results results in in a a work-function work-function variation variation (WFV) (WFV) effect effect that that causes causes variations in the threshold voltage (Vth) and other electrical characteristics of TFETs [33]. In this variations in the threshold voltage (Vth) and other electrical characteristics of TFETs [33]. In this study, thestudy, WFV the effects WFV eofffects a planar of a planar TFET, TFET, a double a double gate gate (DG) (DG) TFET, TFET, and and an an electron-hole electron-hole bilayer bilayer TFET TFET (EHBTFET)(EHBTFET) are are compared compared using using technology technology computer computer-aided-aided design design (TCAD) (TCAD) si simulationsmulations to to analyze analyze thethe effects effects of of the the structure structure and and to to find find a a way way to to impr improveove the the WFV WFV of of TFETs. TFETs. In In the the case case of of the the planar planar TFETTFET and and DG DG TFET, TFET, a a tunneling tunneling current current occurs occurs along along the the channel channel (lateral (lateral tunneling) tunneling) at at the the source source junction.junction. On On the the contrary, contrary, the the tunneling tunneling current current of of the the EHBTFET EHBTFET is is generated generated across across the the channel channel (vertical(vertical tunneling) tunneling) at at the the body body be betweentween two two gates, gates, and and the the electrical electrical characteristics characteristics of of this this structure structure havehave been been actively actively studied studied through through TC TCADAD simulations simulations and and modeling modeling [34–38]. [34–38]. 2. Device Structure and Simulation Method 2. Device Structure and Simulation Method Figure1 shows the structures of MOSFET (Figure1a), planar TFET (Figure1b), DG TFET (Figure1c), Figure 1 shows the structures of MOSFET (Figure 1a), planar TFET (Figure 1b), DG TFET (Figure and EHBTFET (Figure1d) used in this research. The design parameters used for the simulations are 1c), and EHBTFET (Figure 1d) used in this research. The design parameters used for the simulations summarized in Table1. In the modern integrated chip (IC) process, the grain size of the metal gate has a are summarized in Table 1. In the modern integrated chip (IC) process, the grain size of the metal range of approximately 5 to 20 nm [39,40]. The grain size decreases when the DC (direct current) power gate has a range of approximately 5 to 20 nm [39,40]. The grain size decreases when the DC (direct of the sputtering process increases [40]. On the other hand, the grain size increases when the process current) power of the sputtering process increases [40]. On the other hand, the grain size increases temperature increases during or after the deposition process [39,41]. In this research, TiN (titanium when the process temperature increases during or after the deposition process [39,41]. In this nitride) was applied as the gate metal for the WFV effect analysis. In the case of TiN, it is also known research, TiN (titanium nitride) was applied as the gate metal for the WFV effect analysis. In the case that the grain size can be reduced by incorporating Cu or C when the TiN layer is deposited [42,43]. of TiN, it is also known that the grain size can be reduced by incorporating Cu or C when the TiN In this simulation and analysis, each metal grain was assumed to be a cube with a side length of 10 nm layer is deposited [42,43]. In this simulation and analysis, each metal grain was assumed to be a cube within the general range of the modern IC process. With regard to the WF value distribution of TiN, with a side length of 10 nm within the general range of the modern IC process. With regard to the much research is still on-going, in order to develop a better understanding of the WF variation in TiN WF value distribution of TiN, much research is still on-going, in order to develop a better (e.g., considering the work-function (WF) of the grain boundary [44] and increment of the high-WF understanding of the WF variation in TiN (e.g., considering the work-function (WF) of the grain grain portion with the increased process temperature [41]). In this study, it was assumed that 60% boundary [44] and increment of the high-WF grain portion with the increased process temperature of TiN grains were crystallized in <200> with 4.6 eV WF and 40% were crystallized in <111> with [41]). In this study, it was assumed that 60% of TiN grains were crystallized in <200> with 4.6 eV WF 4.4 eV WF, which are generally accepted values [39]. The blue arrows in Figure1 indicate the positions and 40% were crystallized in <111> with 4.4 eV WF, which are generally accepted values [39]. The where the tunneling mainly occurs in the on-state of each structure. Unlike the planar TFET and DG blue arrows in Figure 1 indicate the positions where the tunneling mainly occurs in the on-state of TFET, where tunneling occurs at the boundary between the source and channel region, EHBTFET has each structure. Unlike the planar TFET and DG TFET, where tunneling occurs at the boundary a tunneling current between the main gate (MG) and the sub gate (SG), as shown by the arrow in between the source and channel region, EHBTFET has a tunneling current between the main gate Figure1d. (MG) and the sub gate (SG), as shown by the arrow in Figure 1d.

(a) (b)

Figure 1. Cont. Appl. Sci. 2020, 10, 5378 3 of 10 Appl. Sci. 2020, 10, x FOR PEER REVIEW 3 of 11

(c) (d)

FigureFigure 1.1. BasicBasic schematicsschematics andand majormajor parameterparameter definitionsdefinitions ofof thethe (a(a)) metal-oxide-semiconductormetal-oxide-semiconductor field-efield-effectffect transistortransistor (MOSFET),(MOSFET), ((bb)) planarplanar tunneltunnel field-efield-effectffect transistortransistor (TFET),(TFET), ((cc)) double-gatedouble-gate (DG)(DG) TFET,TFET, and and ( d(d)) electron-hole electron-hole bilayer bilayer TFET TFET (EHBTFET) (EHBTFET) used used in in this this research. research.

Table1. Device parameters of devices used for the technology computer-aided design (TCAD) simulation. Table 1. Device parameters of devices used for the technology computer-aided design (TCAD) simulation. Parameter Value

Gate lengthParameter (LG) Value 70 nm ChannelGate width length (W) (LG) 70 70 nm nm Equivalent oxideChannel thickness width (EOT) (W) 70 2nm nm Channel length (L ) 90 nm Equivalent oxideCH thickness (EOT) 2 nm Channel thickness (TB) 10 nm Channel length (LCH) 90 nm Drain underlap (LUD) 20 nm Channel thickness (TB) 10 nm Source underlap (LUS) 20 nm Drain underlap (LUD) 2020 nm 3 MOSFET source/drain doping concentration 10 cm− Source underlap (LUS) 2020 nm 3 TFET p-type source doping concentration 10 cm− MOSFET source/drain doping concentration 102018 cm−3 3 TFET n-type drain doping concentration 10 cm− TFET p-type source doping concentration 104.620eV cm (60%)−3 Gate work function TFET n-type drain doping concentration 104.418 eV cm (40%)−3 4.6 eV (60%) Gate work function 4.4 eV (40%) In order to compare and analyze the WFV effects of each structure, three-dimensional (3D) simulations were conducted using Synopsys SenataurusTM (Ver. K-2015.06-SP1, Synopsys, In order to compare and analyze the WFV effects of each structure, three-dimensional (3D) Mountain View, CA, USA) [45]. Fermi–Dirac statistics, doping concentration dependent mobility, simulations were conducted using Synopsys SenataurusTM (Ver. K-2015.06-SP1, Synopsys, Mountain Shockley–Read–Hall (SRH) recombination, and modified local density approximation (MLDA) models View, CA, USA) [45]. Fermi–Dirac statistics, doping concentration dependent mobility, Shockley– were used to calculate and extract the electrical characteristics of TFETs in the simulation. For an Read–Hall (SRH) recombination, and modified local density approximation (MLDA) models were accurate calculation of band-to-band tunneling (BTBT), a dynamic non-local BTBT model was applied used to calculate and extract the electrical characteristics of TFETs in the simulation. For an accurate with theoretically calculated parameters [46] generally used in recent TFET research [47–49]. calculation of band-to-band tunneling (BTBT), a dynamic non-local BTBT model was applied with 3.theoretically Results and calculated Discussions parameters [46] generally used in recent TFET research [47–49].

3. ResultsFigure and2 shows Discussions the transfer characteristics of the MOSFET, planar TFET (Figure2b), DG TFET (Figure2c), and EHBTFET (Figure2d) when the drain voltage (V D) is 0.5 V and source voltage (VS) is Figure 2 shows the transfer characteristics of the MOSFET, planar TFET (Figure 2b), DG TFET 0 V. The metal grain profiles of the gate area were randomly generated by the randomization algorithm (Figure 2c), and EHBTFET (Figure 2d) when the drain voltage (VD) is 0.5 V and source voltage (VS) is provided in the Sentaurus tool, depending on the TiN grain orientation. Thirty samples with uniquely 0 V. The metal grain profiles of the gate area were randomly generated by the randomization randomized metal gate grain profiles for each structure were used for the simulation and the WFV algorithm provided in the Sentaurus tool, depending on the TiN grain orientation. Thirty samples effect analysis in this research. In the case of the EHBTFET in Figure2c, a voltage of 0.67 V was with uniquely randomized metal gate grain profiles for each structure were used for the− simulation applied to the SG to transport the holes from the source region to the channel region near SG and and the WFV effect analysis in this research. In the case of the EHBTFET in Figure 2c, a voltage of generate BTBT between the MG and the SG. For a comparison of the WFV effects, the average and −0.67 V was applied to the SG to transport the holes from the source region to the channel region near standard deviation of Vth, SS and Ion for each structure were obtained and are summarized in Table2. SG and generate BTBT between the MG and the SG. For a comparison of the WFV effects, the average12 The Vth of MOSFET is defined as the gate voltage when VD is 0.5 V and the drain current is 10− A. and standard deviation of Vth, SS and Ion for each structure were obtained and are summarized in Instead of Vth, the turn-on voltage (Vturn-on) of TFETs is defined as the gate voltage when BTBT starts Table 2. The Vth of MOSFET is defined as the gate voltage when VD is 0.5 V and the drain current is to occur at the source junction and the drain current increases compared to the leakage current, and is −12 10 A. Instead of Vth, the turn-on voltage (Vturn-on) of TFETs18 is defined as the gate voltage when BTBT extracted when V is 0.5 V and the drain current is 10 A. In this research, Vturn-on was used for the starts to occur at theD source junction and the drain current− increases compared to the leakage current, WFV analysis instead of Vth, because the drain current of TFETs is much lower than that of MOSFETs, and is extracted when VD is 0.5 V and the drain current is 10−18 A. In this research, Vturn-on was used for the WFV analysis instead of Vth, because the drain current of TFETs is much lower than that of MOSFETs, the definition of Vth in TFETs is controversial [50,51], and the SS variation effect of TFETs Appl. Sci. 2020, 10, 5378 4 of 10 Appl. Sci. 2020, 10, x FOR PEER REVIEW 4 of 11 theis definitionlarge [33]. of SS V isth definedin TFETs as is an controversial average swing [50, 51when], and the the drain SS variation current is e ffincreasedect of TFETs from is 10 large−12 to [33 10].−10 SS is defined as an average swing when the drain current is increased from 10 12 to 10 10 A (MOSFET) A (MOSFET) or 10−18 to 10−16 A (TFET). Ion is defined as the drain current when− VG− is average Vturn-on 18 16 or 10 to 10 A (TFET). Ion is defined as the drain current when V is average Vturn-on (average V (average− V−th in MOSFETs) + 0.6 V and VD is 0.5 V. As shown in FigureG 2 and Table 2, the σVturn-onth of in MOSFETs) + 0.6 V and V is 0.5 V. As shown in Figure2 and Table2, the σVturn-on of the planar the planar TFET has the largestD value (20.1 mV). In the case of the DG TFET, σVturn-on is reduced by TFET has the largest value (20.1 mV). In the case of the DG TFET, σVturn-on is reduced by 26.4% in −26.4% in comparison to the planar TFET. Moreover, in the EHBTFET, the σVturn-on is− drastically comparison to the planar TFET. Moreover, in the EHBTFET, the σVturn-on is drastically reduced to reduced to −80.1% compared to the planar TFET, showing the smallest σVturn-on among the three types 80.1% compared to the planar TFET, showing the smallest σVturn-on among the three types of TFET − of TFET structures. The σSS and normalized σIon also show the same tendency as σVturn-on. structures. The σSS and normalized σIon also show the same tendency as σVturn-on.

10-2 10-7 10-4 10-9 m] m] μ 10-6 μ 10-11 10-8 10-13

-10 -15 10 10 -12 V = 0.5 V -17 V = 0.5 V 10 D 10 D 10-14 10-19

-16 -21 Drain Current [A/ Drain Current

10 [A/ Current Drain 10 10-18 10-23 012 012 Gate Voltage [V] Gate Voltage [V] (a) (b)

10-7 10-7 10-9 10-9 m] m] μ 10-11 μ 10-11 10-13 10-13

-15 -15

10 10 -17 V = 0.5 V -17 V = 0.5 V 10 D 10 D 10-19 10-19

-21 -21 Drain Current [A/ Current Drain 10 [A/ Current Drain 10 10-23 10-23 012 012 Gate Voltage [V] Gate Voltage [V] (c) (d)

FigureFigure 2. 2.Transfer Transfer characteristics characteristics of of the the (a )(a MOSFET,) MOSFET, (b )(b planar) planar TFET, TFET, (c) ( DGc) DG TFET TFET and and (d )(d EHBTFET) EHBTFET

whenwhen the the drain drain voltage voltage (V D(V)D is) 0.5is 0.5 V. V.

Table 2. Average and standard deviation of the turn-on voltage (Vturn-on), subthreshold swing (SS), Table 2. Average and standard deviation of the turn-on voltage (Vturn-on), subthreshold swing (SS), and on-current (Ion) of the devices extracted from Figure2. and on-current (Ion) of the devices extracted from Figure 2. MOSFET Planar TFET DG TFET EHBTFET MOSFET Planar TFET DG TFET EHBTFET Average V or Average Vturn-on 55.0 mV 325.1 mV 283.0 mV 680.4 mV Averageth Vth or Average Vturn-on − −55.0 mV 325.1 mV 283.0 mV 680.4 mV σVth or σVturn-on 14.0 mV 20.1 mV 14.8 mV 4.0 mV σAverageVth or σ SSVturn-on 121.6 mV 14.0/decade mV 64.3 mV 20.1/decade mV 54.5 mV 14.8/decade mV 4.6 mV 4.0/decade mV AverageσSS SS 0.5 121.6 mV /mV/decadedecade 5.6 64.3 mV /mV/ddecadeecade 4.7 54.5 mV mV/decade/decade 1.2 4.6 mV mV/decade/decade 4 9 9 10 AverageσSS Ion 7.11 0.510 mV/decade− A/µm 1.08 5.610 mV/decad− A/µme 3.26 4.710 mV/decade− A/µm 4.33 1.210 mV/decade− A/µm × × × × σI /Average I 0.122 0.348 0.263 0.155 onAverage onIon 7.11 × 10−4 A/μm 1.08 × 10−9 A/μm 3.26 × 10−9 A/μm 4.33 × 10−10 A/μm σIon/Average Ion 0.122Vth: threshold voltage.0.348 0.263 0.155

Vth: threshold voltage. The reduction in the WFV effect on the DG TFET and EHBTFET compared to the planar TFET can be interpretedThe reduction as a result in the of an WFV increase effect in on the the number DG TFET of metal and grainsEHBTFET that acomparedffect Vturn-on to thedetermination. planar TFET It is known that as the number of metal grains affecting V increases, the WFV effect is suppressed can be interpreted as a result of an increase in theturn-on number of metal grains that affect Vturn-on by a higher averaging effect [52–54]. When the number of grains changes, the variance of the WF determination. It is known that as the number of metal grains affecting Vturn-on increases, the WFV effect is suppressed by a higher averaging effect [52–54]. When the number of grains changes, the variance of the WF distribution (var(ΦM)) according to the number of grains (N) can be expressed as the following equation [55]: Appl. Sci. 2020, 10, 5378 5 of 10 Appl. Sci. 2020, 10, x FOR PEER REVIEW 5 of 11 distribution (var(ΦM)) according to the number of grains (N) can be expressed as the following equation [55]: 1 var Φ  𝑃𝛷 𝑃 𝛷 2 (1) 𝑁 Xr Xr   1  2    var(ΦM) =  PiΦ  PiΦi  (1) N  i −    i=1 i=1 where Φi and Pi represent the WF value of each grain and the probability of achieving the WF value. whereAs canΦ bei and seenP fromi represent (1), var( theΦM WF) and value the ofresulting each grain WFV and effects the probabilitychange when of N achieving changes. the For WF example, value. Asas the can grain be seen size from of the (1), metal var(Φ Mgate) and increases the resulting during WFV the efabricationffects change process when (e.g.,N changes. increase For in example,the heat asbudget), the grain the sizenumber of the of metalgrains gate affecting increases the characte duringristics the fabrication of the device process decreases (e.g., and increase the WFV in the effects heat budget),increase.the If the number grainof size grains is large affecting enough the that characteristics the overall of gate the devicearea is decreasesfilled by one and metal the WFV grain, effects the increase.Vturn-on of 60% If the of graindevices size is determined is large enough by a metal that the grain overall with gatea 4.6 areaeV WF is and filled the by V oneturn-on metal of the grain,other the40% V ofturn-on devicesof 60% is determined of devices isby determined a metal grain by awith metal a 4.4 grain eV withWF. On a 4.6 the eV other WF andhand, the when Vturn-on theof grain the othersize of 40% the ofmetal devices gate is is determined reduced during by a metal the fabrication grain with process a 4.4 eV (e.g., WF. Onby incorporating the other hand, carbon when into the grainTiN), sizethe ofWFV the metaleffects gate can isbe reduced reduced during [43]. If the the fabrication grain size process is continuously (e.g., by incorporating reduced and carbon the metal into TiN),gate reaches the WFV an e ffalmostects can amorphous be reduced state, [43]. Ifit thecan grainbe considered size is continuously that there is reduced no difference and the among metal gate the reachesgrain distributions an almost amorphous of each device state, and it can the be Vturn-on considered values thatof all there the isdevices no diff convergeerence among to the the average grain distributionsVturn-on. of each device and the Vturn-on values of all the devices converge to the average Vturn-on. AsAs thethe graingrain size size controlled controlled by by the the process process condition condition can can affect affect the numberthe number of grains of grains and the and WFV the eWFVffects, effects, the device the device structure structure of TFETs of TFETs can also can aalsoffect affect the WFV the WFV effect effect if the if structurethe structure can changecan change the grainthe grain number, number, having having effects effects on theon the Vturn-on Vturn-ondetermination. determination. In In order order to to analyze analyzethe the reasonreason whywhy thethe σσVVturn-onturn-on ofof the the TFETs TFETs is is different, different, depending depending on on the structures, the metal grain distributions and thethe energyenergy bandband diagramsdiagrams werewere comparedcompared for for the the lowest lowest and and highest highest V Vturn-onturn-on among the simulated results ofof planarplanar TFETsTFETs withwith thethe randomlyrandomly generatedgenerated metalmetal graingrain profiles.profiles. FigureFigure3 3a,ba,b show show the the metal metal grain grain distributionsdistributions of planar planar TFETs, TFETs, with with the the highest highest value value of ofVturn-on Vturn-on at 0.367at 0.367 V and V andthe lowest the lowest value value at 0.289 at 0.289V, respectively. V, respectively. In the In gate the gateregion region of Figure of Figure 3a,b,3 a,b,a red a redcolor color represents represents metal metal grains grains with with WF WF of 4.6 of 4.6eV, eV, while while a blue a blue color color shows shows other other grains grains with with WF WF of of 4.4 4.4 eV. eV. Comparing Comparing Figure Figure 33a,b,a,b, therethere isis aa clearclear didifferencefference betweenbetween thethe twotwo samplessamples inin termsterms ofof thethe distributiondistribution ofof metalmetal grainsgrains adjacentadjacent toto the source region.region. Figure3 3a,a, withwith high high V Vturn-onturn-on, ,shows shows that that most most of of the the metal metal gr grainsains close to the sourcesource regionregion havehave aa WFWF ofof 4.64.6 eV,eV, whilewhile FigureFigure3 b,3b, with with low low V Vturn-onturn-on,, shows shows that that there there are are more metal grains withwith aa WFWF ofof 4.44.4 eVeV aroundaround thethe sourcesource region.region.

(a) (b)

FigureFigure 3.3. MetalMetal grain distributionsdistributions of planarplanar TFETs inin extremeextreme casescases (red(red color:color: metalmetal grainsgrains withwith aa work-functionwork-function (WF)(WF) ofof 4.64.6 eV,eV, andand blueblue color:color: metalmetal grainsgrains withwith aa WFWF ofof 4.44.4 eV)eV) amongamong thethe simulatedsimulated samples.samples. ((aa)) MaximumMaximum VVturn-onturn-on (0.367(0.367 V) V) case case of planar TFETs.TFETs. ((bb)) MinimumMinimum V Vturn-onturn-on (0.289(0.289 V) case ofof planarplanar TFETs.TFETs.

Figure4 shows the energy band diagrams of these two extreme cases of planar TFETs when Figure 4 shows the energy band diagrams of these two extreme cases of planar TFETs when VD VD is 0.5 V and VG is 0.4 V. Due to the difference in the distribution of the metal grains analyzed is 0.5 V and VG is 0.4 V. Due to the difference in the distribution of the metal grains analyzed above, above, the energy band bending between the source and the channel region becomes larger in the the energy band bending between the source and the channel region becomes larger in the case of case of Vturn-on = 0.289 V (red dash line) than in the case of Vturn-on = 0.367 V (black solid line). As a Vturn-on = 0.289 V (red dash line) than in the case of Vturn-on = 0.367 V (black solid line). As a result, when result, when the same VG is applied, there is a difference in the tunneling width of the two cases and the same VG is applied, there is a difference in the tunneling width of the two cases and accordingly, accordingly, the Vth is also different. As described above, the planar TFET is relatively vulnerable to the Vth is also different. As described above, the planar TFET is relatively vulnerable to the WFV the WFV effect, as the Vth of the planar TFET is only determined by the energy band of the channel effect, as the Vth of the planar TFET is only determined by the energy band of the channel adjacent to adjacent to the source region, while the Vth of the conventional MOSFET is determined by the entire the source region, while the Vth of the conventional MOSFET is determined by the entire channel under the gate [33]. In the metal grain distributions shown in Figure 3a,b, planar TFETs have a ΔVturn- on of 78 mV (0.367 V–0.289 V) between the two cases. On the other hand, the DG TFET and EHBTFET Appl. Sci. 2020, 10, 5378 6 of 10

Appl. Sci. 2020, 10, x FOR PEER REVIEW 6 of 11 channel under the gate [33]. In the metal grain distributions shown in Figure3a,b, planar TFETs have a ∆Vturn-on of 78 mV (0.367 V–0.289 V) between the two cases. On the other hand, the DG TFET and show a ΔVturn-on of 65 mV (0.371–0.306 V) and 5 mV (0.685–0.679 V), respectively, when one of two EHBTFETgates has show the same a ∆V turn-onmetal grainof 65 mVdistribution, (0.371–0.306 as shown V) and in 5 mVFigure (0.685–0.679 3a,b. V), respectively, when one of two gates has the same metal grain distribution, as shown in Figure3a,b.

V = 0.367 V 0.8 turn-on V = 0.289 V turn-on

0.0

-0.8 Band energy [eV] -1.6

0.02 0.04 0.06 0.08 0.10 0.12 Position [μm]

FigureFigure 4. Energy4. Energy band band diagrams diagrams of planar of planar TFETs TFETs with thewith highest the highest value ofvalue Vturn-on of Vatturn-on 0.367 at V 0.367 (black V solid (black

line)solid and line) the lowestand the value lowest of Vvalueturn-on ofat V 0.289turn-on Vat (red 0.289 solid V (red line) solid among line) the among simulated the samples simulated when samples VD

is 0.5when V and VD VisG 0.5is 0.4V and V. The VG blue is 0.4 dashed V. The line blue and dashed magenta line dashed and linemagenta show dashed the most line extreme show casesthe most in theoryextreme when cases the in entire theory gate when of the the planar entire TFET gate isof 4.6the and planar 4.4 eV,TFET respectively. is 4.6 and 4.4 eV, respectively.

As confirmed in the analysis of Figures3 and4, only seven metal grains near the source junction As confirmed in the analysis of Figures 3 and 4, only seven metal grains near the source junction mainly affect the tunneling current and the Vturn-on of the planar TFET. Meanwhile, in the case of DG mainly affect the tunneling current and the Vturn-on of the planar TFET. Meanwhile, in the case of DG TFETs, the addition of another gate on the opposite side doubles the number of metal grains (14 metal TFETs, the addition of another gate on the opposite side doubles the number of metal grains (14 metal grains)grains) that that aff affectect the the tunneling tunneling current current and and reduces reduces the th eeff effectect of of WFV. WFV. Unlike Unlike the the planar planar TFET TFET or or DG DG TFET,TFET, in in the the on-state on-state of of the the EHBTFET, EHBTFET, electrons electrons are ar collectede collected under under MG MG and and holes holes are are collected collected under under SG.SG. As As the the bias bias of of MG MG increases, increases, energy energy band band bending bending and and a tunnelinga tunneling current current are are generated generated in in the the channelchannel between between the the two two gates. gates. The The EHBTFET EHBTFET has ahas tunneling a tunneling current current at the at channel the channel between between MG and MG SG, and all of the metal grains (70 metal grains) where MG and SG overlap are included in Vturn-on and SG, and all of the metal grains (70 metal grains) where MG and SG overlap are included in Vturn- determination, which greatly reduces the effect of WFV. on determination, which greatly reduces the effect of WFV. ThisThis analysis analysis can can be be confirmed confirmed indirectly indirectly by by comparing comparing the the probabilities probabilities of of the the most most extreme extreme theoretical cases of the planar TFET, DG TFET and EHBTFET. As discussed above, the Vturn-on of the theoretical cases of the planar TFET, DG TFET and EHBTFET. As discussed above, the Vturn-on of the planarplanar TFET TFET and and DG DG TFET TFET is is controlled controlled by by the the metal metal grains grains near near the the source. source. Therefore, Therefore, the the planar planar TFET has the maximum value of Vturn-on when all WFs of seven metal grains adjacent to the source TFET has the maximum value of Vturn-on when all WFs of seven metal grains adjacent to the source are 7 are 4.6 eV and the minimum Vturn-on when they are all 4.4 eV; the probabilities are 2.8% (0.6 ) and 4.6 eV and the minimum Vturn-on when they are all 4.4 eV; the probabilities are 2.8% (0.67) and 0.2% 7 0.2% (0.4 ), respectively. Similarly, for the DG TFET, the probability of the maximum Vturn-on is (0.47), respectively. Similarly, for the DG TFET, the probability of the maximum Vturn-on is 7.8 × 10−2% 2 14 4 14 7.8 10− % (0.6 ) and the probability of the minimum Vturn-on is 2.7 10− % (0.4 ). In the case of (0.6× 14) and the probability of the minimum Vturn-on is 2.7 × 10−4% (0.414×). In the case of the EHBTFET, as thetunneling EHBTFET, occurs as tunneling from the occursvalence from band the of the valence channe bandl near of theSG to channel the conduction near SG toband the of conduction the channel band of the channel near MG, the Vturn-on reaches the maximum when all MG grains have a WF near MG, the Vturn-on reaches the maximum when all MG grains have a WF of 4.6 eV and all SG grains ofhave 4.6 eV a WF and of all 4.4 SG eV grains where have MG aand WF SG of 4.4overlap, eV where as shown MG andin Figure SG overlap, 5a; its probability as shown in is Figure2.0 × 105a;−20% 20 35 35 its probability35 35 is 2.0 10− % (0.6 0.4 ). Additionally, in the opposite case, as shown in Figure5b, (0.6 × 0.4 ). Additionally,× in the× opposite case, as shown in Figure 5b, the Vturn-on reaches the the Vturn-on reaches the minimum and its probability is equal to the probability of the maximum Vturn-on. minimum and its probability is equal to the probability of the maximum Vturn-on. By comparing the Byprobabilities comparing theof the probabilities most extreme of the cases most in extremethe three cases structures, in the threeit was structures, confirmed itthat was the confirmed EHBTFET thathas the the EHBTFET smallest probabilities, has the smallest and probabilities, this difference and is this caused difference by theis difference caused by in the the di numberfference of in metal the number of metal grains that affect the Vturn-on. grains that affect the Vturn-on. Appl.Appl. Sci. Sci.2020 2020, 10, 10, 5378, x FOR PEER REVIEW 77 of of 10 11 Appl. Sci. 2020, 10, x FOR PEER REVIEW 7 of 11

Main gate Main gate Main gate Main gate WF : 4.6 eV WF : 4.4 eV WF : 4.6 eV WF : 4.4 eV

P+ N+ P+ N+ P+ N+ P+ N+ WF : 4.4 eV WF : 4.6 eV WF : 4.4 eV WF : 4.6 eV (a) (b) (a) (b) Figure 5. Expected metal grain distributions of EHBTFETs in the most extreme theoretical cases (red Figurecolor: 5. metal ExpectedExpected grains metal with metal graina grainWF distributionsof distributions4.6 eV, blue of color: EHBTFETs of EHBTFETs metal grainsin the in themostwith most aextreme WF extreme of 4.4 theoretical eV, theoretical and blackcases cases color:(red (redcolor:metal color: metal grains metal grains that grains withhave a withless WF effect aof WF 4.6 on ofeV, 4.6the blue eV,Vturn-on color: blue of color: metal EHBTFET). metalgrains grains with(a) Expected a with WF of a WFmaximum4.4 eV, of 4.4 and eV, V blackturn-on and color:case black of

color:metalEHBTFETs grains metal grainsinthat theory. have that (less haveb) Expected effect less eonff ect minimumthe on Vturn-on the V V ofturn-onturn-on EHBTFET). caseof EHBTFET). of EHBTFETs (a) Expected (a) Expectedin theory.maximum maximum Vturn-on V caseturn-on of caseEHBTFETs of EHBTFETs in theory. in theory.(b) Expected (b) Expected minimum minimum Vturn-on case Vturn-on of EHBTFETscase of EHBTFETs in theory. in theory. In order to prove that the WFV improvement of the EHBTFET is due to the large number of In order to prove that the WFV improvement of the EHBTFET is due to the large number of metal metalIn grains,order to the prove σVturn-on that of the the WFV planar improvement TFET, DG TFET, of the and EHBTFET EHBTFET is wasdue examined to the large while number reducing of grains, the σV of the planar TFET, DG TFET, and EHBTFET was examined while reducing the metalthe L grains,G of the the EHBTFET,turn-on σVturn-on asof theshown planar in Figure TFET, 6.DG The TFET, WFV and effects EHBTFET of the planar was examined TFET and while DG TFET reducing were LthedeterminedG ofLG theof the EHBTFET, EHBTFET, by the metal as shownas showngrains in in Figurelocated Figure6 .at The6. the The WFVedge WFV ebetween ffeffectsects of of the the the source planar planar and TFET TFET the andand channel. DGDG TFETTFET Therefore, were determined by the metal grains located at the edge between the source and the channel. Therefore, determinedthe σVturn-on by of thethe metalplanar grains TFET located and DG at TFET the edge is not between significantly the source affected and by the the channel. change Therefore, in the gate the σV of the planar TFET and DG TFET is not significantly affected by the change in the gate thelength. σVturn-on On ofthe the other planar hand, TFET when and the DG LG TFETof the isEHBTFET not sign ificantlydecreases, affected the number by the of change metal grainsin the ingate the length. On the other hand, when the L of the EHBTFET decreases, the number of metal grains in the length.overlapping On the areas other ofhand, MG whenand SG the decreases LG of the andEHBTFET the σV decreases,turn-on of the the EHBTFET number ofincreases metal grains accordingly. in the overlapping areas of MG and SG decreases and the σV of the EHBTFET increases accordingly. overlappingBy comparing areas when of MG LG wasand SG70 nmdecreases and when and LtheG was σVturn-onturn-on 30 nm, of theit can EHBTFET be seen increasesthat the σaccordingly.Vturn-on of the ByEHBTFET comparing increased when L fromG was 4.0 70 to nm 9.9 andandmV whenaswhen the LnumbLGG waser 3030of nm,metalnm, itit grainscancan bebe affecting seenseenthat that the the the tunnelingσ σVVturn-onturn-on currentof the EHBTFET increased from 4.0 to 9.9 mV as the number of metal grains affecting the tunneling current EHBTFETdecreased increased from 70 tofrom 14, 4.0respectively. to 9.9 mV asTherefore, the numb ifer L ofG continues metal grains to decrease, affecting the tunnelingWFV effects current of the decreasedEHBTFET from are 70expected to 14, respectively.to be similar Therefore, to those of if LotGher continues TFET structures. to decrease, In the addition, WFV effects e fftheects electrical of the EHBTFET are expected to be similar to those of other TFET structures. In addition, the electrical EHBTFETperformance are (e.g.,expected Ion) alsoto be degrades similar asto thethose tunneling of other area TFET (i. e.,structures. overlap areaIn addition, between themain electrical and sub performance (e.g., I ) also degrades as the tunneling area (i.e., overlap area between main and sub performancegates) of the (e.g.,EHBTFET Ion) also decreases degrades with as thethe smaller tunneling LG. areaConsequently, (i.e., overlap when area the between scaling maindown and of TFETs sub gates) of the EHBTFET decreases with the smaller L . Consequently, when the scaling down of TFETs gates)continues, of the EHBTFETit is necessary decreases to maintain with the smallerthe LG LbyG. Consequently,using a vertical when channel the scaling [38] downto maintain of TFETs the continues,advantages itit is ofis necessary thenecessary EHBTFET to maintainto inmaintain the theWFV LtheG effects.by L usingG by ausing vertical a vertical channel [channel38] to maintain [38] to the maintain advantages the ofadvantages the EHBTFET of the in EHBTFET the WFV einff ects.the WFV effects.

FigureFigure 6. 6. The σVturn-onturn-on ofof the the planar planar TFET, TFET, DG DG TFET, TFET, and and EHBTFET EHBTFET when when the L theG isL changed.G is changed. While Figure 6. The σVturn-on of the planar TFET, DG TFET, and EHBTFET when the LG is changed. While Whilereducing reducing the L theG, the LG L,CH the is L reducedCH is reduced by the by same the length, same length, and L andUD and LUD LUSand are L keptUS are at kept20 nm. at 20 nm. reducing the LG, the LCH is reduced by the same length, and LUD and LUS are kept at 20 nm. 4.4. Conclusions Conclusions 4. Conclusions InIn this this research, research, the the WFV WFV e ffeffectsects of of the the planar planar TFET, TFET, DG DG TFET, TFET, and and EHBTFET EHBTFET were were compared compared σ andand analyzedIn analyzed this research, by by TCAD TCAD the simulation.WFV simulation. effects As ofAs athe a result result plan ofar of extracting TFET, extracting DG the TFET, theV σturn-on Vandturn-on EHBTFETand and examining examining were compared the the metal metal grainandgrain analyzed distributions, distributions, by TCAD it it was was simulation. confirmed confirmed thatAs that a the result the planar planar of extracting TFET TFET has has thethe the greatestσ Vgreatestturn-on WFVand WFV examining eff ecteffect because because the onlymetal only a fewgraina few metal distributions, metal grains grains around itaround was the confir the source sourcemed region that region the aff ectaffectplanar the the VTFETturn-on Vturn-on has. On. Onthe the thegreatest other other hand, WFVhand, theeffect the EHBTFET EHBTFET because is onlyis the the a few metal grains around the source region affect the Vturn-on. On the other hand, the EHBTFET is the Appl. Sci. 2020, 10, 5378 8 of 10 most immune from the WFV effect, as all of the metal grains where MG and SG overlap determine the Vturn-on.

Author Contributions: Conceptualization, G.K. and S.K.; validation, J.H.K. and J.K.; investigation, G.K.; data curation, G.K.; writing—original draft preparation, G.K.; writing—review and editing, J.H.K., J.K. and S.K; visualization, G.K. All authors have read and agreed to the published version of the manuscript. Funding: This research was supported in part by the MOTIE/KSRC under Grant 10080575 (Future Semiconductor Device Technology Development Program), and in part by the NRF of Korea funded by the MSIT under Grant NRF-2019M3F3A1A03079739, NRF-2019M3F3A1A02072091 (Intelligent Semiconductor Technology Development Program), NRF-2020R1G1A1007430 and NRF-2020M3F3A2A01081672, and in part by 2019 Research Fund of Myongji University. The EDA tool was supported by the IC Design Education Center (IDEC), Korea. Conflicts of Interest: The authors declare no conflict of interest.

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