The Heat Is On: Thermal Management Issues in Semiconductor Packaging

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MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

A ONE-DAY TECHNICAL SYMPOSIUM & EXHIBITS

PLATINUM S P O N S O R S TheThe HeatHeat IsIs On:On: ThermalThermal ManagementManagement IssuesIssues inin SemiconductorSemiconductor PackagingPackaging

GOLD S P O N S O R S FeaturingFeaturing TechnicalTechnical PresentationsPresentations byby

■■ 3M3M CorporationCorporation ■■ IntelIntel CorporationCorporation

■■ AmkorAmkor TechnologyTechnology ■■ InternationalInternational RectifierRectifier

■■ CMCCMC InterconnectInterconnect TechnologiesTechnologies ■■ nVIDIAnVIDIA CorporationCorporation

■■ Flomerics,Flomerics, Inc.Inc. ■■ SolectronSolectron

■■ FujitsuFujitsu LaboratoriesLaboratories ofof AmericaAmerica ■■ StanfordStanford UniversityUniversity SILVER S P O N S O R S ■■ GartnerGartner DataquestDataquest ■■ STATSSTATS ChipPACChipPAC

■■ Hewlett-PackardHewlett-Packard ■■ SunSun MicrosystemsMicrosystems

FEBRUARY 16, 2005 • SAN JOSE, CALIFORNIA

MEDIA SPONSORS EVENT LOCATION

SURF ACE MOUNT TECHNOLOGY ® M A G A Z I N E S A N J O S E MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

A ONE-DAY TECHNICAL SYMPOSIUM & EXHIBITS

Welcome to The Heat Is On: Thermal Management Issues in Semiconductor Packaging

Dear Symposium Attendee,

On behalf of the MEPTEC Management and Advisory Board, we would like to take this opportunity to thank you for your interest and support of this symposium. It is one in a unique and ongoing quarterly symposium series. For the many individuals that have attended prior symposiums, welcome back and we anticipate that this symposium will again meet your expectations. For the first time attendees of a MEPTEC symposium event, as for all attendees, we welcome your feedback and perspective on defining and improving future MEPTEC Symposiums. Thank you for joining us today!

The decision to develop a symposium based upon the thermal management issues in semiconductor packaging was an easy choice for the MEPTEC Advisory Board, as literally each and every member was somehow impacted by the topic. With this industry significance in mind, we are very fortunate to be able to bring together some of the most prestigious speakers on this topic and thank them for their commitment and time to present here. We would also like to thank the Session Chairs, as well as the MEPTEC Thermal Symposium Committee for their technical direction, timely support and overall efforts in preparation for this symposium event. Our thanks also to the event Sponsors and Exhibitors for their support. We would like to encourage all attendees to take advantage of the table-top reception exhibits this evening.

Semiconductor packaging issues and solutions, specifically related to overall thermal considerations, can impact every level of the vendor and customer supply chain. Therefore this symposium agenda, typical to the MEPTEC four-session methodology, was specifically defined to cover the range of various aspects. A review of the agenda shows the Keynote followed by the Technology and Market Overview in Session One; actual Device Level Challenges and Solutions in Session Two; the key areas of Thermal Modeling, Characterization and Measurement in Session Three; followed by Session Four as we review System Level Challenges and Solutions. As an attendee, you will receive this well rounded perspective of both the global business and key technology aspects of Thermal Management. Session definition and this agenda methodology have been a major factor in the overall success of the MEPTEC symposiums, not to mention optimizing the valuable time resource of symposium attendees.

Please do enjoy yourself today, as every possible consideration was made to allow for a comfortable and professional setting. We hope you will find value in gaining technical information and networking with a wide variety of colleagues from the various segments of the semiconductor industry related to Thermal Management.

The symposium committee welcomes all comments to improve these symposium events and we look forward to seeing you at the post-symposium reception and table-top exhibits from 5:00 pm -7:00 pm.

Thank you for attending and we hope you benefit from the many aspects of this MEPTEC symposium!

Regards,

Ananth Naman, PhD. Nicholas Leonardi R&D Director, Interconnect Packaging Solutions Vice President of Sales and Marketing Honeywell Electronic Materials CMC Interconnect Technologies Symposium Technical Chairman Symposium General Chairman

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

CONTENTS Agenda

Event Sponsor Directory and Ads

Table Top Exhibitor Directory

Biographies

KEYNOTE SPEECH: Thermal Management Challenges for Microprocessors Dr. Greg Chrysler, Intel Corporation

SESSION ONE: TECHNOLOGY AND MARKET OVERVIEW Session Chair: Dr. Julia Goldstein, Advanced Packaging Magazine - Advanced Thermal Management Technologies for Electronic Systems Professor Kenneth Goodson, Stanford University - The Heat is On: Thermal Packaging - Markets and Opportunities Jim Walker, Gartner Dataquest - Presentation of the NEMI Thermal Working Group Roadmap (2004 issue) Cameron T. Murray, 3M Electronics Markets Materials Division

SESSION TWO: DEVICE LEVEL CHALLENGES AND SOLUTIONS Session Chair: Nicholas Leonardi, CMC Interconnect Technologies - Efficient Thermal Management Using Advanced Semiconductor Packaging Techniques Chris Schaffer, International Rectifier - Engineering Graphics Processors Thermal Solutions Joseph Walters, nVidia Corporation - 64-bit Server Cooling Requirements David Copeland, Fujitsu Laboratories of America

SESSION THREE: MODELING,CHARACTERIZATION AND MEASUREMENTS Session Chair: Dr. Skip Fehr, Industry Consultant - Material and Interfacial Impact on Package Thermal Performance Dr. Jonathan Harris, CMC Interconnect Technologies - Emerging Standards in Thermal Simulation David Stiver, Flomerics Inc. - Thermal Characterization and Modeling: A Key Part of the Total Packaging Solution Dr. Roger Emigh, STATS ChipPAC

SESSION FOUR: SYSTEM LEVEL CHALLENGES AND SOLUTIONS Session Chair: Joel Camarda, Camarda Associates - Thermal Design Considerations for System in Package Jesse Galloway Ph.D., Amkor Technology - System Cooling of Outdoor Wi-Fi Antenna Robert Raos, Solectron - Low Profile Heat Sink Cooling Technologies for Next Generation CPU Thermal Designs Marlin Vogel, Sun Microsystems - Thermal Management from Chip Core to the Cooling Tower Chandrakant Patel, Hewlett Packard Laboratories

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council

A ONE-DAY TECHNICAL SYMPOSIUM & EXHIBITS

The Heat Is On: Thermal Management Issues in Semiconductor Packaging

MORNING AGENDA

7:15 am Registration Opens

8:15 am – 8:30 am Welcome and Introduction / Overview

KEYNOTE SPEECH Thermal Management Challenges for Microprocessors 8:30 am – 9:00 am Dr. Greg Chrysler, Intel Corporation

SESSION ONE TECHNOLOGY AND MARKET OVERVIEW Session Chair: Dr. Julia Goldstein, Advanced Packaging Magazine

9:00 am – 9:30 am Advanced Thermal Management Technologies for Electronic Systems Professor Kenneth Goodson, Stanford University

9:30 am – 10:00 am The Heat is On: Thermal Packaging - Markets and Opportunities Jim Walker, Gartner Dataquest

10:00 am – 10:30 am Presentation of the NEMI Thermal Working Group Roadmap (2004 issue) Cameron T. Murray, 3M Electronics Markets Materials Division

10:30 am – 10:45 am Morning Break and Exhibits

SESSION TWO DEVICE LEVEL CHALLENGES AND SOLUTIONS Session Chair: Nicholas Leonardi, CMC Interconnect Technologies

10:45 am – 11:15 am Efficient Thermal Management Using Advanced Semiconductor Packaging Techniques Chris Schaffer, International Rectifier

11:15 am – 11:45 am Engineering Graphics Processors Thermal Solutions Joseph Walters, nVidia Corporation

11:45 am – 12:15 pm 64-bit Server Cooling Requirements David Copeland, Fujitsu Laboratories of America

12:15 pm – 1:15 pm Lunch and Exhibits

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia Join Us!

A ONE-DAY TECHNICAL SYMPOSIUM & EXHIBITS

The Heat Is On: Thermal Management Issues in Semiconductor Packaging

AFTERNOON AGENDA

SESSION THREE MODELING,CHARACTERIZATION AND MEASUREMENTS Session Chair: Dr. Skip Fehr, Industry Consultant

1:15 pm – 1:45 pm Material and Interfacial Impact on Package Thermal Performance Dr. Jonathan Harris, CMC Interconnect Technologies

1:45 pm – 2:15 pm Emerging Standards in Thermal Simulation David Stiver, Flomerics Inc.

2:15 pm – 2:45 pm Thermal Characterization and Modeling: A Key Part of the Total Packaging Solution Dr. Roger Emigh, STATS ChipPAC

2:45 pm – 3:00 pm Afternoon Break and Exhibits

SESSION FOUR SYSTEM LEVEL CHALLENGES AND SOLUTIONS Session Chair: Joel Camarda, Camarda Associates

3:00 pm – 3:30 pm Thermal Design Considerations for System in Package Jesse Galloway Ph.D., Amkor Technology

3:30 pm – 4:00 pm System Cooling of Outdoor Wi-Fi Antenna Robert Raos, Solectron

4:00 pm – 4:30 pm Low Profile Heat Sink Cooling Technologies for Next Generation CPU Thermal Designs Marlin Vogel, Sun Microsystems

4:30 pm – 5:00 pm Thermal Management from Chip Core to the Cooling Tower Chandrakant Patel, Hewlett Packard Laboratories

5:00 pm – 7:00 pm Exhibits and Reception

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

A SPECIAL THANKS TO OUR MEDIA SPONSORS:

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

A SPECIAL THANKS TO OUR EVENT SPONSORS:

Platinum Sponsors CMC Interconnect Technologies Flomerics, Inc. Honeywell Electronic Materials

Gold Sponsors Amkor Technology Boschman Technologies B.V. Ceramics Process Systems

Silver Sponsors Dymatix Henkel Corporation Palomar Technologies, Inc. Technic, Inc.

Please see our sponsors’ ads on the following pages.

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

EVENT SPONSOR DIRECTORY

PLATINUM SPONSORS

CMC Interconnect Technologies Flomerics, Inc. Honeywell Electronic Materials 7755 S. Research Drive, Tempe, AZ 85284 4699 Old Ironsides Dr., #390, Santa Clara, CA 95054 1349 Moffett Park Drive, Sunnyvale, CA 94089 Phone: 480-496-5000 Phone: 408-562-9100 Phone: 408-962-2000 www.cmcinterconnect.com www.flomerics.com www.electronicmaterials.com Event Platinum Sponsor and Presenter, CMC Interconnect Flomerics provides simulation software tools and services Honeywell Electronic Materials, a unit of Honeywell Technologies provides outsourced technical services to the – primarily to the electronics industry – to improve and Specialty Materials, is a leading material supplier to the electronics industry. CMC specializes in analytical testing, accelerate the design process. Their software enables semiconductor industry developing and manufacturing failure analysis, reliability testing, thermal / electrical char- engineers to predict the thermal or EMC behavior of a broad line of products utilized in the production of acterization and technical consulting. CMC’s testing capa- a proposed design prior to the build and test phase. integrated circuits. Providing solutions for applications bilities include: SEM/EDS, Thermal / Electrical measure- Customers achieve significant cost savings through using utilizing subtractive or damascene processes, Honeywell ments, Mechanical Testing, and Thermal / Environmental their software, as well as reducing time-to-market. Their offers Spin-on glasses, advanced dielectrics, application Stress evaluations. CMC experience includes organic, plas- client list includes virtually all of the major electronics specific electronic chemicals, PVD targets, thermocouples tic, ceramic and metal packaging and interconnection. companies of the world. and packaging solutions for thermal management and electrical interconnect as well as sapphire substrates and custom sapphire fabrications for the optoelectronics industry. GOLD SPONSORS

Amkor Technology Boschman Technologies B.V. Ceramics Process Systems 1900 S. Price Road, Chandler, AZ 85248 Nieuwgraaf 336, Duiven, 6921 RS, The Netherlands 111 S. Worcester St., PO Box 338, Chartley, MA 02712 Phone: 480-821-5000 Phone: 41-2631-4900 Phone: 508-222-0614 www.amkor.com www.boschman.nl www.alsic.com Amkor Technology is a leading provider of full turnkey Boschman Technologies is the world's leading suppli- Ceramics Process Systems (CPS) is the World Leader IC packaging, test and distribution services for semicon- er of automatic molding systems using Film Assisted in providing AlSiC thermal management materials and ductor manufacturers. Amkor helps enable applications Molding (FAM) technology. QFN, SENSOR, MEMS and electronic packaging designs and products for the micro- involving computing, wireless communications, network- other unique applications where bond pads, heat sinks, electronics and power electronics industries. CPS uses ing, and consumer portable and handheld electronic window or exposed die surfaces must be kept free of mold its net-shape fabrication process for high volume manu- devices. Amkor offers more than 1000 different package compound or resin bleed are ideally suited for their cost facturing of AlSiC components including flip-chip lids formats and sizes – from leadframe packages to System in effective technology. As the holder of many FAM related (microprocessor, heatsinks, flip-chip, DSP application), Package, Flip Chip, CSPs, and camera modules. In addi- patents, Boschman brings unique and proven solutions. power applications (IGBT baseplate, power substrates), tion, they offer complete wafer bumping and die level In addition Boschman provides automatic molding solu- optoelectronic and microwave packaging. Current produc- interconnect technology services. Amkor has manufactur- tions for conventional semiconductor devices and reel to tion quantities can be as few as tens of pieces to tens of ing operations in China, Japan, Taiwan, Korea, Singapore reel smartcards. thousands daily. and the Philippines.

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

EVENT SPONSOR DIRECTORY

SILVER SPONSORS

Dymatix Henkel Corporation Technic, Inc. 71 Daggett Drive, San Jose, CA 95134 15350 Barranca Parkway, Irvine CA 92618 1170 Hawk Circle, Anaheim, CA 92807 Phone: 408-416-2700 Phone: 949-789-2500 Phone: 714-632-0200 www.dymatix.com www.henkelelectronics.com www.technic.com Dymatix is the world class supplier of Die Sort equipment The electronics group of Henkel provides materials solu- Technic Inc. is a 50 + year company specializing in the integrating wafer and singulated die test & inspection into tions for the electronics industry. Their unmatched tech- manufacture of plating equipment and specialty chemis- the pick and place process. Dymatix 200mm and 300mm nology includes liquid encapsulants, package level and tries used in the semiconductor and electronics industry. systems offer unique flexibility, and high throughput DCA underfills, molding compounds, electrically con- Leading edge products including the first automated that utilize applications expertise covering CSP, flip chip, ductive adhesives, die attach adhesives, solder materials continuous heat sink lid plating machine (2001), SBE 300mm, vision inspection, UV curing and more. The and fluxes, photonics materials, surface mount adhe- Chip Capacitor Plater- (built 2002-reduces plating times model 1300 series is a fully automatic die Inspection & sives, conformal coatings, optoelectronic materials, pot- by 40%) Full Automated continuous cut strip lead frame Test system designed to pick bare die from up to twelve ting compounds, thermally conductive materials, phase plating machine (1980) which now uses the patented, inch diced wafer and insert, with binning, into a wide change thermal interface materials, and coating powders. whisker resistant -IPC/Jedec acknowledged PB free pure array of output media, i.e. waffle pack/gelPAK, tape & reel, Offering a range of materials for environmentally friendly Sn -TECHNISTAN EP. Technic chemistries can be found tubes, film frames, etc. manufacturing, they offer lead-free solder materials, as globally and include Cmos grade (UBM-Under Bump well as die attach, mold compounds, underfills and liquid Metalization) and electroplate copper, nickel, pure gold, encapsulants for semiconductors and other components whisker resistant pure tin and new this year an 80/20 to meet your 260˚C processing challenges. Gold-Tin alloy. The RTA (Real Time Analyzer) has become the recognized leader and sought after metrology tool for copper chemistries.

Palomar Technologies, Inc. 2230 Oak Ridge Way, Vista, CA 92081 Phone: 760-931-3600 www.palomartechnologies.com Palomar Technologies is a leading supplier of automated high-precision assembly systems that increase yield and lower costs for manufacturers of optoelectronic, RF, and microelectronic packages in the photonic, wireless, microwave, automotive, aerospace, medical, and life sciences industries.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia ��

�� thermal management expertise

right at your ﬁngertips

For nearly two decades, Flomerics has delivered thermal management so�ware solutions to the value chain, from system providers to IC manufacturers.

Our commitment to the electronics industry has helped our customers gain a depth of thermal management expertise, not found anywhere else.

It’s your decision. Trust the experts. ■ ■ METALS CHEMICALS DIELECTRICS ■ PACKAGING ■ OPTOELECTRONICS Putting the Pieces Together

Providing the Most Complete Solutions for Your Interconnect Packaging Challenges… Honeywell is established as a prime supplier in electrical and thermal interconnect products used in the manufacture of high performance BGA and flipchip packages. Our capabilities include design, prototyping, specialized fabrication, metal finishing and high volume manufacturing. Electrical Interconnect: Evaporation & Power Products Honeywell’s core competencies include manufacture of the high-purity evaporation charges and electroplating anode products that are used for back metallization, underbump metallization and wafer bumping of flipchip die. We offer a comprehensive material set for the manufacture of high power devices. Thermal Management: Spreaders, Lids & Stiffeners Honeywell provides a wide range of thermal heat spreaders, heat slugs and stiffeners used to overcome today’s thermal management challenges. We specialize in providing novel thermal solutions for applications requiring the highest performance and tightest tolerances. Thermal Management: Thermal Interface—Phase Change Materials Our packaging science expertise allows us to address thermal management concerns at various levels within both die-to-package and package-to-system assemblies. Honeywell’s PCM45 Series materials exhibit excellent surface wetting characteristics resulting in low contact resistance, but do not degrade with use. Putting Together Added Value— Combo-Spreader™ with Pre-attached Phase Change Material Available only from Honeywell, the Combo-Spreader is an innovative solution for today’s advanced thermal challenges. By combining the benchmark thermal performance of PCM45 with our industry leading thermal spreaders, we provide a lasting solution well ahead of the ITRS roadmap, with fewer production steps required. Our expertise in materials science, metallurgy and chemistry enables Honeywell to provide solutions to your interconnect packaging needs at a reduced cost of ownership…from layer one to package done.™

CPS

AlSiC for Thermal Management

CPS is the World Leader in providing AlSiC thermal management materials, electronic packaging designs and products for the microelectronics and power electronics industries. CPS uses its net-shape fabrication process for high volume manufacturing of AlSiC components including ﬂ ip-chip lids (microprocessor, ASICS, DSP applications), power applications (IGBT baseplate, power substrates), opto-electronic and microwave packaging.

Ceramics Process Systems Chartley, MA Phone: 508-222-0614 Fax: 508-222-0220 www.alsic.com

MEPTEC would like to thank its sponsors for supporting this event!

Join Us!

801 W. El Camino Real, No. 258, Mountain View, CA 940403 Tel: 650-988-7125 Fax: 650-962-8684 Email: [email protected] 1 Pt. = 1 Inch MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

BAR LUNCH ROOM 33 34 35 36 MEETING ROOM 13 14 15 16 17 ENTRANCE RECEPTION BUFFET 12 1 REGISTRATION 22 21 20 19 18 11 23 24 25 26 27 2

10 3 32 31 30 29 28 9 4 8 7 6 5 37 Tables HYATT SAN JOSE Fire Exit MEDITERRANEAN CENTER

1 SunSil Inc. 13 Boschman Technologies B.V. (G) 25 Bondline Electronic Adhesives 2 Spectra-Mat, Inc. 14 Ceramics Process Systems (G) 26 Mitsui Chemicals America, Inc. 3 Brush Ceramic Products 15 Sonoscan, Inc. 27 Gartner Dataquest 4 Shin-Etsu MicroSi, Inc. 16 SensArray Corporation 28 Alpha Novatech, Inc. 5 Electronic Trend Publications 17 F & K Delvotec, Inc. 29 AIM Specialty Materials 6 ASYNTIS GmbH 18 IPAC - Twin Advance 30 Chomerics 7 ThermalWorks 19 Diehard Engineering, Inc. 31 Marathon Products, Inc. 8 AkroMetrix LLC 20 Chaun Choung Technology Corp. 32 FRT of America, LLC 9 Seelin Associates 21 Advanced Packaging Associates 33 Flomerics, Inc. (P) 10 Pac Tech USA 22 ASAT Inc. 34 Honeywell Electronic Materials (P) 11 Harvard Thermal Inc. 23 Orthodyne Electronics 35 CMC Interconnect Technologies (P) 12 Palomar Technologies Inc. (S) 24 Shinko Electric America 36 Amkor Technology (G)

(P) Platinum Event Sponsor (G) Gold Event Sponsor (S) Silver Event Sponsor

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Table Table Table 21 ADVANCED PACKAGING 28 ALPHA NOVATECH, INC. 6 ASYNTIS GMBH ASSOCIATES 5671 Beaumont Avenue 473 Sapena Court #12 7373 E. Doubletree Ranch Road La Jolla, CA 92037 Santa Clara, CA 95054 Scottsdale, AZ 85258 Phone: 858-454-2149 Phone: 408-567-8082 Phone: 480-315-0361 www.advpkgassoc.com www.alphanovatech.com www.asyntis.com Advanced Packaging Associates (APA) will be highlighting Alpha Novatech specializes in high performance heat ASYNTIS´ unparalleled plasma dry etch technology enables three organizations at the MEPTEC Thermal Management sinks and precision cold forging of complex light mate- customers in the semiconductor backend industry for thin symposium: rial parts. They also offer related accessory parts including wafer production to realize dramatic yield improvements • Diemat - www.diemat.com - Die attach and thermal thermally conductive interface materials, cooling fans through superior stress relief processing, while keeping adhesives offering unmatched thermal conductivities, and attachment accessories. Their product mix includes costs of ownership below the level of competitive tech- exceeding most common solders. custom and off the shelf parts, ranging from simple to nologies like wet chemistry, fine polishing or ADP plasma. • Remtec - www.remtec.com - PCTF: Combining Plated complex in design. With the fully-automatic Silicon Star Plasma system and Copper Metallization with multilayer Thick Films for the manual Pioneer No. 1 series, ASYNTIS offers two suc- Table Custom Metallized Ceramic Substrates, Chip Carriers AMKOR TECHNOLOGY cessful product lines. and Hermetic Packages. 36 Table • Sandvik Osprey Ltd. - www.cealloys.com - Offers a fam- 25 BONDLINE ELECTRONIC ily of lightweight, controlled expansion, high thermal 1900 S. Price Road ADHESIVES conductivity alloys in both standard and custom forms Chandler, AZ 85248 and shapes. Phone: 480-821-5000 756 N. Pastoria Avenue

Table www.amkor.com Sunnyvale, CA 94085 Phone: 408-830-9200 29 AIM SPECIALTY Amkor Technology is a leading provider of full turnkey MATERIALS IC packaging, test and distribution services for semicon- www.bondline.net 25 Kenney Drive ductor manufacturers. Amkor helps enable applications Bondline Electronic Adhesives is a U.S. based manufacturer Cranston, RI 02920 involving computing, wireless communications, network- of premixed and film adhesives. Bondline was founded in Phone: 401-463-5605 ing, and consumer portable and handheld electronic 1989. The company headquarters and main laboratory are devices. Amkor offers more than 1000 different package located in Sunnyvale, CA. Bondline is committed to the www.aimspecialty.com formats and sizes - from leadframe packages to System in highest quality in adhesive products through dedication AIM Specialty Materials supplies a wide range of advanced Package, Flip Chip, CSPs, and camera modules. In addi- to product reliability, conformance to specifications and thermal interface materials, including metal-filled epoxies, tion, they offer complete wafer bumping and die level timely delivery. copper, aluminum, and indium alloys. These metal based interconnect technology services. Amkor has manufactur- Table TIMs provide superior thermal transfer in applications ing operations in China, Japan, Taiwan, Korea, Singapore BOSCHMAN where the performance of thermal grease is insufficient. and the Philippines. 13 AIM’s technical staff is available to assist you with custom TECHNOLOGIES B.V. Table designed solutions to your most challenging applications. ASAT INC. Nieuwgraaf 336, Duiven 22 6921 RS, The Netherlands Table 8 AKROMETRIX LLC Phone: 41-2631-4900 6701 Koll Center Parkway, Suite 200 www.boschman.nl Pleasanton, CA 94566 2700 NE Expressway Blvd. C, Suite 100 Phone: 925-398-0400 Boschman Technologies is the world's leading supplier of automatic molding systems using Film Assisted Atlanta, GA 30101 www.asat.com Phone: 404-486-0880 Molding (FAM) technology. QFN, SENSOR, MEMS and ASAT Holdings Limited is a global provider of semicon- other unique applications where bond pads, heat sinks, www.warpfinder.com ductor assembly, test and package design services. With window or exposed die surfaces must be kept free of mold AkroMetrix is the leader in advanced thermo-mechani- 15 years of experience, the Company’s advanced package compound or resin bleed are ideally suited for our cost cal characterizations of substrates and packages. Their portfolio includes standard and high thermal performance effective technology. As the holder of many FAM related TherMoiré in-process warpage measurement and analysis BGAs, QFNs (LPCC, TAPP), system-in-package, and flip patents, Boschman brings unique and proven solutions. technology enables real-time data acquisition during chip. The Company has operations in the United States, In addition Boschman provides automatic molding solu- dynamic temperature profiling. With a testing range of Asia and Europe. ASAT Inc. is a wholly owned subsidiary tions for conventional semiconductor devices and reel to -5˚ C to 300˚ C, AkroMetrix provides process/environment of ASAT Holdings Limited and the exclusive representative reel smartcards. specific warpage data to our customers. of services in North America.

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Table Table 3 BRUSH CERAMIC 30 CHOMERICS industry. The reports typically cover a market for the entire PRODUCTS world and are broken into the segments that pertain to that market. Each report is written to serve the needs of 6100 S. Tucson Blvd. 77 Dragon Court three distinct groups: vendors, users, and other industry Tucson, AZ 85706 Woburn, MA 01801 participants. Phone: 520-746-0699 Phone: 781-935-4850 Table www.brushceramicproducts.com www.chomerics.com 17 F&K DELVOTEC, INC. Brush Ceramic Products is the leading manufacturer of Chomerics division of Parker Hannifin Corporation is a Beryllium Oxide Ceramics. BeO ceramics enables micro- global supplier of EMI Shielding and Thermal Management electronics to operate at higher frequencies and tempera- Materials. Chomerics offers its customers a worldwide net- 27182 Burbank Street tures in smaller, highly reliable packages. BeO provides work of Applications Engineering support, manufacturing Foothill Ranch, CA 92610 thermal conductivity second only to diamond, dissipating facilities, and sales offices. With stocking and fabrication Phone: 949-595-2200 nearly 300W/mK at room temperature, ten times greater on five continents, Chomerics products are available when www.fkdelvotecusa.com than Al2O3 and double AlN. and where you need them. F&K Delvotec is a respected technological leader of Table Table automated, semi-automated, and manual wirebonding 14 CERAMICS PROCESS 35 CMC INTERCONNECT and diebonding systems in the microelectonics and semi- SYSTEMS TECHNOLOGIES conductor packaging industries. They offer wirebonding equipment in wedge, ball, and deep-access ribbon formats, 111 S. Worcester Street, PO Box 338 7755 S. Research Drive # 115 and their automated “Multi-Chip” diebonders offer both Chartley, MA 02712-0338 Tempe, AZ 85284 epoxy and eutectic die attach capability. Phone: 508-222-0614 Phone: 480-496-5000 Table www.alsic.com www.cmcinterconnect.com 33 FLOMERICS, INC. Ceramics Process Systems (CPS) is the World Leader Event Platinum Sponsor and Presenter, CMC Interconnect in providing AlSiC thermal management materials and Technologies provides outsourced technical services to the electronic packaging designs and products for the microelectronics industry. CMC specializes in analytical testing, 4699 Old Ironsides Drive, Suite #390 electronics and power electronics industries. CPS uses failure analysis, reliability testing, thermal / electrical char- Santa Clara, CA 95054 its net-shape fabrication process for high volume manu- acterization and technical consulting. CMC’s testing capa- Phone: 408-562-9100 facturing of AlSiC components including flip-chip lids bilities include: SEM/EDS, Thermal / Electrical measure- www.flomerics.com (microprocessor, heatsinks, flip-chip, DSP application), ments, Mechanical Testing, and Thermal / Environmental Flomerics provides simulation software tools and services power applications (IGBT baseplate, power substrates), Stress evaluations. CMC experience includes organic, plas- – primarily to the electronics industry – to improve and optoelectronic and microwave packaging. Current produc- tic, ceramic and metal packaging and interconnection. accelerate the design process. Their software enables tion quantities can be as few as tens of pieces to tens of Table engineers to predict the thermal or EMC behavior of thousands daily. 19 DIEHARD ENGINEERING, a proposed design prior to the build and test phase. Table INC. Customers achieve significant cost savings through using 20 CHAUN CHOUNG their software, as well as reducing time-to-market. Their TECHNOLOGY CORP. 7070-D Commerce Circle client list includes virtually all of the major electronics Pleasanton, CA 94588 companies in the world. c/o RGK Technical Sales Phone: 925-734-0540 605 Spar Drive Table [email protected] FRT OF AMERICA, LLC Redwood City, CA 94065 32 Phone: 408-396-4745 Diehard Engineering provides tooling and fixturing for your production or developmental needs. They design www.ccic.com.tw and build items ranging from specialized fixtures all the 51 E. Campbell Avenue With over 30 years of experience, Chaun Choung way to tooling for your production requirements. Diehard Campbell, CA 95008 Technology Corp. (CCI) is the leader in Heat Sink and Heat provides molds, dies, fixtures, spare part support etc. Let Phone: 408-376-5025 Pipe manufacturing. They work in Aluminum and Copper Diehard help you meet your production goals. www.frtofamerica.com products. CCI won Intel’s Preferred Quality Supplier (PQS) Table FRT of America, LLC is recognized as a valued partner for Award in 2003. They also extrude front panels and stamp 5 ELECTRONIC TREND non-contact, optical metrology systems and solutions. FRT extremely thin covers for portable electronic devices. PUBLICATIONS of America serves you, their customers, by providing, high quality measuring instruments and services, which fulfill 1975 Hamilton Avenue, Suite 6 your research, Q.A., inspection and verification needs. San Jose, CA 95125 Delivering increased manufacturing yield, enhanced pro- Phone: 408-369-7000 ductivity, improved quality and product performance, www.electronictrendpubs.com because that’s what it’s about at the end of the day. ® ® Electronic Trend Publications (ETP) publishes off-the-shelf FRT MicroProf and MicroGlider surface topography, market research reports in key areas of the electronics profile, roughness and micro-dimensioning measuring Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Table systems with non-contact optical sensors, film thickness 18 IPAC – TWIN ADVANCE • Lower Z-Axis CTE sensors, and AFM measuring heads. 2D and 3D surface • Reflow Capable at 300˚C and above data evaluated using powerful FRT Mark III software. • Halogen Free Version Available FRT – The Art of Metrology™ 2221 Old Oakland Road • Applications: CSP, BGA, MCM, Flip-chip San Jose, CA 95131 Table Table Phone: 408-321-3600 27 GARTNER DATAQUEST 23 ORTHODYNE ELECTRONICS www.ipac.com IPAC-Twin Advance provides IC packaging and SMT 251 River Oaks Parkway 16700 Red Hill Avenue assembly to the semiconductor and electronics industries. San Jose, CA 95134 Irvine, CA 92606 The company’s manufacturing services are carried out in Phone: 408-468-8000 Phone: 949-660-0440 Silicon Valley and in Malaysia where a wide range of offer- www.gartner.com ings are combined with superior service and fast delivery. www.orthodyne.com Gartner Dataquest offers in-depth analysis, forecast and IPAC-Twin Advance brings a number of benefits to the Orthodyne Electronics manufactures ultrasonic wire bond- market share data on the whole semiconductor industry. semiconductor and electronics industries, including: ers for semiconductor and microelectronic applications. For example, they follow manufacturing from wafer OE produces a variety of high production bonders that foundry, MEMS, packaging/assembly/test to PCBA and • Volume production in domestic and overseas facilities bond aluminum wire sizes from 1.0-20 mil (25-500 EMS focusing on all players from materials suppliers to • Package selection - QFP, QFN, BGA micron) with large wire or small wire options. Recognized services providers. Gartner also provides the most compre- • Advanced technologies - CSP, Flip-Chip, WLP, SiP as an industry leader, Orthodyne has been awarded for hensive view of semiconductor device consumption and • Modules combining IC packaging and SMT assembly customer satisfaction for 13 years in a row. electronic equipment production. • Package & substrate design services Table • “Hot Lot” services - quick as one-day Table PAC TECH USA PACKAGING • Superior customer service 10 11 HARVARD THERMAL INC. TECHNOLOGIES INC. Table 31 MARATHON PRODUCTS, 328 Martin Avenue 249 Ayer Road, Suite 102 INC. Santa Clara, CA 95050 Harvard, MA 01451 Phone: 408-588-1925 Phone: 978-772-3800 1970 Broadway, Suite 625 www.pactech-usa.com www.harvardthermal.com Oakland, CA 94612 Phone: 510-834-9240 Pac Tech USA designs and builds state-of-the-art wafer Harvard Thermal develops board and package level www.marathonproducts.com bumping and assembly equipment for flip-chip and chip- thermal design tools. Package Thermal Designer has scale packaging. Pac Tech is the worldwide leader in laser direct interfaces with Cadence APD and Synopsys Encore. Marathon Products, Inc., headquartered in Oakland, reflow and heating technology as implemented in systems Nearly any package style can be simulated quickly, accu- California, is a global supplier of investigative temperature for solder jetting (SB2) and flip-chip attach (LAPLACE) rately and easily. Have confidence in your package design recording devices used to validate shipment of epox- for advanced packaging applications like HGA assembly, by seamlessly including thermal simulation during the ies, laminates and other critical materials used in the MEMS and optoelectronic packaging, LCD driver assem- design phase. manufacture of integrated circuits. Temperature operating bly, etc. Pac Tech’s facility in Santa Clara, California offers ranges: -80˚ C to 72˚ C. Their devices are programmed in contract wafer bumping services using low cost electroless Table English, Japanese, French, German, Spanish, Mandarin, HONEYWELL ELECTRONIC Ni/Au under-bump metallization, solder stencil printing 34 and Portuguese to support globalization. Oftentimes the and solder ball placement for quick-turn and mass-produc- MATERIALS C\TEMP is the last QC gate for product validation prior to tion. Pac Tech USA also provides product demonstrations, 1349 Moffett Park Drive manufacture and acceptance of critically sensitive materi- training and sales support. als. Don’t Ship Without Us. Sunnyvale, CA 94089 Table Phone: 408-962-2000 Table 12 PALOMAR TECHNOLOGIES www.electronicmaterials.com 26 MITSUI CHEMICALS AMERICA, INC. Honeywell Electronic Materials, a unit of Honeywell 2230 Oak Ridge Way Specialty Materials, is a leading material supplier to the 2099 Gateway Place, Suite 260 Vista, CA 92081 semiconductor industry developing and manufacturing San Jose, CA 95070 Phone: 760-931-3600 a broad line of products utilized in the production of Phone: 408-487-2893 www.palomartechnologies.com integrated circuits. Providing solutions for applications www.mitsuichem.com utilizing subtractive or damascene processes, Honeywell Palomar Technologies is a leading supplier of automated offers Spin-on glasses, advanced dielectrics, application Mitsui Chemicals, Inc. manufactures substrates based on high-precision assembly systems that increase yield and specific electronic chemicals, PVD targets, thermocouples its BN300 high heat resistant proprietary material. BN300 lower costs for manufacturers of optoelectronic, RF, and and packaging solutions for thermal management and is a warpage resistant and resin-based glass fiber reinforced microelectronic packages in the photonic, wireless, micro- electrical interconnect as well as sapphire substrates and laminate with: wave, automotive, aerospace, medical, and life sciences custom sapphire fabrications for the optoelectronics • Tg 300˚C industries. industry. • High Elasticity & Barcol Hardness

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Table Table 9 SEELIN ASSOCIATES 24 SHINKO ELECTRIC AMERICA many leading suppliers with focus on Semiconductor Manufacturing. Among them are: • Achilles Corp. – Wafer Shipping Containers & Thermal 85 Great Oaks Blvd. 2880 Zanker Road #204 Adhesive Tapes San Jose, CA 95119 San Jose, CA 95209 • JDS Uniphase Corp – Laser Marking Systems Phone: 408-578-3495 Phone: 408-232-0499 • Nippon Steel Chemical Corp – Die Attach Films & PD www.seelinassociates.com www.shinko.com Dielectric Materials • Shibuya Kogyo - Flip Chip Bonders & Solder Ball Seelin Associates is an affiliate of Seelink Technology, Shinko Electric Industries Co., Ltd. is a global supplier of Placement Systems laboratories and IR Imaging specialists, and is an autho- electronic device packaging materials and IC assembly. • Shinon Corp, - Shipping Trays, Tape & Reel and Anti- rized sales representatives for Micred (www.micred.com). For 50 years Shinko has been a leader in the development Static Products Consultants in Packaging, Engineering and Thermal on IC packaging technology such as Organic Laminate • Tru-Si Technologies – Wafer Thinning & NoTouch Management. Offers pioneering “T3ster“ equipment and Substrates, Leadframes, Tape Substrates and Glass to Metal Wafer Handling systems software using Advanced Transient Measurement tech- Seal Packages. • Yamada Corp – Molding, Singulation and Test Hanlders nology, the 21st Century tool for high-precision pack- Table • Yasunaga Corp – Die, Package & Bump Inspection age-structure and die-attach analysis. Seelin also offers SONOSCAN, INC. Systems assorted programmable scalable array thermal test chips. 15 • Tamura – Solder Paste & Flux Applications in R&D, heat-sink characterization, failure • Nippon Micrometal Corp – Solder Spheres & Gold analysis and chip design; opto-ICs, Modules, ASIC’s, high 2149 E. Pratt Blvd. Wires or low power devices. Elk Grove Village, IL 60007 Phone: 847-437-6400 Table Table THERMALWORKS 16 SENSARRAY www.sonoscan.com 7 CORPORATION Founded in 1973 and headquartered in Chicago IL, ® 9042 Garfield Avenue #212 47451 Fremont Blvd. Sonoscan , Inc. is a worldwide leader and innovator in Huntington Beach, CA 92646 Fremont, CA 94538 Acoustic Micro Imaging (AMI) technology. Sonoscan offers Phone: 714-960-5152 Phone: 510-360-5600 acoustic microscopes and contract services for nondestruc- tive inspection of products for hidden internal defects www.thermalworks.com www.sensarray.com such as poor bonding, delaminations between layers, ThermalWorks is an Intellectual Property Company SensArray is an innovative provider of process optimiza- cracks and voids. focused on providing Board Level Solutions for today’s tion tools for semiconductor and flat panel fabrication. Table critical Thermal, CTE, Rigidity & Weight problems. SensArray solutions for dynamic and static optimization SPECTRA-MAT, INC. ThermalWorks licenses the STABLCOR Technology to PCB allow manufacturers to manage equipment and pro- 2 and substrates manufacturers. cessing environments, and provide increased control of critical parameters during manufacturing. By optimizing 100 Westgate Drive fabrication processes, SensArray products help to make Watsonville, CA 95076 processes more reliable, providing for improved output, Phone: 831-722-4116 and the more economic manufacture of high performance www.spectramat.com products. Based in Fremont, California, SensArray is pri- vately held and has offices in Japan, Taiwan, and Korea, Spectra-Mat, Inc. is a materials and component manu- with international representatives in Asia and Europe. facturer specializing in refractory metals and composites. SensArray is ISO 9001-2000 certified. These include tungsten-copper, moly-copper, tungsten alloys, and porous tungsten and molybdenum. They Table provide thermal management solutions using our W/Cu, 4 SHIN-ETSU MICROSI, INC. Mo/Cu, and W heavy alloys, which are custom tailored to match their customers’ conductivity and expansion 10028 S. 51st Street demands. Phoenix, AZ 85044 Table Phone: 480-893-8898 1 SUNSIL INC. www.microsi.com Shin-Etsu MicroSi, Inc., together with their parent com- P.O. Box 220 pany Shin-Etsu Chemical Co., Ltd., represent world-class Alamo, CA 94507 leadership in the development and manufacture of spe- Phone: 925-648-7779 cialty materials for the semiconductor industries. Their www.sunsil.com product lines are specifically designed to address today’s photolithography, packaging and flexible printed circuit SunSil Inc., a global technical sales & marketing organiza- requirements. tion, is headquartered in Silicon Valley. SunSil represents

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BIOGRAPHIES

SYMPOSIUM TECHNICAL CHAIRMAN

Dr. Ananth Naman is currently the R&D Director for the interconnect packaging solutions group of Honeywell Electronic Materials. He received his B.S. (1990), M.S. (1994), and Ph.D. (1997) degrees from the University of Florida in Materials Science and Engineering. Prior to this current assignment, Ananth lead a process development and integration team at Honeywell focusing on low k dielectrics used in back end of line interconnect applications. Before joining Honeywell, Ananth was a staff researcher at Seagate Technology, Recording Head Organization, focused on magnetic thin film head process development.

SYMPOSIUM GENERAL CHAIRMAN

Nick Leonardi is Vice President of Sales and Marketing at CMC Interconnect Technologies, headquartered at the ASU Research Park in Tempe, Arizona. Prior to CMC, Nick was most recently Director of Sales and Marketing for Dynaloy. His prior sales and marketing positions with companies such as Shinko and Alcoa followed years of packaging development and applications engineering with companies such as AMD, LSI Logic and General Electric. Nick has a B.S. in Materials Engineering with current activities including participation on MEPTEC Advisory Board and Co- chairing Phoenix Chapter meetings. Affiliations include The American Ceramic Society, IMAPS, SMTA and CPMT groups.

KEYNOTE SPEAKER

Dr. Greg Chrysler is a Principal Engineer and Thermal Team Leader in the Intel Materials Tech- nology Operation organization at Chandler, Arizona. His team is responsible for identifying strate- gic material requirements for future generations of microprocessor packages and systems, thermal path finding, and new supplier and technology identification. Dr. Chrysler received his Ph.D. in Mechanical Engineering, specializing in Thermal Sciences, from the University of Minnesota in 1984. He has co-authored several technical papers, was an Associate Editor of the ASME Journal of Heat Transfer, and holds over 40 patents in high-density packaging for electronics.

(continued)

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SESSION LEADERS

Joel Camarda is a semiconductor industry veteran with 30 years experience in engineering, operations, and business unit management, including the fields of wafer-fab, assembly-packaging, and test. He has held executive positions with National Semiconductor, Rockwell Semiconductor, Cypress Semiconductor, IPAC, and Kulicke & Soffa. He has recently founded his own consulting company. Joel has a BSAE/ME degree from New York University and has completed post-graduate studies in semiconductor technology and business management. He has been a guest lecturer at San Jose State University, and is a member of the Advisory Board of MEPTEC.

Dr. Gerald (Skip) Fehr is presently a Semiconductor Packaging Consultant. He worked in the Packaging and Assembly Industry at IPAC (co-founder), LSI Logic, Burroughs, Fairchild, Intel and Texas Instruments have over 35 years of experience. He earned his Ph.D. in Material Science and Engineering from Iowa State University in 1966. He has written numerous articles and holds several patents. He is presently on the Iowa State University Material Science and Engineering Department Advisory Board. Has also serves on various industry committees and is a member of the MEPTEC Advisory Board.

Dr. Julia Goldstein has been Technical Editor of Advanced Packaging Magazine since 2001 and is also a contributing editor to SMT Magazine. Since 1996 she has been self-employed as a technical consultant for both start-ups and large companies in areas ranging from flip chip bumping to liquid crystal microdisplays to thin film coatings. Prior to that Julia was a Process Development Engineer at nCHIP, where she developed and implemented a flip chip process for multichip modules. She received a BS in Engineering from Harvey Mudd College, an MS in Materials Science from Stanford University and a PhD in Materials Science from UC Berkeley. Julia is the author of 12 technical articles and is a member of IMAPS and MEPTEC.

ADVISORY COMMITTEE

Jeffrey C. Demmin is currently the director of product marketing at Tessera Technologies, a provider of intellectual property and services to the semiconductor packaging industry. Jeff recently joined Tessera after serving as the editor-in-chief of Advanced Packaging magazine. Prior to that, he was a senior technical editor with Solid State Technology magazine. He holds a bachelor’s degree in physics from Princeton University, a master’s degree in materials science and engineering from Stanford University, and four patents in package design. Jeff is also a member of the MEPTEC Advisory Board.

Phil Marcoux is the Executive Director of MEPTEC. Currently Phil is involved in business development at SensArray. He is the past CEO of ChipScale and AWI, past VP of Sales and Marketing for Tru-Si, past VP of Business Development for OSE-USA, and served in IC engineering development roles with Analog Devices and Signetics. Phil is one of the pioneers of chip scale and wafer level semiconductor packaging. Phil has a BSEE from the University of Florida, and an MSEM (MSEE/ MBA equivalent) from the University of Santa Clara where he also served as an Associate Professor for the Graduate School of Engineering.

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PRESENTERS

Dr. David Copeland is Senior Thermal Engineer in Packaging Technology Research at Fujitsu Laboratories of America. His twenty years of experience in electronics cooling includes research and development at IBM, Hitachi and Fujitsu, teaching and research at Tokyo Institute of Tech- nology and heatsink development and design at Intricast, Sumitomo and Showa Aluminum. David received the BS from Massachusetts Institute of Technology, MS from Stanford University and DrEng from Tokyo Institute of Technology, all in Mechanical Engineering. He is a member of ASME, IEEE and IMAPS, and has participated in their conferences on electronics cooling as speaker, session chair and program committee member.

Dr. Roger Emigh joined STATS ChipPac in April 2000 and currently manages Package Character- ization groups in US (Arizona), Singapore, and Korea that are responsible for Thermal, Mechanical, and Electrical simulation and testing of semiconductor packages in support of array and leaded assembly business. Emigh was previously with Johnson Matthey Electronics for 7 years in various roles within R&D, technology development, marketing, and management. Graduate degrees (MS- 1985, Ph.D- 1990) in Materials Science and Engineering from the University of California, Berkeley; Undergraduate in Physical Metallurgy (BS-1983) from Washington State University.

Dr. Jesse Galloway is a Senior Manager at Amkor Technology Inc. located in Chandler, Arizona. His responsibilities include mechanical and thermal performance analysis of electronic packages including product development of advanced thermal concepts. He has over 14 years of experience in the electronic packaging industry. Jesse holds a Ph.D. in Mechanical Engineering from Purdue University.

Dr. Ken Goodson is an Associate Professor of Mechanical Engineering at Stanford University. He received the Ph.D. in Mechanical Engineering from MIT in 1993 and worked with the Materials Group at Daimler-Benz AG on power transistor design. He has been with Stanford since 1994, where his research group now includes eighteen students and research associates. His group has authored more than one hundred journal and conference papers and five book chapters and has been recognized through the ONR Young Investigator Award, the NSF CAREER Award, the Journal of Heat Transfer Outstanding Reviewer Award (1999), a JSPS Visiting Professorship at the Tokyo Institute of Technology (1996), as well as Best Paper Awards at SEMI-THERM (2001), the Multilevel Interconnect Symposium (1998), and SRC TECHCON (1998). Goodson is a co-founder and former CTO of Cooligy, which develops electro-osmotic microchannel cooling technology for comput- ers.

Dr. Jonathan Harris earned his doctorate degree from Brown University in Physics with focus on semiconductor properties, authored 50+ publications and book chapters and has 20 U.S. Patents. After graduating, Dr. Harris worked for BP America, Carborundum, lead a joint Carborudum/IBM technology program and became President of CMC Wireless Components, a manufacturer of Aluminum Nitride RF packaging. Dr. Harris led the recent CMC transition into CMC Interconnect Technologies, an industry provider of key analytical services, reliability testing and also electrical and thermal properties measurement. (continued)

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Dr. Cameron T. Murray is currently a Senior Product Development Specialist and Thermal Appli- cations Team Leader within the Conductive Adhesives Program of 3M’s EMMD. He is involved in new-product and applications development in the area of thermal interface materials. Dr. Murray holds a B.A. from Beloit College (1980) and an M.A. and Ph.D in Polymer Science and Engineering from the University of Massachusetts (1985).

Chandrakant Patel is a distinguished technologist responsible for strategically engaging in thermo-mechanical research for future microprocessors, servers and data centers at Hewlett- Packard Laboratories. He established the thermal technology research program at Hewlett Packard Laboratories and with partners in the product R&D groups, he started a virtual thermal community – the vibrant HP Cool team. Prior to joining HP Labs, Chandrakant worked on design of rigid disc drives at HP, Personal Computer Group and at Memorex/Unisys Large Disc Drive Division. Chandrakant has been teaching CAD as an adjunct faculty member at Chabot College in Hayward, California since 1990. He also teaches a three-day course in thermal management of electronics and systems at the University of California at Berkeley Extension. He has authored several refereed journal and conference papers in the area of electronics cooling and has been granted 36 U.S. patents, several pending. He is a Senior Member of IEEE and an Associate Editor for IEEE Transactions on Components and Packaging Technologies. Chandrakant received his BSME from University of California, Berkeley, MSME from San Jose State University and is a registered professional mechanical engineer in the state of California.

Robert Raos is the Mechanical Engineering Manager at the Solectron Technical Center in Milpitas, CA. For the last 12 years, he has led the Bay Area based product design team whose function is to provide design services to Solectron’s OEM customers in the electronics industries, primarily in Telecommunication, Networking, Computer, and Consumer Electronics. Solectron’s customer portfolio include the well known names such as Cisco, Intel, HP, IBM, Oakley, as well as many start ups. Prior to joining Solectron, Robert worked for several Silicon Valley firms managing cross-func- tional product development teams in military and consumer electronics. He was also the head of his own consulting firm for 6 years specializing in design and build of custom factory automation equipment. Robert received his BSME and MSME degrees from Cleveland State University, with emphasis on machine design and heat transfer.

Chris Schaffer holds both a Masters degree in Mechanical Engineering and Masters degree in Materials Science. He has over 12 years of industry experience in advanced materials and electronics packaging R&D. He has worked at Hughes Space and Communications performing work on advanced microwave electronics packaging and also led a DARPA funded investigation of CVD diamond substrates for satellite electronics applications. He currently holds a position with International Rectifier as Engineering Manager for the iPowir Design Center, which designs integrated system-in-a-package power conversion modules for high volume applications. He holds over 10 patents and has multiple publications.

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

David Stiver received a BS in Mechanical Engineering from the University of Nevada Reno in 1993. He then went on to earn a MS in Fluid Mechanics and Heat Transfer at Arizona State University in 1995. His MS focused on experimental measurements of lift and drag in stratified flow regimes. Dave has worked in the areas of heat & mass transfer and fluid mechanics for the last nine years doing R&D, design, consulting, support, and training. His work in the field of electronics cooling has spanned detailed chip-level design up through data-center management issues. For the past several years year, he has been the supervisor for the consulting engineering group at Flomerics in Santa Clara, CA. His most recent work dealing with design optimization was recently published in a paper for SEMITHERM 2004 entitled “Thermal Optimization of Electronic Systems Using Design of Experiments Based on Numerical Inputs.”

Marlin Vogel is a staff level thermal engineer at Sun Microsystems. He obtained his Mechanical Engineering Degree in 1979 and his MS in 1984 from the University of Wisconsin-Milwaukee. As a member of General Dynamic’s Thermodynamics Analysis group he co-lead the effort for developing the thermal design for a stealth aircraft engine exhaust system. Since joining Sun Microsystems in 1991, he has focused his efforts towards researching and developing thermal technologies for CPU server applications, and has published a number of electronic cooling papers. He is currently leading the CPU heat sink development for Sun’s next generation high-end servers.

Jim Walker is Vice President of Semiconductor Manufacturing and Emerging Technologies at Gartner-Dataquest. Mr. Walker has been heavily involved in the science of semiconductor packaging since graduating from California State Polytechnic University. At Dexter Electronic Materials and E.I. duPont, he performed research, development, quality assurance and technical service utilizing polymeric materials for adhesive, composite, aerospace, electronic and semiconductor applications. From 1982 to 1989, Jim performed various roles at National Semiconductor, including serving as Surface Mount Packaging Marketing Manager, where he helped coordinate the packaging direction of the corporation and licensed, TAB and TapePak technology. Upon his departure from National Semi, Mr. Walker co-founded Hana-USA, a contract packaging foundry, acting as Vice-President of Marketing. He holds memberships in the Society for the Advancement of Materials and Process Engineering (SAMPE), MicroElectronic Packaging and Test Engineering Council (MEPTEC), and the American Society for Quality Control (ASQC).

Dr. Joseph Walters received his Ph.D. in Physics in 1990 from Portland State University where he focused on phase transitions in liquid helium. He then moved to Annapolis, Maryland to work for the Navy’s David Taylor Research Center for 10 years in applied research and development. Eight of the 10 years with the Navy were spent developing 4 K coolers and thermal interfaces as well as superconductive wires and magnets. The remaining roughly 2 years with the Navy was occupied in cooling 1500W power electronic modules for the Navy’s all electric ship concept. Subsequently, Joe moved back to the west coast to work for Intel in Mobile Products for about one year before arriving at nVidia where he has worked for over 3.5 years and is currently the manager of thermal engineering.

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KEYNOTE PRESENTATION Thermal Management Challenges for Microprocessors

Presented by Dr. Greg Chrysler Principal Engineer and Thermal Team Leader in the Intel Materials Technology Operation Intel Corporation

With transistor counts continuing to increase exponentially, as dictated by Moore’s Law, new techniques are being implemented to deal with power. Adherence to the law has seen ever increasing growth in the thermal power dissipation requirements of processors, but power alone is not the sole challenge in thermal packaging and management. Total box sizes are shrinking and acoustic demands are becoming more stringent. At the die level the concentra- tion of the power into localized high heat flux regions (hot spots) has forced the development of new and highly efficient packages. The higher total power dissipation requirements have forced the development of heat sink technology to handle the power and fit within the shrinking keep-in requirements of system chassis. The move to multi-core processors has been hailed as means of continuing with the premise established by Moore, but without the continued growth in thermal power. What might the future hold? We will look at the past constraints and drivers, as well as possible future package and system level thermal management options.

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SESSION ONE Technology and Market Overview

Session Chair: Dr. Julia Goldstein Advanced Packaging Magazine

In order to address thermal management challenges and come up with solutions, it is first important to understand the fundamentals of how and why various semiconductor devices generate heat, as well as how heat is transferred from the chip to the package to the system. An academic perspective on this topic will be presented. Chips have been generating heat for decades, but reductions in size and increases in functionality are causing thermal management issues to come to the forefront. Expert analysis from a leading forecast firm will describe the variety of products for which thermal management is critical and present industry forecasts. Applicable technology roadmaps showing what the industry can expect in the near future will also be presented.

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Advanced Thermal Management Technologies for Electronic Systems

Presented by Professor Kenneth Goodson Associate Professor of Mechanical Engineering Stanford University

The computer industry faces large challenges for thermal management of its products, and this is spurring innovation in research and development. This presentation reviews the mechanisms of heat generation and of heat transfer in electronic systems, which span length- scales from several nanometers (within transistors) to tens of centimeters in heat sinks. Special emphasis will be given to the increasing importance of on-chip thermal challenges, including interconnect and transistor self heating and millimeter-scale hotspots within the microprocessor. Several advanced cooling technologies will be detailed, including microfluidic heat sinks, solid-state and vapor compression refrigeration systems, as well as advanced cooling materials containing CVD diamond and carbon nanotubes. The presentation will conclude with an overview of electronics cooling research at Stanford, which features strong linkages to major semiconductor companies and groundbreaking research on a variety of advanced thermal management technologies.

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The Heat is On: Thermal Packaging – Markets and Opportunities

Presented by Jim Walker, VP Research Semiconductor Manufacturing and Emerging Technologies Gartner Dataquest

The challenges posed by high-heat density problems, increasing performance and reliability constraints make thermal packaging a key in the development of future microelectronic systems. The SIA, ITRS and NEMI roadmaps imply that improvements in semiconductor technology will go unabated to meet Moore’s Law for at least the next decade. Exploiting this potential of the advances in semiconductors, and with it increased chip size, switching speed, and transistor density, will necessitate significant improvements in thermal packaging technology. As such, packaging is evolving from an IC technology enabler to a primary electronic product/system differentiator. This will create many new applications and opportunities for thermal packaging technologies and markets.

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Presentation of the NEMI Thermal Working Group Roadmap (2004 issue)

Presented by Cameron T. Murray Senior Product Development Specialist / NEMI TWG Chair 3M Electronics Markets Materials Division

The International Electronics Manufacturing Initiative’s (iNEMI) mission is to assure leadership of the global electronics manufacturing supply chain. Based in Herndon, Va., the industry-led consortium is made up of approximately 70 manufacturers, suppliers, industry associations and consortia, government agencies and universities. iNEMI roadmaps the needs of the electronics industry, identifies gaps in the technology infrastructure, establishes imple- mentation projects to eliminate these gaps (both business and technical), and stimulates standards activities to speed the introduction of new technologies. The consortium also works with government, universities and other funding agencies to set priorities for future industry needs and R&D initiatives. This presentation will cover the 2004 Thermal Technical Working Group (TWG) roadmap. The presentation will cover the roadmapping process and data used to write the document. The final document includes estimates of the thermal trends and solution needs in several industries.

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SESSION TWO Device Level Challenges and Solutions

Session Chair: Nicholas Leonardi, VP of Sales & Marketing CMC Interconnect Technologies

Microprocessors and graphics processors are at the top of the list of heat-generating devices as increasing functionality is being built into these chips. Speakers from a major semiconductor manufacturer and a major graphics chip manufacturer will discuss the issues they are facing and describe how changes in chip design can make heat dissipation less of a problem down the supply chain. Heat dissipation has long been critical for power devices, and some solutions used in the power industry may be considered for other types of chips. A manufacturer of power discrete devices will describe challenges in this category as operating temperatures ramp upward.

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THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Efficient Thermal Management Using Advanced Semiconductor Packaging Techniques

Presented by Chris Schaffer, Engineering Manager International Rectifier

The increase in clock speed of today’s microprocessors has necessitated the use of forced convection cooling to remove the heat away from both the processor and the motherboard. Based on current computing roadmaps, these trends will soon push the DC-DC converter to power levels that will also require forced convection cooling to achieve the required performance. In the power semiconductor industry the role of the package has evolved from just protecting the semiconductor to becoming a critical element for transferring heat away from the junction. This presentation will discuss various discrete packaging options for improving heat transfer from DC-DC converters, addressing critical design considerations in today’s computing applications. Finally, this presentation will discuss a unique module solution for higher power (> 1kW) automotive applications. This is based on a patented “Die on Leadframe” technology. The solution offers a high level of integration, efficient thermal performance and very low package electrical resistance by eliminating the traditional module substrate and mounting the die directly on a leadframe.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Engineering Graphics Processors Thermal Solutions

Presented by Joseph Walters, Thermal Engineering Manager nVidia Corporation

Graphics processor units (GPU’s) can have greater numbers of transistors than CPU’s, power dissipation approaching that of CPU’s, and have more restrictive physical and product constraints on how they can be cooled. Not withstanding this constrained design environment, the GPU power continues to increase by significant amounts every design generation. Over the last several generations of chips throughout the graphics industry, the GPU power has approximately doubled every year and the trend of increasing powers is continuing because the graphics experience has not yet reached the “good enough” state. There is still a strong demand for an improved graphics experience that attains a much higher degree than present of image quality and realism. This presentation will provide an introduction to the graphics industry and discuss the thermal solution design space for graphics add in boards.

Presentation not available at time of printing.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

64-bit Server Cooling Requirements

Presented by David Copeland, Packaging Technology Research Fujitsu Laboratories of America

Cooling of 64-bit servers is constrained by increasing power and decreasing space. Power dissipation of high performance processors is predicted to increase linearly over the next decade. Thermal interface, heat spreading and heatsink-to-ambient convection each provide similar resistances in the thermal path from chip to ambient. One departure from previous practice will be the increasing sensitivity of power dissipation with junction temperature. As leakage current, previously a small contribution to total power dissipation, becomes significant, chip power dissipation will become a stronger function of temperature. Expenditure of energy on enhanced cooling, such as pumped water or vapor-cycle refrigeration, may result in reduced total system power. Recent advances in thermoelectrics could change many assumptions in refrigeration, enabling distributed and localized refrigeration at the processor level with minimum space requirements. Historical trends from several 64-bit chip series and the ITRS are examined.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

SESSION THREE Modeling, Characterization and Measurements

Session Chair: Dr. Gerald (Skip) Fehr Industry Consultant

Software capability to model and simulate the thermal performance of products has become common throughout the industry, and a major software company will describe standardization efforts to improve efficiency and communication throughout the supply chain. A subcontract manufacturer will discuss approaches for using simulation as a tool for selecting the appropriate package. Novel high thermal performance materials are critical in many of today’s applications. Techniques for evaluating the thermal performance of materials and interfaces will be reviewed.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Material and Interfacial Impact on Package Thermal Performance

Presented by Dr. Jonathan Harris, President & CEO CMC Interconnect Technologies

A wide range of emerging electronic applications put severe thermal management demands on the packaging system. These include RF power devices for cellular infrastructure, high current motor controllers for automotive and appliance applications, and devices used in microwave communications. In order to meet the thermal demands of these devices, new approaches to packaging must be adopted, and novel high thermal demand materials are a critical part of this packaging approach. This presentation will discuss a technique for evaluating the thermal performance of materials and interfaces. Thermal performance, microstructure, and key packaging related properties will be covered. The role that various materials may play in future packaging solutions will be discussed.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Emerging Standards in Thermal Simulation

Presented by David Stiver, Supervisor, Consulting Engineering Group Flomerics Inc.

Thermal design challenges are growing rapidly with every product cycle. Since 1999: - System thermal density for networking systems has increased 550 percent to 0.4 W/in3 - Processor IC thermal densities have increased 270 percent 40 W/in2 - PCB thermal density has increased 200 percent to 2.5 W/in2 - Clock speeds for computing systems have increased 750 percent to 3.5 GHz Increasingly, it is no longer acceptable to view thermal design as an afterthought; rather it needs to be built into the design process at an early stage. Due to the lack of the availability of prototypes for testing at earlier stages of the design cycle, simulation plays a critical role. However, simulation comes with its own challenges, one of them being the intrinsic multi- scale nature of the problem. Recent work in industry standardization has attempted to tackle this problem such that accurate and reliable thermal design can be done with maximum computational efficiency and minimum barriers of communication between the various stages of the design chain. The standardization effort includes developing a common data model for exchanging vendor-neutral data as well as numerical techniques to generate accurate and efficient models that also protect proprietary part data, and thus allowing the models to be both portable and predictive.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Thermal Characterization and Modeling: A Key Part of the Total Packaging Solution

Presented by Dr. Roger Emigh, Director, WW Package Characterization STATS ChipPAC

Removing heat from semiconductor devices continues to play a key role in the advancement of new electronic systems. An effective thermal solution can be developed for just about any situation but the challenge is to consistently find the lowest cost and highest reliability solution, at the package and system level. Thermal simulation techniques play a critical role across the entire product development cycle, starting with packaging selection, including materials and design options. Initial work towards an effective package solution is best addressed with detailed thermal models that incorporate geometric structures that closely match the real parts. Some modifi- cations and “blurring” of structures and/or materials is possible and in many cases desirable, because it allows the simulation work to be done before the full design is completed. This allows early decision making on package types when changes are easily made. The effective use of early detailed models requires careful attention to the critical thermal paths within the package, close correlation with thermal testing data, and it also requires some understanding of what the end system is going to look like. Once the packaging solution, materials, and design are selected, the thermal work moves to the system level. At this point, it is advantageous to move away from a detailed model of the package and to a compact model. The use of Delphi compact models has become increasingly common for system level thermal work. The starting point for these is a detailed package model and the result is a boundary condition independent (BCI) compact model that will behave in a predictable and accurate manner regardless of what system it is placed into. By avoiding the use of complex detailed models for system level work, computational resources can be more effectively used to simulate thermal behavior in the system (airflow, fans, other packages or heat sources, inlet and outlet vents, etc.).

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

SESSION FOUR System Level Challenges and Solutions

Session Chair: Joel Camarda, President Camarda Associates

Thermal management challenges cannot be solved by concentrating only on the device and the package. System-level solutions are necessary, whether the “system” is a single board (SiP or PCB), a cell phone, a server or a data center. Speakers from a major subcontract assembler and an EMS provider will discuss how heat dissipation is currently addressed in their product class and present possibilities for future improvements as the challenges become greater in the next generation of electronic products, including datacom, desktop and wireless applications. A large OEM will address cooling system design for a data center by considering the entire path from the chip to the cooling tower.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Thermal Design Considerations for System in Package

Presented by Jesse Galloway Ph.D., Senior Manager, Thermal Characterization Amkor Technology

System integration needs are driving package designs into multi-chip modules and stack die configurations as a means of increasing board level packaging density. High speed performance requirements necessitate close proximity of memory die to processors. Power dissipations levels continue to rise with greater clock speed and number of gates. Microprocessors often operate at a higher die level temperature than do memory die. These are just a few examples to illustrate that temperature and power constraints run contrary to electrical performance and design constraints. It is easy to understand why thermal management continues to become a limitation for meeting product release schedules.

This presentation provides a survey of various systems-in-package technologies, design alternatives, material selection and thermal performance evaluation. Particular emphasis is placed on understanding thermal design options available for datacom, wireless and desktop applications.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

System Cooling of Outdoor Wi-Fi Antenna

Presented by Robert Raos, Mechanical Engineering Manager Solectron

Cooling outdoor Wi-Fi antennas electronic enclosures is challenging because the enclosure must be completely sealed from the harsh environment, while the combined solar and inter- nally generated heat load can be in excess of 400 Watts. Market driven constraints preclude the use of cooling methods that add significant weight or cost to the product. This presentation is a case study of an outdoor Wi-Fi antenna cooling system design that meets all cost, weight, and thermal performance requirements and constraints. It summarizes the thermal cooling design requirements, alternative approaches considered, CFD simulation of internal air temperatures at various locations, and air temperature test results. Comparison between predicted and measured air temperatures for various locations within the enclosure is presented.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

THERMAL MANAGEMENT ISSUES IN SEMICONDUCTOR PACKAGING

Low Profile Heat Sink Cooling Technologies for Next Generation CPU Thermal Designs

Presented by Marlin Vogel, Staff Level Thermal Engineer Sun Microsystems

The electronic industry requires increased forced-air cooling limits in order to adequately cool high-end server CPUs. Improving the air-cooled heat sink thermal performance is one of the critical areas for increasing the overall air-cooling limit. One of the challenging aspects for improving the heat sink performance is the effective utilization of relatively large air-cooled fin surface areas when heat is being transferred from a relatively small heat source (CPU) with high heat flux. In order to meet the next generation CPU thermal requirements with a low profile heat sink, four heat sink technologies and their associated prototypes will be described. Each of the heat sink technologies use internal liquid-to-vapor phase change to efficiently spread the local CPU power to the air-cooled fin structure. The heat sink technologies are: embedded heat pipe; vapor chamber; and oscillating/pulsating heat pipe.

Wednesday, February 16, 2005 • HyattHyatt SSanan JJose,ose, SSanan JJose,ose, CCaliforniaalifornia About MEPTEC

MEPTEC (MicroElectronics Packaging and Test Engineering Council) is a trade association of semiconductor suppliers, manufacturers, and vendors concerned exclusively with packaging, assembly, and testing, and is committed to enhancing the competitiveness of the back-end portion of the semiconductor industry. Since its inception over 25 years ago, MEPTEC has provided a forum for semiconductor packaging and test professionals to learn and exchange ideas that relate to packaging, assembly, test and handling. Through our monthly luncheons, and one-day symposiums, and an Advisory Board consist- ing of individuals from all segments of the semiconductor industry, MEPTEC continuously strives to improve and elevate the roles of assembly and test professionals in the industry. For more information about MEPTEC events and membership visit our website at www.meptec.org.

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Visit the MEPTEC web site at www.meptec.org for more information.