Lecture 19 Transistor Amplifiers (I) Common-Source Amplifier

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Outline • Amplifier fundamentals • Common-source amplifier • Common-source amplifier with current-source supply

Reading Assignment: Howe and Sodini; Chapter 8, Sections 8.1-8.4

Announcement: Quiz #2: April 25, 7:30-9:30 PM at Walker. Calculator Required. Open book.

6.012 Spring 2007 Lecture 19 1 Amplifier Fundamentals

• Source resistance RS is associated only with small signal sources

• Choose ID = ISUP ---> DC output current

–IOUT = 0

–VOUT = 0

Input Intrinsic Load sources Amplifier V+ Voltage Input Supply RS Current + v ISUP s − I i = i + SUP OUT d VBIAS − v = V + v + IN BIAS s iD v R Active OUT L = + Input Current Input iIN IBIAS is Device − = iD f(input)

R is S IBIAS

V −

6.012 Spring 2007 Lecture 19 2 2. Common-Source Amplifier: Consider the following circuit: + V =VDD

RD iR signal source signal RS iD + load

RL vOUT vs V BIAS -

- V =VSS

• Consider intrinsic voltage amplifier - no loading

•RS = 0 •RL ---> ∞ •VGS = VBIAS -VSS

•VBIAS, RD and W/L of MOSFET selected to bias transistor in saturation and obtain desired output

bias point (i.e. VOUT = 0).

Watch notation: vOUT(t)=VOUT+vout(t)

6.012 Spring 2007 Lecture 19 3 Load line view of amplifier: load line IR=ID

V -V DD SS VVGGBIAS-VSS-V=VssDD= V-VDDSS-VSS RD

VVGGBIAS-VSS-Vss

VVGGBIAS-VSS-V=VssT= VT 0 VSS VDD VOUT Transfer characteristics of amplifier: VOUT

VDD

VSS 0 VT VDD-VSS VVGG-VSS-V Want: BIAS ss • Bias point calculation; • Limits to signal swing • Small-signal gain; • Frequency response [in a few days]

6.012 Spring 2007 Lecture 19 4 Bias point: choice of VBIAS, W/L, and RD to keep

transistor in saturation and to get proper quiescent VOUT. Assume MOSFET is in saturation: W 2 I = µ C ()V − V − V D 2L n ox BIAS SS T

VDD − VOUT IR = RD

If we select VOUT=0:

W 2 VDD ID = IR = µ nCox ()VBIAS − VSS − VT = 2 L RD Then:

2ID VBIAS = W + VSS + VT µnCox L

Equation that allows us to compute needed VBIAS given RD and W/L.

6.012 Spring 2007 Lecture 19 5 VDD Signal swing:

RD signal source + RS

vOUT vs

VBIAS -

VSS • Upswing: limited by MOSFET going into cut-off.

vout,max = VDD

• Downswing: limited by MOSFET leaving saturation. 2I V V V D DS,sat = GS − T = W µnCox or L

vout,min − VSS = VBIAS − VSS − VT

Then: vout,min = VBIAS − VT

6.012 Spring 2007 Lecture 19 6 Generic view of the effect of loading on small-signal operation Two-port network view of small-signal equivalent circuit model of a voltage amplifier:

Rin is input resistance Rout is output resistance Avo is unloaded voltage gain

Rs Rout + + + + vs vin Rin Avovin vout RL - - - -

input output unloaded circuit loading loading

vs Voltage divider at input: vin = Rin Rin + Rs Avovin Voltage divider at output: vout = RL Rout + RL

vout Rin RL Loaded voltage gain: = Avo vs Rin + RS RL + Rout

6.012 Spring 2007 Lecture 19 7 Small-signal voltage gain Avo: draw small-signal equivalent circuit model: Remove RL and RS

G D + + +

vt vgs gmvgs ro vout - - S -

+ +

vt gmvt (ro//RD) vout - -

vout = −gmvt (ro // RD )

Then unloaded voltage gain: vout Avo = =−gm ()ro // RD vt

6.012 Spring 2007 Lecture 19 8 Input Resistance

• Calculation of input resistance, Rin:

– Load amplifier with RL – Apply test voltage (or current) at input, measure test current (or voltage).

For common-source amplifier:

it + + vt vgs gmvgs (ro//RD) RL - -

vt it = 0 ⇒ Rin = =∞ it

No effect of loading at input.

6.012 Spring 2007 Lecture 19 9 Output Resistance

• Calculation of output resistance, Rout:

– Load amplifier with RS – Apply test voltage (or current) at output, measure test current (or voltage). – Set input source equal zero

For common-source amplifier:

it + + RS vgs gmvgs (ro//RD) vt - -

vgs = 0 ⇒ gmvgs = 0 ⇒ vt = it (ro // RD )

vt Rout = = ro // RD it

6.012 Spring 2007 Lecture 19 10 Two-port network view of common-source amplifier Voltage Amplifier

Rs Rout + + + + vs vin Rin Avovin vout RL - - - -

input output Intrinsic circuit loading loading

vout Rin RL = Avo vs Rin + RS RL + Rout vout RL =−gm()ro // RD =−gm()ro // RD // RL vs RL + ro // RD

6.012 Spring 2007 Lecture 19 11 Current Source Supply

I—V characteristics of current source:

iSUP

1 ISUP r i oc vSUP SUP

vSUP

Equivalent circuit models :

iSUP +

ISUP r r vSUP oc oc

large-signal model small-signal model

•iSUP = 0 for vSUP ≤ 0

•iSUP = ISUP + vSUP/ roc for vSUP > 0

• High small-signal resistance roc.

6.012 Spring 2007 Lecture 19 12 3. Common-source amplifier with current- source supply VDD

iSUP signal source signal RS iD + load

RL vOUT vs V BIAS -

VSS Loadline View load line iSUP=ID

VBIAS-VSS=VDD-VSS

ISUP VBIAS-VSS

VBIAS-VSS=VT 0 V SS VDD VOUT

6.012 Spring 2007 Lecture 19 13 Use PMOS for current source supply VDD

VB iSUP signal source

RS iD

vOUT vs

VBIAS

VSS Bias point: Assume both transistors in saturation

VOUT = 0. Choose ISUP and determine VB. ⎛ W ⎞ 2 ISUP =−IDp = ⎜ ⎟ µ pCox (VDD − VB + VTp ) ⎝ 2L⎠ p

Set -IDp = IDn for VOUT ~ 0 ⎛ W ⎞ 2 ISUP = IDn = ⎜ ⎟ µnCox ()VBIAS − VSS − VTn ⎝ 2L⎠ n 2I V = SUP + V + V BIAS ⎛ W⎞ SS T ⎜ ⎟ µnCox ⎝ L ⎠ n

6.012 Spring 2007 Lecture 19 14 VDD Signal swing:

VB iSUP signal source

RS iD

vOUT vs

VBIAS

VSS • Upswing: limited by PMOS leaving saturation.

VSD,sat = VSG + VTp = VDD − VB + VTp

VDD − vout,max = VDD − VB + VTp

vout,max = VB − VTp

• Downswing: limited by NMOS leaving saturation. • Same result as with resistive supply current.

vout,min = VBIAS − VT

6.012 Spring 2007 Lecture 19 15 3. Common-source amplifier with current- source supply (contd.)

Current source characterized by high output resistance:

roc. Significantly higher than amplifier with resistive supply.

p-channel MOSFET: roc = 1/λIDp VDD

VB iSUP signal source

RS iD

vOUT vs

VBIAS

VSS

• Voltage gain: Avo = -gm (ro//roc).

• Input resistance :Rin = ∞

• Output resistance: Rout = ro//roc.

6.012 Spring 2007 Lecture 19 16 Relationship between circuit figures of merit and device parameters Remember: W gm = 2I D µnCox L 1 L ro ≈ ∝ λnID ID Then:

Circuit Parameters

|Avo|Rin Rout Device* Parameters gm(ro//roc) ∝ ro//roc

ISUP ↑ ↓ - ↓ W ↑ ↑ -- L ↑ ↑ - ↑

* adjustments are made to VBIAS so that none of the other parameterschange

CS amplifier with current source supply is a good

voltage amplifier (Rin high and |Avo| high), but Rout high too ⇒ voltage gain degraded if RL << ro//roc.

6.012 Spring 2007 Lecture 19 17 What did we learn today?

Summary of Key Concepts for CS amplifier

• Bias Calculations • Signal Swing • Small Signal Circuit Parameters

– Voltage Gain - AVO

– Input Resistance - Rin

– Output Resistance - Rout • Relationship between small signal circuit and device parameters

6.012 Spring 2007 Lecture 19 18