"JFET-Input Operational Amplifiers"

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

D Low Power Consumption D High Input Impedance...JFET-Input Stage D Wide Common-Mode and Differential D Latch-Up-Free Operation Voltage Ranges D High Slew Rate...13 V/µs Typ D Low Input Bias and Offset Currents D Common-Mode Input Voltage Range D Output Short-Circuit Protection Includes VCC+ D Low Total Harmonic Distortion . . . 0.003% Typ description The TL08x JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. Offset adjustment and external compensation options are available within the TL08x family. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 85°C. The Q-suffix devices are characterized for operation from –40°C to 125°C. The M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C. symbols

TL081 TL082 (EACH AMPLIFIER) TL084 (EACH AMPLIFIER) OFFSET N1

IN+ + IN+ + OUT OUT IN– – IN– –

OFFSET N2

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright  1999, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production testing of all parameters. processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TL081M TL082M U PACKAGE U PACKAGE (TOP VIEW) (TOP VIEW)

NC 1 10 NC NC 1 10 NC OFFSET N1 2 9 NC 1OUT 2 9 VCC+ IN– 3 8 VCC+ 1IN– 3 8 2OUT IN+ 4 7 OUT 1IN+ 4 7 2IN– VCC– 5 6 OFFSET N2 VCC– 5 6 2IN+

TL081, TL081A, TL081B TL082, TL082A, TL082B D, JG, P, OR PW PACKAGE D, JG, P, OR PW PACKAGE (TOP VIEW) (TOP VIEW)

OFFSET N1 1 8 NC 1OUT 1 8 VCC+ IN– 2 7 VCC+ 1IN– 2 7 2OUT IN+ 3 6 OUT 1IN+ 3 6 2IN– VCC– 4 5 OFFSET N2 VCC– 4 5 2IN+

TL081M . . . FK PACKAGE TL082M . . . FK PACKAGE (TOP VIEW) (TOP VIEW) CC+ V NC 1OUT NC NC

NC N1 OFFSET NC NC NC 3 2 1 20 19 NC 4 18 NC 3212019 1IN– 5 17 2OUT NC 4 18 NC NC 6 16 NC IN– 5 17 VCC+ 1IN+ 7 15 2IN– NC 6 16 NC NC 8 14 NC IN+ 7 15 OUT 910111213 NC 8 14 NC 910111213 NC NC NC CC – 2IN + V NC NC NC CC – V TL084M . . . FK PACKAGE (TOP VIEW) OFFSET N2 OFFSET TL084, TL084A, TL084B D, J, N, PW, OR W PACKAGE 1IN – 1OUT NC (TOP VIEW) 4OUT 4IN –

3212019 1IN+ 4IN+ 1OUT 1 14 4OUT 4 18 NC NC 1IN– 2 13 4IN– 5 17 V V – 1IN+ 3 12 4IN+ CC+ 6 16 CC NC 7 15 NC VCC+ 4 11 VCC– 2IN+ 2IN+ 8 14 3IN+ 5 10 3IN+ 910111213 2IN– 6 9 3IN– 2OUT 7 8 3OUT NC 2IN – 3IN – 2OUT 3OUT NC – No internal connection

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999 — — — — (Y) CHIP CHIP FORM TL082Y TL084Y — — — — — (W) FLAT PACK TL084MW — — — — — (U) FLAT PACK TL081MU TL082MU — — — (PW) TSSOP TL081CPW TL082CPW TL084CPW — — — (P) DIP PLASTIC TL081CP TL081ACP TL081BCP TL082CP TL082ACP TL082BCP TL081IP TL082IP — — — — (N) DIP PLASTIC TL084CN TL084ACN TL084BCN TL084IN — — — — — DIP (JG) CERAMIC PACKAGED DEVICES PACKAGED TL081MJG TL082MJG AVAILABLE OPTIONS AVAILABLE — — — — — (J) DIP TL084MJ CERAMIC — — — — — (FK) CHIP CARRIER TL081MFK TL082MFK TL084MFK — — — (D014) SMALL OUTLINE TL084CD TL084ACD TL084BCD TL084ID TL084QD — — — (D008) SMALL OUTLINE TL081CD TL081ACD TL081BCD TL082CD TL082ACD TL082BCD TL081ID TL082ID TL084ID C ° max 6 mV 3 mV 6 mV 3 mV 6 mV 3 mV 6 mV 6 mV 6 mV 9 mV 6 mV 6 mV 9 mV IO 15 mV 15 mV 15 mV V AT 25 C C C C C C C ° ° ° ° ° C ° ° A ° to to to to T 0 70 85 125 125 –40 –40 –55 The D package is available taped and reeled. Add R suffix to the device type (e.g., TL081CDR). The D package is available taped and reeled. Add R suffix

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999 schematic (each amplifier)

VCC+

IN+

64 Ω IN– OUT 128 Ω

64 Ω

1080 Ω 1080 Ω

VCC–

OFFSET N1 OFFSET N2

TL081 Only

Component values shown are nominal.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TL082Y chip information These chips, when properly assembled, display characteristics similar to the TL082. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

(7) (6) (5) VCC+ (8) (3) 1IN+ + (1) (2) 1OUT 1IN– – (5) + (7) 2IN+ 2OUT (6) – 2IN– (4) 61 (8) (4) VCC–

CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM

TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. (1) (2) (3) PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. 61

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TL084Y chip information These chips, when properly assembled, display characteristics similar to the TL084. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS VCC+ (4) (3) 1IN+ + (1) (2) 1OUT 1IN– – (13) (12) (11) (10) (9) (5) + (7) 2IN+ 2OUT (6) – 2IN– (10) 3IN+ + (8) (9) 3OUT (14) (8) 3IN– – 62 (12) (1) (7) + (14) 4IN+ 4OUT (13) – 4IN– (11) VCC– (2) (3) (4) (6) CHIP THICKNESS: 15 TYPICAL 105 BONDING PADS: 4 × 4 MINIMUM

TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP.

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

TL08_C TL08_AC TL08_I TL084Q TL08_M UNIT TL08_BC Supply voltage, VCC+ (see Note 1) 18 18 18 18 V Supply voltage VCC– (see Note 1) –18 –18 –18 –18 V Differential input voltage, VID (see Note 2) ± 30 ± 30 ± 30 ± 30 V Input voltage, VI (see Notes 1 and 3) ±15 ±15 ±15 ±15 V Duration of output short circuit (see Note 4) unlimited unlimited unlimited unlimited Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, TA 0 to 70 – 40 to 85 – 40 to 125 – 55 to 125 °C Storage temperature range, Tstg – 65 to 150 – 65 to 150 – 65 to 150 – 65 to 150 °C Case temperature for 60 seconds, TC FK package 260 °C Lead temperature 1,6 mm (1/16 inch) from case for 60 J or JG package 300 °C seconds Lead temperature 1,6 mm (1/16 inch) from case for 10 D, N, P, or 260 260 260 °C seconds PW package † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–. 2. Differential voltages are at IN+ with respect to IN–. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded.

DISSIPATION RATING TABLE T ≤ 25°C DERATING DERATE T = 70°C T = 85°C T = 125°C PACKAGE A A A A POWER RATING FACTOR ABOVE TA POWER RATING POWER RATING POWER RATING D (8 pin) 680 mW 5.8 mW/°C 32°C 460 mW 373 mW N/A D (14 pin) 680 mW 7.6 mW/°C60°C 604 mW 490 mW 186 mW FK 680 mW 11.0 mW/°C88°C 680 mW 680 mW 273 mW J 680 mW 11.0 mW/°C88°C 680 mW 680 mW 273 mW JG 680 mW 8.4 mW/°C69°C 672 mW 546 mW 210 mW N 680 mW 9.2 mW/°C76°C 680 mW 597 mW N/A P 680 mW 8.0 mW/°C65°C 640 mW 520 mW N/A PW (8 pin) 525 mW 4.2 mW/°C25°C 336 mW N/A N/A PW (14 pin) 700 mW 5.6 mW/°C25°C 448 mW N/A N/A U 675 mW 5.4 mW/°C25°C 432 mW 351 mW 135 mW W 680 mW 8.0 mW/°C 65°C 640 mW 520 mW 200 mW

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 Template Release Date: 7–11–94 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999 C ° V V Ω pA nA pA nA dB dB dB dB mV V/ mA MHz UNIT V/mV µ 6 9 10 20 2.8 100 200 MAX 3 5 3 to 15 12 18 30 86 86 86 12 1.4 200 120 ± –12 TYP 13.5 10 ± TL081I TL082I TL084I C for TL08_C, TL08_AC, ° 11 50 25 75 75 80 12 12 10 ± ± ± ± MIN C to 70 ° 3 5 2 7 2.8 100 200 is 0 MAX A 2 5 3 to 15 12 18 30 86 86 86 12 1.4 200 120 ± –12 TYP 13.5 10 e for T ± TL082BC TL084BC TLO81BC 11 50 25 75 75 80 12 12 10 ± ± ± ± MIN as shown in Figure 17. Pulse techniques must be used 6 2 7 7.5 2.8 100 200 MAX 3 5 3 to 15 12 18 30 86 86 86 12 1.4 200 120 ± –12 TYP 13.5 10 ± TL081AC TL082AC TL084AC 11 50 25 75 75 80 12 12 10 ± ± ± ± MIN 2 15 20 10 2.8 200 400 MAX 3 5 3 to 15 12 18 30 86 86 86 12 1.4 200 120 ± –12 TYP 13.5 10 ± TL081C TL082C TL084C 11 25 15 70 70 70 12 12 10 ± ± ± ± MIN C C C C C C C C C C C C C C † ° ° ° ° ° ° ° ° ° ° ° ° ° ° range A

T ll 25 25 25 25 25 25 25 25 25 25 25 25 25 u Full range Full Full range Full range Full range FullF range Full range Ω Ω Ω Ω Ω Ω Ω

50 2 k 2 k =50 9 V, ≥ ≥ = 50 = = 50 = 50

± S S L L S S S R R R R No load 15 V (unless otherwise noted) min, ± Ω Ω 15 V to Ω = ICR 10 V, 10 V, ± ± ± ± 0 0 0 = 10 k 2 k = 100 =0 =0 =0 = V ≥ ≥ = = 0, R = 0, R = = = = 0 = = 0, = 10 k CC TEST CONDITIONS L L L O O O O O O O O O O O IC CC O VD V V V V V V V R R R V V V V A ‡ ‡ t ‡ ‡ t C for TL08_I. ) ° swing age

lt oltage IO V v curren t vo l ∆ ratio / a

se C to 85 ti as curren ± voltage ff °

bi offset o

t t t ut voltage swing CC utu offset voltage p eren V p ∆ npu npu amplification In Inp Temperature of input coefficient voltage offset InputI offset current InputI bias current Common-mode input voltage range MiMaximum peak outout ut k Large-signal differentialdiff voltage Unity-gain bandwidth Input resistance Common-mode rejection ratioSupply voltage rejection ratio ( V Supply current (per amplifier) Crosstalk attenuation PARAMETER O2 /V VIO IO IO ICR OM 1 O1 VD VD SVR i IO IB IO IB CC TL08_BC and –40TL08_BC maintain the junction temperature as close to ambient possible. that Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which temperature sensitive bias currents of a FET-input Input All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full rang V α I I I V V A B r CMRR CMRR k I V ‡ electrical characteristics, V †

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999 electrical characteristics, VCC ± = ±15 V (unless otherwise noted) TL081M, TL082M TL084Q, TL084M † PARAMETER TEST CONDITIONS TA UNIT MIN TYP MAX MIN TYP MAX 25°C 3 6 3 9 VIO InInpputut offset offsetvoltagevoltage VO =0= 0, RS ==50 50 Ω mV Full range 9 15 Temperature αVIO coefficient of input VO = 0 RS = 50 Ω Full range 18 18 µV/°C offset voltage 25°C 5 100 5 100 pA IIO InputInput offsetoffset curren currentt‡ VO =0= 0 125°C 20 20 nA 25°C 30 200 30 200 pA IIB IInputnput biasbias currentcurrent‡ VO =0= 0 125°C 50 50 nA ± 12 ± 12 Common-mode input V 25°C ±11 to ±11 to V ICR voltage range 15 15 RL = 10 kΩ 25°C ±12 ±13.5 ±12 ±13.5 MiMaximum peak k VOM RL ≥ 10 kΩ ±12 ±12 V output voltage swing FullFull range RL ≥ 2 kΩ ±10 ±12 ±10 ±12 Large-signal VO = ±10 V, RL ≥ 2 kΩ 25°C 25 200 25 200 AVD differentialdifferential vo voltageltage V/mV amplification VO = ±10 V, RL ≥ 2 kΩ Full range 15 15 B1 Unity-gain bandwidth 25°C 3 3 MHz ri Input resistance 25°C 1012 1012 Ω Common-mode V = V min, CMRR IC ICR 25°C 80 86 80 86 dB rejection ratio VO = 0, RS = 50 Ω Supply voltage VCC = ±15 V to ±9 V, kSVR rejection ratio 25°C 80 86 80 86 dB VO = 0, RS = 50 Ω (∆VCC±/∆VIO) Supply current I V = 0, No load 25°C 1.4 2.8 1.4 2.8 mA CC (per amplifier) O

VO1/VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB † All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 17. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as is possible. operating characteristics, VCC± = ±15 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ∗ VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 8 13 SR Slew rate at unity gain V = 10 V, RL = 2 kΩ, CL = 100 pF, V/µs I 5∗ TA = – 55°C to 125°C, See Figure 1 tr Rise time 0.05 µs VI =20mV= 20 mV, RL ==2k 2 kΩ, CL = 100 pFpF, See FigureFigure 1 Overshoot factor 20% √ EEquivalentquivalent inputin ut noise f = 1 kHz 18 nV/ Hz Vn RS =20= 20 Ω voltage f = 10 Hz to 10 kHz 4 µV

Equivalent input noise Ω √ In current RS = 20 , f = 1 kHz 0.01 pA/ Hz

VIrms = 6 V, AVD = 1, RS ≤ 1 kΩ, RL ≥ 2 kΩ, THD Total harmonic distortion f = 1 kHz 0.003% ∗On products compliant to MIL-PRF-38535, this parameter is not production tested.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999 electrical characteristics, VCC± = ±15 V, TA = 25°C (unless otherwise noted) TL082Y, TL084Y PARAMETER TEST CONDITIONS† UNIT MIN TYP MAX

VIO Input offset voltage VO = 0, RS = 50 Ω 3 15 mV αVIO Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω 18 µV/°C IIO Input offset current‡ VO = 0, 5 200 pA IIB Input bias current‡ VO = 0, 30 400 pA –12 VICR Common-mode input voltage range ±11 to V 15 VOM Maximum peak output voltage swing RL = 10 kΩ, ±12 ±13.5 V AVD Large-signal differential voltage amplification VO = ±10 V, RL ≥ 2 kΩ 25 200 V/mV B1 Unity-gain bandwidth 3 MHz 12 Ω ri Input resistance 10 V = V min,, V = 0,, 70 86 CMRR Common-mode rejection ratio ICICR O dB RS = 50 Ω 70 86

VCC = ±15 V to ± 9 V,, 70 86 kSVR SuSuppppllyy v voltageoltage rejection ratio ( ∆VCC± /∆VIO) dB VO = 0, RS = 50 Ω 70 86 ICC Supply current (per amplifier) VO = 0, No load 1.4 2.8 mA VO1/VO2 Crosstalk attenuation AVD = 100 120 dB † All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 17. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 8 13 V/µs tr Rise time 0.05 µs VI =20mV= 20 mV, RL ==2k 2 kΩ, CL = 100 ppFF, See FigureFigure 1 Overshoot factor 20% f = 1 kHz 18 nV/√Hz Vn EquivalentEquivalent inp inputut noise v voltageoltage RS ==20 20 Ω f = 10 Hz to 10 kHz 4 µV In Equivalent input noise current RS = 20 Ω, f = 1 kHz 0.01 pA/√Hz VIrms = 6 V, AVD = 1, RS ≤ 1 kΩ, RL ≥ 2 kΩ, THD Total harmonic distortion f = 1 kHz 0.003%

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

PARAMETER MEASUREMENT INFORMATION

10 kΩ –

1 kΩ OUT –

VI + VI OUT

CL = 100 pF RL = 2 kΩ + RL CL = 100 pF

Figure 1 Figure 2

100 kΩ – TL081 IN– C2

OUT + C1 500 pF IN+ N2 N1

IN– – N1 100 kΩ

OUT + 1.5 kΩ

VCC–

Figure 3 Figure 4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE vs FreFrequencyquency 55,, 6,6, 7 vs Free-air temperature 8 V MaMaximumximum peakpeak outoutppuutt voltagevoltage OM vs Load resistance 9 vs Supply voltage 10 vs Free-air temperature 11 Large-signal differential v voltageoltage amamplificationplification AVD vs Frequency 12 Differential voltage amplification vs Frequency with feed-forward compensation 13 PD Total power dissipation vs Free-air temperature 14 vs Free-air temperature 15 I SuSuppppllyy c currenturrent CC vs Supply voltage 16 IIB Input bias current vs Free-air temperature 17 Large-signal pulse response vs Time 18 VO Output voltage vs Elapsed time 19 CMRR Common-mode rejection ratio vs Free-air temperature 20 Vn Equivalent input noise voltage vs Frequency 21 THD Total harmonic distortion vs Frequency 22

MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE vs vs FREQUENCY FREQUENCY ±15 ±15 Ω VCC± = ±15 V RL = 10 k Ω ° RL = 2 k TA = 25 C T = 25°C See Figure 2 V = ±15 V A ±12.5 ±12.5 CC± See Figure 2

±10 ±10 VCC± = ±10 V VCC± = ±10 V ±7.5 ±7.5

±5 VCC± = ±5 V ±5 VCC± = ±5 V

– Maximum Peak Output Voltage – V – Maximum Peak Output Voltage ± 2.5 – V – Maximum Peak Output Voltage ±2.5 OM V OM V 0 0 100 1 k 10 k 100 k 1 M 10 M 100 1 k 10 k100 k 1 M 10 M f – Frequency – Hz f – Frequency – Hz Figure 5 Figure 6

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TYPICAL CHARACTERISTICS†

MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE vs vs FREQUENCY FREE-AIR TEMPERATURE ±15 ±15 ÎÎÎÎÎRL = 10 kΩ VCC± = ±15 V

R = 2 kΩ ÎÎÎÎÎ ± TA = 25°C L 12.5 See Figure 2 ±12.5

RL = 2 kΩ ÎÎÎÎÎ ±10 ±10 TA = – 55°C

±7.5 ±7.5

TA = 125°C ±5 ±5 – Maximum Peak Output Voltage – V – Maximum Peak Output Voltage – Maximum Peak Output Voltage – V – Maximum Peak Output Voltage ±2.5 ±2.5 OM OM V ± = ±15 V

V CC V See Figure 2 0 0 10 k 40 k 100 k 400 k 1 M 4 M 10 M – 75 – 50 – 25 0 25 50 75 100 125 f – Frequency – Hz TA – Free-Air Temperature – °C Figure 7 Figure 8

MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE vs vs LOAD RESISTANCE SUPPLY VOLTAGE ±15 ±15 Ω VCC± = ±15 V RL = 10 k ° TA = 25°C TA = 25 C ± ±12.5 See Figure 2 12.5

±10 ±10

±7.5 ±7.5

±5 ±5 – Maximum Peak Output Voltage – V – Maximum Peak Output Voltage – Maximum Peak Output Voltage – V – Maximum Peak Output Voltage ± OM ±2.5 2.5 OM V V

0 0 0.1 0.2 0.4 0.7 1 2 4 7 10 0 2 4 6 8 10 12 14 16 |V | – Supply Voltage – V RL – Load Resistance – kΩ CC± Figure 9 Figure 10

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TYPICAL CHARACTERISTICS†

LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 1000 700 400

200

100 70 40

10 – Large-Signal Differential 7 VD Voltage Amplification – V/mV Voltage A 4 VCC± = ±15 V VO = ±10 V 2 RL = 2 kΩ 1 –75 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C Figure 11

LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY 106 VCC± = ±5 V to ±15 V RL = 10 kΩ 105 TA = 25°C

104 0° Differential Voltage Amplification (left scale) 103 45° Phase Shift 102 90° – Large-Signal Differential

VD Phase Shift Voltage Amplification – V/mV Voltage A 101 (right scale) 135°

° 1 180 1 10 100 1 k 10 k 100 k 1 M 10 M f – Frequency – Hz

Figure 12

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TYPICAL CHARACTERISTICS†

DIFFERENTIAL VOLTAGE AMPLIFICATION TOTAL POWER DISSIPATION vs vs FREQUENCY WITH FEED-FORWARD COMPENSATION FREE-AIR TEMPERATURE 106 250 V ± = ±15 V V ± = ±15 V CC CC 225 No Signal C2 = 3 pF No Load 105 TA = 25°C 200 See Figure 3 175 104 TL084, TL085 150

103 125

100 TL082, TL083 102 75 TL081

– Total Power Dissipation – mW – Total 50

10 D P – Differential Voltage Amplification – V/mV – Differential Voltage 25 VD A 1 0 100 1 k 10 k 100 k 1 M 10 M –75 –50 –25 0 25 50 75 100 125 f – Frequency With Feed-Forward Compensation – Hz TA – Free-Air Temperature – °C Figure 13 Figure 14

SUPPLY CURRENT PER AMPLIFIER SUPPLY CURRENT vs vs FREE-AIR TEMPERATURE SUPPLY VOLTAGE 2.0 2.0 V = ±15 V CC± T = 25°C 1.8 No Signal 1.8 A No Signal No Load 1.6 1.6 No Load

1.4 1.4

1.2 1.2

1.0 1.0

0.8 0.8 – Supply Current mA – Supply Current mA ± 0.6 ± 0.6 CC CC I 0.4 I 0.4

0.2 0.2

0 0 –75 –50 –25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 ° TA – Free-Air Temperature – C |VCC± | – Supply Voltage – V Figure 15 Figure 16

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TYPICAL CHARACTERISTICS†

INPUT BIAS CURRENT vs VOLTAGE-FOLLOWER FREE-AIR TEMPERATURE LARGE-SIGNAL PULSE RESPONSE 100 6 VCC± = ±15 V V ± = ± 15 V CC RL = 2 k Ω CL = 100 pF 4 TA = 25°C 10 Output 2

1 0

– 2 – Input Bias Current nA

IB 0.1 Input Input and Output Voltages – V Input and Output Voltages I – 4

0.01 – 6 – 50 – 25 0 25 50 75 100 125 0 0.5 1 1.5 2 2.5 3 3.5 TA – Free-Air Temperature – °C t – Time – µs Figure 17 Figure 18

OUTPUT VOLTAGE COMMON-MODE REJECTION RATIO vs vs ELAPSED TIME FREE-AIR TEMPERATURE 28 89 VCC± = ±15 V Ω 24 RL = 10 k 88 20

87 16 VCC± = ±15 V RL = 2 k Ω 12 CL = 100 pF 86 TA = 25°C 8 See Figure 1

– Output Voltage – mV – – Output Voltage 85 O

V 4

84 0 CMRR – Common-Mode Rejection Ratio dB – 4 83 0 0.2 0.4 0.6 0.8 1.0 1.2 – 75 – 50 – 25 0 25 50 75 100 125 µ t – Elapsed Time – s TA – Free-Air Temperature – °C Figure 19 Figure 20

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

TYPICAL CHARACTERISTICS†

EQUIVALENT INPUT NOISE VOLTAGE TOTAL HARMONIC DISTORTION vs vs FREQUENCY FREQUENCY 50 1 V ± = ±15 V V ± = ±15 V Hz CC CC A = 10 VD 0.4 AVD = 1 R = 20 Ω V = 6 V nV/ S I(RMS) 40 ° TA = 25 C TA = 25°C

0.1 30 0.04

20 0.01

10 0.004 THD – Total Harmonic Distortion – % THD – Total – Equilvalent Input Noise Voltage – – Equilvalent Input Noise Voltage n V 0 0.001 10 40 100 400 1 k 4 k 10 k 40 k 100 k 10 4001 k 4 k 10 k 40 k 100 k f – Frequency – Hz f – Frequency – Hz Figure 21 Figure 22

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

APPLICATION INFORMATION

RF = 100 kΩ VCC+

15 V –

Ω TL081 R1 R2 + 3.3 k – Output Input Output

TL081 + C3 VCC– CF = 3.3 µF 1 kΩ –15 V R3 R1 = R2 = 2(R3) = 1.5 MΩ 3.3 kΩ C1 C2 C1 = C2 =C3 = 110 pF 9.1 kΩ 2 1 f = 1 π f = = 1 kHz 2 RF CF o 2π R1 C1

Figure 23 Figure 24

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

APPLICATION INFORMATION

VCC+ 1 MΩ –

TL084 Output A

VCC+ + +

1 µF

TL084 V – CC+ Input –

TL084 Output B 100 kΩ 100 kΩ + VCC+ 100 kΩ

VCC+

µ 100 kΩ 100 F –

TL084 Output C +

Figure 25. Audio-Distribution Amplifier

6 sin ωt 1N4148 – 15 V 18 pF 18 kΩ 1 kΩ (see Note A) 18 pF

VCC+ –

Ω VCC+ 1/2 88.4 k –

TL082 + 1/2

6 cos ωt

Ω TL082 88.4 k + VCC– Ω 18 pF VCC– 1 k

15 V 1N4148 18 kΩ 88.4 kΩ (see Note A)

NOTE A: These resistor values may be adjusted for a symmetrical output.

Figure 26. 100-KHz Quadrature Oscillator

18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

APPLICATION INFORMATION

16 kΩ 16 kΩ 220 pF 220 pF

43 kΩ 30 kΩ 43 kΩ 30 kΩ

43 kΩ VCC+ VCC+

220 pFVCC+ 220 pF VCC+ –

Input – Ω Ω – 1/4 43 k – 43 kΩ 1/4 43 k

TL084 TL084 + + 1/4 1/4 Output

TL084 TL084 + + B Ω 1.5 kΩ VCC– 1.5 k VCC– VCC– VCC–

Output A Output A Output B

2 kHz/div 2 kHz/div Second-Order Bandpass Filter Cascaded Bandpass Filter fo = 100 kHz, Q = 30, GAIN = 4 fo = 100 kHz, Q = 69, GAIN = 16

Figure 27. Positive-Feedback Bandpass Filter

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN

0.050 (1,27)

0.020 (0,51) 0.010 (0,25) M 0.014 (0,35) 14 8

0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane

0.010 (0,25) 1 7 0°–8° 0.044 (1,12) A 0.016 (0,40)

Seating Plane

0.010 (0,25) 0.004 (0,10) 0.069 (1,75) MAX 0.004 (0,10)

PINS ** 8 14 16 DIM

0.197 0.344 0.394 A MAX (5,00) (8,75) (10,00)

0.189 0.337 0.386 A MIN (4,80) (8,55) (9,80) 4040047/D 10/96

NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Falls within JEDEC MS-012

20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN

NO. OF A B 18 17 16 15 14 13 12 TERMINALS ** MIN MAX MIN MAX 0.342 0.358 0.307 0.358 19 11 20 (8,69) (9,09) (7,80) (9,09)

20 10 0.442 0.458 0.406 0.458 28 (11,23) (11,63) (10,31) (11,63) 21 9 B SQ 0.640 0.660 0.495 0.560 44 22 8 (16,26) (16,76) (12,58) (14,22) A SQ 0.739 0.761 0.495 0.560 23 7 52 (18,78) (19,32) (12,58) (14,22) 24 6 0.938 0.962 0.850 0.858 68 (23,83) (24,43) (21,6) (21,8) 25 5 1.141 1.165 1.047 1.063 84 (28,99) (29,59) (26,6) (27,0) 26 27 28 1 2 3 4

0.020 (0,51) 0.080 (2,03) 0.010 (0,25) 0.064 (1,63)

0.020 (0,51) 0.010 (0,25)

0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89)

0.028 (0,71) 0.045 (1,14) 0.022 (0,54) 0.035 (0,89) 0.050 (1,27)

4040140/D 10/96

NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA J (R-GDIP-T**) CERAMIC DUAL-IN-LINE PACKAGE 14 PIN SHOWN

PINS ** 14 16 18 20 DIM

0.310 0.310 0.310 0.310 A MAX (7,87) (7,87) (7,87) (7,87) B 0.290 0.290 0.290 0.290 A MIN 14 8 (7,37) (7,37) (7,37) (7,37)

0.785 0.785 0.910 0.975 B MAX (19,94) (19,94) (23,10) (24,77) C 0.755 0.755 0.930 B MIN (19,18) (19,18) (23,62)

0.300 0.300 0.300 0.300 C MAX 1 7 (7,62) (7,62) (7,62) (7,62) 0.065 (1,65) 0.245 0.245 0.245 0.245 C MIN 0.045 (1,14) (6,22) (6,22) (6,22) (6,22)

0.100 (2,54) 0.020 (0,51) MIN A 0.070 (1,78)

0.200 (5,08) MAX Seating Plane

0.130 (3,30) MIN

0.100 (2,54) 0°–15° 0.023 (0,58) 0.015 (0,38) 0.014 (0,36) 0.008 (0,20)

4040083/D 08/98

NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only. E. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22.

22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE

0.400 (10,20) 0.355 (9,00)

8 5

0.280 (7,11) 0.245 (6,22)

1 4 0.065 (1,65) 0.045 (1,14)

0.310 (7,87) 0.020 (0,51) MIN 0.290 (7,37)

0.200 (5,08) MAX Seating Plane

0.130 (3,30) MIN

0.063 (1,60) 0°–15° 0.015 (0,38) 0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20)

4040107/C 08/96

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 16 PIN SHOWN

PINS ** 14 16 18 20 DIM

0.775 0.775 0.920 0.975 A MAX A (19,69) (19,69) (23.37) (24,77)

16 9 0.745 0.745 0.850 0.940 A MIN (18,92) (18,92) (21.59) (23,88)

0.260 (6,60) 0.240 (6,10)

1 8 0.070 (1,78) MAX

0.310 (7,87) 0.035 (0,89) MAX 0.020 (0,51) MIN 0.290 (7,37)

0.200 (5,08) MAX

Seating Plane

0.125 (3,18) MIN

0.100 (2,54) 0°–15°

0.021 (0,53) 0.010 (0,25) M 0.015 (0,38) 0.010 (0,25) NOM

14/18 PIN ONLY

4040049/C 08/95

NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)

24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE

0.400 (10,60) 0.355 (9,02)

8 5

0.260 (6,60) 0.240 (6,10)

1 4

0.070 (1,78) MAX

0.310 (7,87) 0.020 (0,51) MIN 0.290 (7,37)

0.200 (5,08) MAX

Seating Plane

0.125 (3,18) MIN

0.100 (2,54) 0°–15°

0.021 (0,53) 0.010 (0,25) M 0.015 (0,38) 0.010 (0,25) NOM

4040082/B 03/95

NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN

0,30 0,65 0,10 M 0,19 14 8

0,15 NOM 4,50 6,60 4,30 6,20

Gage Plane

0,25 1 7 0°–8° A 0,75 0,50

Seating Plane 0,15 1,20 MAX 0,10 0,05

PINS ** 8 14 16 20 24 28 DIM

A MAX 3,10 5,10 5,10 6,60 7,90 9,80

A MIN 2,90 4,90 4,90 6,40 7,70 9,60

4040064/E 08/96

NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA U (S-GDFP-F10) CERAMIC DUAL FLATPACK

0.250 (6,35) 0.246 (6,10)

0.006 (0,15) 0.004 (0,10) 0.080 (2,03) 0.050 (1,27) 0.045 (1,14) 0.026 (0,66)

0.300 (7,62) 0.350 (8,89) 0.350 (8,89) 0.250 (6,35) 0.250 (6,35) 0.019 (0,48) 1 10 0.015 (0,38)

0.050 (1,27) 0.250 (6,35)

5 6 0.025 (0,64) 0.005 (0,13) 1.000 (25,40) 0.750 (19,05)

4040179/B 03/95

NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only. E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27 TL081, TL081A, TL081B, TL082, TL082A, TL082B TL082Y, TL084, TL084A, TL084B, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999

MECHANICAL DATA W (R-GDFP-F14) CERAMIC DUAL FLATPACK

Base and Seating Plane 0.260 (6,60) 0.235 (5,97)

0.007 (0,18) 0.004 (0,10) 0.080 (2,03) 0.045 (1,14) 0.045 (1,14) 0.026 (0,66) 0.280 (7,11) 0.360 (9,14) 0.255 (6,48) 0.360 (9,14) 0.240 (6,10) 0.240 (6,10) 1 14 0.019 (0,48) 0.015 (0,38)

0.050 (1,27)

0.390 (9,91) 0.335 (8,51)

0.025 (0,64) 0.015 (0,38)

7 8

1.000 (25,40) 0.735 (18,67)

4040180-2/B 03/95

NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only. E. Falls within MIL STD 1835 GDFP1-F14 and JEDEC MO-092AB

28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE

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TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.