An-398 Application Note

AN-398 a APPLICATION NOTE ONE TECHNOLOGY WAY • P.O. BOX 9106 • NORWOOD, MASSACHUSETTS 02062-9106 • 617/329-4700

Evaluation Boards for Single, Dual, and Quad Operational Amplifiers by Adolfo A. Garcia, Manager ADSC Applications Engineering

INTRODUCTION and R4 is inserted in series with the amplifier output. This application note describes evaluation boards for Jumpers and open circuits are used throughout the single, dual, and quad operational amplifiers whose pin- evaluation board as necessary to provide most any outs follow industry standard amplifier sockets. These circuit configuration. For example, if the application blank printed circuit boards are available to qualified requires an ac-coupled output voltage, then C3 can be OEMs at no charge, and were designed to provide quick substituted for J4. and easy evaluation of precision and medium-speed Power Supply Connections (gain-bandwidth products < 10 MHz) operational ampli- Power supply connections for the evaluation boards are fiers in inverting and noninverting applications. Further- shown in Figure 2. For optimal low frequency power more, provisions have been made on the boards to supply filtering, C and C should be 10 µF (or larger) evaluate operational amplifier capacitive loading effects P1 P2 electrolytic capacitors. These capacitors should be of using inside-the-loop or outside-the-loop capacitive the tantalum type with working voltages greater load compensation techniques. than 25 V in ±15 V applications. CP3 and CP4 are 0.1 µF Figure 1 illustrates the basic circuit configuration for ceramic capacitors and are located in close proximity to each of the evaluation boards. Provisions have been the amplifier’s supply pins for optimal high frequency made to the board for optional components in addition filtering. They, too, should exhibit working voltages to the required feedback resistors and power supply by- greater than or equal to 25 V. For additional filtering, pass capacitors. For example, if the application requires provisions have been made for the use of resistors in evaluating amplifier inside-the-loop capacitive load series with the amplifier power supply leads (R S+ and compensation, then R X and CX can be used. If an exter- RS–). To avoid input/output voltage headroom issues, nal outside-the-loop compensation technique is used, a voltage drops due to these resistors should be limited to jumper is substituted for R X, CX is removed completely, less than 0.1 V. If these resistors are not needed, then 0.4” wire jumpers should be used. C2 C1 R4 RS+ PIN 7 (SINGLE) V+ R2 PIN 8 (DUAL) C C PIN 4 (QUAD) J1 C C3 P1 P3 R1 X 10µF 0.1µF GND R J4 C C J2 J3 X P2 P4 VOUT 10µF 0.1µF V IN PIN 4 (SINGLE, DUAL) VÐ CL RL PIN 11 (QUAD) R3 RSÐ

Figure 2. Power Supply Connections and Bypassing Com- ponents for the Operational Amplifier Evaluation Board Figure 1. Complete Circuit Schematic and Connections for the Operational Amplifier Evaluation Board Noninverting and Inverting Amplifier Configurations Filter capacitors C2 and C1 can be used to tailor the re- Configuring the evaluation board for noninverting sponse of the amplifier circuit. For either noninverting amplifier applications is straightforward and is shown in or inverting applications, capacitor C2 works with R2 to Figure 3. In this configuration, jumper J1 connects R1 to bandlimit the amplifier’s high frequency response and GND, jumper J2 couples the input signal to the places a pole in the response at: noninverting terminal of the amplifier, C X is removed al- together, and jumper J3 is substituted for R X. R3 can be = 1 f P Eq. 3 used as a termination/input bias current compensation 2π×R2×C2 resistor, if required. The circuit‘s signal transfer equa- On the other hand, capacitor C1 works with R1 to intro- tion, including the effects of finite amplifier open-loop duce a zero in the amplifier response. The location of gain, is given by Equation 1: this low frequency corner is given by Equation 4:     1 V R 2 1 f = Eq. 4 OUT = 1+   Z 2π×R1×C1 V R1  1  R 2  Eq. 1 IN 1+ 1+   A  R1 Note, capacitor C1 should be used only in noninverting  OL  amplifier configurations, for, if it were used in inverting where AOL = Amplifier open-loop gain, in Volts per amplifier applications, it would appear in parallel with Volt (V/V); the input capacitance of the operational amplifier and and could cause instability. R2, R1 = Amplifier feedback network resistors, In many applications, it is often necessary to evaluate in ohms the total output voltage error of an amplifier configuration due to amplifier input offset voltage, common- C2 C1 mode rejection, input bias and offset currents, and open-loop gain. Using either the noninverting or the in- R2 J1 R1 verting amplifier configuration, the total output voltage error of an amplifier due to these parameters is given by J3 J4 J2 Equation 5: VOUT VIN RL R3   =  1 × VOUT   1+ 1 ()1+ R2  AOL R1

Figure 3. Circuit Configurations for Noninverting Ampli- + VCM +R2+−IOS × fier Applications []()VOS ()1()IB R2 Eq. 5 CMRR R12 For inverting amplifier applications, the circuit configura- where AOL = Amplifier open-loop gain, in V/V; tion is shown in Figure 4. The input signal is applied to VOS = Amplifier input offset voltage, in volts; R1 through J1; thus, the circuit’s transfer equation is VCM = Applied input common-mode voltage, given by Equation 2: in volts;   CMRR = Amplifier common-mode rejection VOUT R2 1  ratio, in V/V; =− Eq. 2 VIN R1+ 1 + R2  1 ()1  IB = Amplifier input bias current, in amperes; AOL R1 IOS = Amplifier input offset current, in amperes; where A OL, R2, and R1 have been previously defined. and R2, R1 = Amplifier feedback network resistors, C2 in ohms. In applications where large source/feedback resistors or R2 R1 amplifiers with large input bias currents are used, then R3 should be set to the parallel combination of R1 and J2 J3 R2. J1 VOUT VIN RL R3

Figure 4. Circuit Connections for Inverting Amplifier Applications

–2– Amplifier Capacitive Load Compensation These equations are valid for either inverting or non-

As with any operational amplifier, care must be taken inverting applications. Note, that R O (amplifier open- when driving capacitive loads. Many operational ampli- loop output resistance) can be determined empirically fier data sheets now provide information with regard to or from amplifier data sheets. If graphs for amplifier amplifier output voltage overshoot versus capacitive output impedance versus frequency are provided, then load. In those cases where little or no information is RO is equal to the value of the amplifier’s closed-loop provided by the manufacturer on this issue, the circuit output impedance at the open-loop, unity-gain cross- configuration shown in Figure 5 can be used to evaluate over frequency. Note, C X is a product of the circuit’s an amplifier’s capacitive load driving capability using an closed-loop gain, the amplifier’s high frequency output inside-the-loop compensation technique. This technique impedance, and the load capacitance. works equally well for inverting or noninverting applica- Two important points with regard to this technique tions where the closed-loop circuit gain is greater than require mention: First, R cannot be made arbitrarily unity. Unity-gain circuit configurations for inside-the- X large because the voltage drop across R detracts from loop capacitive load compensation are a special case X the amplifier’s output voltage range. Second, this tech- and will be mentioned shortly. nique reduces the bandwidth of the circuit and is determined by Equation 8: R2

J1 1 R1 CX f = 3dB π× × Eq. 8 2 R2 CX R J4 J2 J3 X VOUT Unity-gain noninverting amplifier applications are a VIN CL special case. Since R1, shown in Figure 5, is not used in R3 voltage buffer applications, Equation 7 cannot be used

to determine an initial value for C X. In these cases, an approximation can be made for C X and is given by Equa- tion 9: Figure 5. Amplifier Circuit Connections for an Inside-the- Loop Capacitive Load Compensation Technique 2 × RX ×CL CX = Eq. 9 Load capacitance reacts with an amplifier’s open-loop R2 output resistance (R ) to produce an additional pole in O where RX = RO, CL, and R2 have been previously defined. the feedback path. If the additional pole falls within the loop-gain response of the amplifier, then the added In applications where an inside-the-loop compensation phase shift produced by this pole will introduce technique cannot be used, as in the case for current- response ringing and can even cause oscillation. feedback operational amplifiers, outside-the-feedback loop compensation techniques substitute R4 for the As shown in the figure, R X is used to isolate the jumper wire at the output of the amplifier, as shown in amplifier‘s output stage from the capacitive load, and C X Figure 6. Note, capacitor C X is removed completely and is used to provide a secondary bypass feedback loop a jumper wire is used in place of R X. The value for R4 is which controls of the amplifier’s loop-gain response at empirical, as it depends on the choice of amplifier, high frequencies. Although the selection for R X and CX capacitive load, and the closed-loop circuit gain. Some is empirical in the final analysis, Equations 6 and 7 can amplifier data sheets (References [1] and [2]) provide be used to select initial values for R X and CX: information regarding outside-the-loop capacitive load compensation for those specific devices. However, in × = RO R1 R X Eq. 6 general, drawbacks to this approach are: limited avail- R 2 able slew rate (amplifier short-circuit current determines output voltage slew rate), output voltage swing limita-  1   R 2 + R1 C = 1+ ×   × C × R tions (R4 forms a signal attenuator with R ), and signal X    2  L O Eq. 7 L  ACL  R 2 bandwidth limitations (R4 and R L form a low-pass filter with C L). where RO = Amplifier high-frequency, open-loop output resistance, in ohms;

ACL = Amplifier closed-loop gain, in V/V; CL = Load capacitance, in farads; and R1, R2 = Amplifier feedback network resistances, in ohms.

–3– R2 resonant-tuned circuits, components used in the evalua-

J1 tion board should have short leads, no longer than that R1 required for insertion directly into the board or into the

J4 R4 pin sockets. Lead forming tools are useful to help keep J2 J3 VOUT resistor component lead lengths short: a lead 0.1” long VIN C L RL can exhibit a self-inductance of 2 nH. R3 Component labels on the Rev. 1 evaluation board silk- screens do not correspond with the component labels shown in Figure 1. Their equivalencies to Figure 1 are:

Figure 6. Amplifier Circuit Connections for an Outside- RG = R1, R F = R2, R B = R3, C C = C1, CF = C2, RO = RX, R/C = the-Loop Capacitive Load Compensation Technique R4/C3. Capacitors C P1, CP2, CP3, and CP4 on the Rev. 1 Evaluation Board Application Caveats evaluation boards are not labeled. These evaluation boards were designed for engineering evaluations of single, dual, and quad operational amplifiers. As such, these boards were intended for engineering laboratory environments where ambient temperatures range from +20 °C to +50°C. They are not designed for heavy-duty production or incoming device qualification where these boards could be exposed to wide operating temperatures. In fact, since the layouts of the circuits are not isothermal, their use in evaluating operational amplifier input offset voltage drift performance over temperature should be carefully considered. As previously mentioned, the evaluation board layouts have not been optimized for high speed voltage- or cur- Figure 7a. Single Op Amp Evaluation Board Topside rent-feedback amplifiers that exhibit gain-bandwidth Silkscreen (Not to Scale) products (GBWP) > 10 MHz. On the other hand, these boards can be used in applications where signal rates of change are less than 50 V/ µs. Lastly, these boards should also not be used to evaluate very low input bias current (I B < 50 pA) and electrometer- grade operational amplifiers that require very clean printed circuit boards, Teflon component standoffs, and conformal coatings to minimize parasitic leakage currents.

Circuit Board Layout and Construction Considerations Figures 7, 8, and 9 illustrate the layouts of the single, dual, and quad operational amplifier evaluation boards. Although not shown to scale, the finished dimensions of Figure 7b. Single Op Amp Evaluation Board Topside the boards are 4 inches by 3 1/8 inches for the single op Metalization (Not to Scale) amp evaluation board, 4 3/16 inches by3 1/2 inches for the dual op amp evaluation board, and4 3/4 inches by 4 5/8 inches for the quad op amp evaluation board. In Figure 1, jumper wires J1, J2, and J3 are mounted into the board on a 0.3” center-to-center spacing (“centers”), and jumper wire J4 is mounted on 0.4” centers. Resis- tors used in the evaluation board should be of the metal- film type and are mounted into the board on 0.4” centers. Signal filter capacitors, C1 and C2, and supply bypass capacitors, C P3 and CP4, are mounted into the evaluation board on 0.2” centers. Low frequency bypass capacitors, C P1 and CP2, are mounted into the boards on 0.1” center-to-center spacing. Figure 7c. Single Op Amp Evaluation Board Backside Pin sockets are flush-mounted into the board, for ease of Metalization (Not to Scale) component interchangeability. They are, however, optional in those applications where higher speed performance is necessary. To avoid unintentional

–4– Figure 8a. Dual Op Amp Evaluation Board Topside Figure 9a. Quad Op Amp Evaluation Board Topside Silkscreen (Not to Scale) Silkscreen (Not to Scale)

Figure 8b. Dual Op Amp Evaluation Board Topside Figure 9b. Quad Op Amp Evaluation Board Topside Metalization (Not to Scale) Metalization (Not to Scale)

Figure 8c. Dual Op Amp Evaluation Board Backside Figure 9c. Quad Op Amp Evaluation Board Backside Metalization (Not to Scale) Metalization (Not to Scale)

–5– An example of a complete evaluation board is illustrated For the dual operational amplifier evaluation board: in Figure 10. The circuit is constructed around the Description Quantity OP279, a single-supply, rail-to-rail input/output operational amplifier with high output current drive. Each of Evaluation Board 1 the amplifiers in the circuit was configured for a gain of Pin Sockets 60 BNC Connectors, Female 4 +10 using 909 Ω for R2 and 100 Ω for R1. Double Turret Terminals 3 8-Pin DIP Machine Socket (Optional) 1

For the quad operational amplifier evaluation board: Description Quantity Evaluation Board 1 Pin Sockets 114

BNC Connectors, Female 8 E2233–12–5/95 Double Turret Terminals 3 14-Pin DIP Machine Socket (Optional) 1

NOTES 1 All pin socket quantities include those required for the power supply bypass components. Pin sockets are available from MIL-MAX (Part No. 0255-0-15-01-30-02-04-0). MIL-MAX can be contacted at (516) 922-6000. Figure 10. Dual Op Amp Evaluation Board Configured for 2 BNC connectors can be either PC mount (Pomona P/N: 4578) or Right the OP279 in a Gain-of-10 Noninverting Application Angle mount (Pomona P/N: 4788). 3 Double turret terminals can be purchased from Keystone (Part No. 1503) Acknowledgments or equivalent. 4 In those cases where machine sockets are used for the IC in the board, The author wishes to acknowledge the efforts of Louis pin socket quantities for the single, dual, and quad operational evalua- Agot, PRA engineering technician, who designed the tion boards are 28, 52, and 100, respectively. board layouts, routed, built, and tested the prototypes. REFERENCES Operational Amplifier Evaluation Board Materials List 1. ”AD9617 Low Distortion, Precision Wideband Opera- For the single operational amplifier evaluation board: tional Amplifier Data Sheet.” Order number: C1353– Description Quantity 10–10/89. Evaluation Board 1 2. “AD811 High Performance Video Operational Ampli- Pin Sockets 1 36 fier Data Sheet.” Order number: C1592–24–11/91. BNC Connectors, Female 2 2 Double Turret Terminals 3 3 These data sheets can be requested directly from the 8-Pin DIP Machine Socket (Optional) 4 1 Analog Devices Literature Center at (800) 262-5643, Option 2, or at (617) 461-3392. PRINTED IN U.S.A.

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