Common Drain Amplifier Or Source Follower

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Common Drain Amplifier Or Source Follower Common Drain Amplifier or Source Follower Figure 1(a) shows the source follower with ideal current source load. Figure 1(b) shows the ideal current source implemented by NMOS with constant gate to source voltage. VDD VDD M1 Vi M1 Vi Vo Vo VTN+∆V + M2 VG ∆V - VT0+∆V (a) (b) Figure 1. Common drain or source follower implementation. 1. Low Frequency Small Signal Equivalent Circuit V1 = Vi , V2 = Vo ,Vbs1 = - Vo , Vgs1 = Vi - Vo = V1 - V2 YL = g ds2 (or ZL = rds2 ), YS = ∞(or ZS = 0) From Figure 2(e), I1 = 0 I 2 = −g m1vgs1 + (g mb1 + g ds1 )Vo = −g m1 (V1 - V2 ) + (g mb1 + g ds1 )V2 = -g m1V1 + (g m1 + g mb1 + g ds1 )V2 1 G1 D1 G1 D1 + + vgs1 gm1vgs1 g vgs1 gm1vgs1 g gmb1vbs1 ds1 gmb1vo ds1 S D S D Vi 1 2 + Vi 1 2 + g g ds2 Vo ds2 Vo S2 S2 - (a) - - (b) - S G1 D1 G1 D1 2 + + vgs1 gm1vgs1 g g vgs1 gm1vgs1 g g mb1 ds1 gmb1 ds1 ds2 S D S D Vi 1 2 + Vi 1 2 + g V ds2 o Vo S2 (c) (d) - - - - vgs1 I1 I2 S1 D2 G1 + + + + Y V V1 2 Y V Vo L i gm1vgs1 g g gmb1 ds1 ds2 - - D1 S2 Zi Zo (e) (f) Figure 2. Source follower low frequency small signal equivalent circuit. 2 The corresponding Y-parameter matrix is, 0 0 Y = − g m1 g m1 + g mb1 + g ds1 detY = 0 The Source Follower Properties: y 22 + YL (g m1 + g mb1 + g ds1 ) + g ds2 Zi = = = ∞ detY + y11YL 0 + (0)g ds2 y11 + YS 1 1 Zo = = = detY + y 22 YS y 22 g m1 + g mb1 + g ds1 − y 21 − (−g m1 ) g m1 A V0 = = = ≈ 1 y 22 + YL (g m1 + g mb1 + g ds1 ) + g ds2 g m1 + g mb1 + g ds1 + g ds2 Or A V = g m1 (Zo // ZL ) − y 21YL − g m1g ds2 A I = = = ∞ detY + y11YL 0 + (0)g ds2 3 2. High Frequency Small Signal Equivalent Circuit VDD C gd1 Cdb1 Vi M1 Cgs1 Csb1 Vo Cgd2 Cdb2 CL VG M2 Figure 3. Source follower parasitic capacitances. Figure 3 shows all the parasitic capacitances of source follower circuit. Figure 4 shows the high frequency small signal equivalent circuit. From Figure 4, one obtains, a a b b b b a b V1 = VS , V2 = Vi = V1 , V2 = Vo , v gs1 = V1 - V2 , I 2 = -I1 G O = g mb1 + g ds1 + g ds2 , CO = Csb1 + Cdb2 + Cgd2 + C L The network a current equation is: a a a I1 = (G S + sCS )(V1 - V2 ) a a a I 2 = (G S + sCS )(V2 - V1 ) 4 C G1 gd1 D1 v o V gs1 gs1 1 v C mb gs1 m1 gds1 g g D2 C G S1 + IS S S (a) Vo C Csb1 db2 Cgd2 C gds2 L S2 - (a) +-vgs1 G1 S1 D2 + + Cgs1 1 gs C v Vi gd1 g C Vo I CS GS m1 gmb1 ds1 gds2 o S - g - D1 S2 Co=Csb1+Cdb2+Cgd2+CL (b) +-vgs1 G S G1 S1 D2 + + Cgs1 + CS gs1 Vi Cgd1 v g C Vo VS m1 gmb1 ds1 gds2 o - g - D1 S2 Co=Csb1+Cdb2+Cgd2+CL (c) a a b b I1 I2 I1 I2 + + + a b V2 = V1 V a a b b VS 1 Y Y V2 Z b i (d) Figure 4. Source follower high frequency small signal equivalent circuit. 5 The corresponding Y-parameter matrix is : a (G S + sCS ) − (G S + sCS ) Y = − (G S + sCS ) (G S + sCS ) The network b current equation is: b b b b b b I1 = sCgd1V1 + sCgs1 (V1 - V2 ) = s(Cgd1 + Cgs1 )V1 − sCgs1V2 b b b b b b b b b I 2 = −g m1Vgs1 + sCgs1 (V2 - V1 ) + (G o + sCo )V2 = −g m1 (V1 - V2 ) + sCgs1 (V2 - V1 ) + (G o + sCo )V2 b b = -(gm1 + sCgs1 )V1 + [g m1 + G o + s(Cgs1 + Co )]V2 The corresponding Y-parameter matrix is: b s(Cgd1 + Cgs1 ) - sCgs1 Y = - (g m1 + sCgs1 ) g m1 + G o + s(Cgs1 + Co ) b detY = s(Cgd1 + Cgs1 )[g m1 + G o + s(Cgs1 + Co )] - sCgs1 (g m1 + sCgs1 ) = sCgd1[g m1 + G o + s(Cgs1 + Co )] + sCgs1 (G o + sCo ) The gain of network b , the unloaded last stage, is: b b b b V2 − y 21 − y 21 g m1 + sCgs1 b A V = b = b b = b = ;YL = 0 V1 y 22 + YL y 22 g m1 + G o + s(Cgs1 + Co ) The input impedance of network b (or the load of network a) is given by: b b b b y 22 + YL y 22 g m1 + G o + s(Cgs1 + Co ) Zi = b b b = b = detY + y11YL detY sCgd1[g m1 + G o + s(Cgs1 + Co )] + sCgs1 (G o + sCo ) The voltage gain of network a is given by: a a a V2 − y 21 a 1 A V = a = a a ; YL = b V1 y 22 + YL Zi G + sC = S S sCgd1[g m1 + G o + s(Cgs1 + Co )] + sCgs1 (G o + sCo ) G S + sCS + g m1 + G o + s(Cgs1 + Co ) (G + sC )[g + G + s(C + C )] = S S m1 o gs1 o (G S + sCS )[g m1 + G o + s(Cgs1 + Co )] + sCgd1[g m1 + G o + s(Cgs1 + Co )] + sCgs1 (G o + sCo ) 6 The overall gain is given by: V V b V b V a A = o = 2 = 2 2 = A b A a ; since V b = V a V a b a V V 1 2 VS V1 V1 V1 g m1 + sCgs1 = g m1 + G o + s(Cgs1 + Co ) (G S + sCS )[g m1 + G o + s(Cgs1 + Co )] (G S + sCS )[g m1 + G o + s(Cgs1 + Co )] + sCgd1[g m1 + G o + s(Cgs1 + Co )] + sCgs1 (G o + sCo ) (g + sC )(G + sC ) = m1 gs1 S S [G S + s(CS + Cgd1 )][g m1 + G o + s(Cgs1 + Co )] + sCgs1 (G o + sCo ) (g m1 + sCgs1 )(GS + sCS ) = 2 G S (g m1 + G o ) + s[(CS + Cgd1 )(g m1 + G o ) + G S (Cgs1 + Co ) + Cgs1G o ] + s [(CS + Cgd1 )(Cgs1 + Co ) + Cgs1Co ] The trans-impedance of the overall network is: Vo Vo A V A Z = = = IS VS (G S + sCS ) (G S + sCS ) g m1 + sCgs1 = 2 G S (g m1 + G o ) + s[(CS + Cgd1 )(g m1 + G o ) + G S (Cgs1 + Co ) + Cgs1G o ] + s [(CS + Cgd1 )(Cgs1 + Co ) + Cgs1Co ] The DC gain is obtained by setting s=0. g m1 A Z0 = G S (g m1 + G o ) The transimpedance can be re-written as follows: C A (1+ s gs1 ) Z0 g A = m1 Z 1+ bs + as 2 (C + C )(g + G ) + G (C + C ) + C G b = S gd1 m1 o S gs1 o gs1 o G S (g m1 + G O ) (C + C )(C + C ) + C C a = S gd1 gs1 o gs1 o G S (g m1 + G O ) 7 If the poles are far apart, their values can be estimated as follows : 1 G S (g m1 + G O ) p1 = − = − b (CS + Cgd1 )(g m1 + G O ) + G S (Cgs1 + CO ) + Cgs1G O b (CS + Cgd1 )(g m1 + G O ) + G S (Cgs1 + CO ) + Cgs1G O p 2 = − = − a (CS + Cgd1 )(Cgs1 + CO ) + Cgs1CO g z = − m1 Cgs1 The bandwidth and gain bandwidth product are defined by the dominant pole p1. That is, w BW = p1 w f = BW BW 2π w GBW = A Z0 w BW w f = GBW GBW 2π The phase margin PM for non-inverting amplifier is the distance between the phase angle at the unity gain bandwidth frequency with respect to –180. For the source follower transfer function this is calculated as follows: s A Z0 (1+ ) A (s) = z Z s s (1+ )(1+ ) p1 p 2 jw GBW jw GBW A Z0 (1+ ) A Z0 (1+ ) A (jw ) = z ≈ z ; since w >> p Z GBW jw jw jw jw GBW 1 (1+ GBW )(1+ GBW ) ( GBW )(1+ GBW ) p1 p 2 p1 p 2 jw GBW jw GBW jw GBW ∠A Z (jw GBW ) = ∠A Z0 + ∠(1+ ) − ∠( ) − ∠(1+ ) z p1 p 2 -1 w GBW -1 w GBW = 0 + tan − 90 − tan = −180 + PM z p 2 -1 w GBW -1 w GBW PM = 90 + tan − tan z p 2 8 3. Source Follower as DC Level Shifter We assume the source follower is operating at saturation mode. That is the drain current is given by: 2 I DS = (β / 2)(VGS − VT ) ; VDS > (VGS − VT ) where: β = K(W / L) Therefore, 2I V − V = DS GS T β or 2I V = V + DS GS T β 2I V = V − V = V + DS GS in o T β If VBS=0, this is not possible for NMOS transistor in Nwell process. 2I V = V − V = V + DS GS in o TO β This difference between the voltage level of the input and output can be specified by controlling W/L ratio for a given K and IDS. In Figure 1(b), VBS=-Vo. Hence, 2I V = V − V = V + γ ( φ + V − φ ) + DS GS in o TO o β Note Vo appears on both sides of the equation, need iteration to determine the solution. Common Drain Amplifier or Source Follower Experiments 4. Source Follower as DC Level Shifter Source follower is a voltage follower, its gain is less than 1. The DC transfer characteristic has a slope of less than 1.
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