EE 203 Lecture 12

EE 330 Lecture 30

Basic amplifier architectures

• Common Emitter/Source • Common Collector/Drain • Common Base/Gate Review from Previous Lecture Two-port representation of amplifiers Unilateral amplifiers:

y V1 y11 22 V2 y21V1

• Thevenin equivalent output port often more standard

• RIN, AV, and ROUT often used to characterize the two-port of amplifiers

ROUT AVV1 V1 RIN V2

Unilateral amplifier in terms of “amplifier” parameters

1 y21 1 R  A  ROUT  IN V y y11 y22 22 Review from Previous Lecture Relationship with Dependent Sources ?

I1 I2 RIN ROUT

AVRV2 V1 AVV1 V2

Two Port (Thevenin)

Dependent sources from EE 201

200VB 16IA VIN

IA VB

Example showing two dependent sources Review from Previous Lecture Relationship with Dependent Sources ?

I1 I2 RIN ROUT

AVRV2 V1 AVV1 V2

Two Port (Thevenin)

Dependent sources from EE 201

Voltage Transconductance Amplifier Vs=µVx Is=αVx Amplifier

Voltage Dependent Voltage Dependent Voltage Source Current Source

Transresistance Current Amplifier Vs=ρIx Is=βIx Amplifier

Current Dependent Current Dependent Voltage Source Current Source Review From Previous Lecture Relationship with Dependent Sources ?

I1 I2 RIN ROUT

AVRV2 V1 AVV1 V2

Two Port (Thevenin)

It follows that

AVR=0 RIN=

AV=µ ROUT=0 I1 I2

Vs=µVx V1 AVV1 V2

Two Port (Thevenin)

V2=AVV1 Voltage dependent voltage source is a unilateral floating two-port voltage

amplifier with RIN=∞ and ROUT=0 Review From Previous Lecture Relationship with Dependent Sources ?

I1 I2 RIN ROUT

AVRV2 V1 AVV1 V2

Two Port (Thevenin)

It follows that

AVR=0 RIN=0

ρ =RT ROUT=0 I1 I2

Vs=ρIx V1 RTI1 V2

Two Port (Thevenin)

V2=RTI1

Current dependent voltage source is a unilateral floating two-port

transresistance amplifier with RIN=0 and ROUT=0 Review From Previous Lecture Relationship with Dependent Sources ?

I1 I2 RIN ROUT

AVRV2 V1 AVV1 V2

Two Port (Thevenin)

It follows that

I1 I2

AII1 V V Is=βIx 1 2 Two Port (Thevenin/Norton)

I2=AII1

Current dependent current source is a floating unilateral two-port current

amplifier with RIN=0 and ROUT=∞ Review From Previous Lecture Relationship with Dependent Sources ?

I1 I2 RIN ROUT

AVRV2 V1 AVV1 V2

Two Port (Thevenin)

It follows that

I1 I2

GTI1 V V Is=αVx 1 2 Two Port (Thevenin/Norton)

I2=GTV1

Voltage dependent current source is a floating unilateral two-port

transconductance amplifier with RIN=∞ and ROUT=∞ Review From Previous Lecture Dependent Sources

Vs=µVx Is=αVx

Vs=ρIx Is=βIx

Dependent sources are unilateral two-port amplifiers with ideal input and output impedances

Dependent sources do not exist as basic circuit elements but amplifiers can be designed to perform approximately like a dependent source • Practical dependent sources typically are not floating on input or output

• One terminal is usually grounded

• Input and output impedances of realistic structures are usually not ideal Why were “dependent sources” introduced as basic circuit elements instead of two-port amplifiers in the basic circuits courses??? Why was the concept of “dependent sources” not discussed in the basic electronics courses??? Basic Amplifier Structures

• MOS and Bipolar Transistors both have 3 primary terminals • MOS transistor has a fourth terminal that is generally considered a parasitic D terminal C

G B B

S E

D C

G B

E S Transistors as 3-terminal Devices

D C

G B

S E Small Signal Transistor Models as 3-terminal Devices Basic Amplifier Structures

Observation:

VOUT VOUT

M1 R1 R VIN VIN

These circuits considered previously have a terminal (emitter or source) common to the input and output in the small-signal equivalent circuit

For BJT, E is common, input on B, output on C Termed “Common Emitter”

For MOSFET, S is common, input on G, output on D Termed “Common Source” Basic Amplifier Structures

D C

G B

S E Small Signal Transistor Models as 3-terminal Devices

Amplifiers using these devices generally have one terminal common and use remaining terminals as input and output

Since devices are nearly unilateral, designation of input and output terminals is uniquely determined

Three different ways to designate the common terminal

Source or Emitter termed Common Source or Common Emitter

Gate or Base termed Common Gate or Common Base

Drain or Collector termed Common Drain or Common Collector Basic Amplifier Structures

D C

G B

S E Small Signal Transistor Models as 3-terminal Devices

MOS BJT Common Input Output Common Input Output

Common Source or Common Emitter S G D E B C

Common Gate or Common Base G S D B E C

Common Drain or Common Collector D G S C B E

Identification of Input and Output Terminals is not arbitrary It will be shown that all 3 of the basic amplifiers are useful ! Basic Amplifier Structures

D C

G B

S E Small Signal Transistor Models as 3-terminal Devices Common Source or Common Emitter Common Gate or Common Base Common Drain or Common Collector Objectives in Study of Basic Amplifier Structures 1. Obtain key properties of each basic amplifier 2. Develop method of designing amplifiers with specific characteristics using basic amplifier structures

RC

Common Gate

Common Source Common Emitter inc RC

INPUT OUTPUT

Common Base Common Drain Common Collector

Overall Amplifier Struture Characterization of Basic Amplifier Structures

D C

G B

S E Small Signal Transistor Models as 3-terminal Devices • Observe that the small-signal equivalent of any 3-terminal network is a two-port

• Thus to characterize any of the 3 basic amplifier structures, it suffices to determine the two-port equivalent network

• Since small signal model when expressed in terms of small-signal parameters

of BJT and MOSFET differ only in the presence/absence of gπ term, can analyze the BJT structures and then obtain characteristics of corresponding

MOS structure by setting gπ=0

C D G D B C

G gπ gO gO VBE B VGS gmVBE gmVGS S E S E The three basic amplifier types for both MOS and bipolar processes

Common Emitter Common Source

Common Base Common Gate

Common Collector Common Drain

Will focus on the performance of the bipolar structures and then obtain performance of the MOS structures by observation The three basic amplifier types for both MOS and bipolar processes

VOUT vgvOUTm be RL   Vin g vv RL Vin π RL INbe  Vbe gmVbe

VOUT vOUT ARVL  gm Common Emitter vIN

VOUT VOUT vgvOUTmbe RL   gπ RL Vbe gmVbe vvINbe  Vin RL

vOUT Vin ARVLgm vIN Common Base

VOUT vggOUTmbe v   RL   vvgg v R Vin gπ INbembe    L  Vbe gmVbe Vin RL VOUT

vOUT  ggm   RL RL A V   1 vgINm g1  RL Common Collector

• Significantly different gain characteristics for the three basic amplifiers

• There are other significant differences too (RIN, ROUT, …) as well The three basic amplifier types for both MOS and bipolar processes

Vin RL

VOUT Common Emitter Common Emitter Common Source

VOUT

Vin RL

Common Base Common Base Common Gate

VOUT

Vin RL

Common Collector Common Drain Common Collector

More general models are needed to accommodate biasing, understand performance capabilities, and include effects of loading of the basic structures

Two-port models are useful for characterizing the basic amplifier structures

How can the two-port parameters be obtained for these or any other linear two-port networks? Two-Port Models of Basic Amplifiers widely used for Analysis and Design of Amplifier Circuits

Methods of Obtaining Amplifier Two-Port Network i1 i2

Rin Ro V1 V2 AvRV 2 Av0V 1

1. VTEST : iTEST Method (considered in a previous lecture)

2. Write V1 : V2 equations in standard form

Vi 1 = 1 R IN + AVRV 2

V 2 = i 2 R O + A V0 V 1 3. Thevenin-Norton Transformations

4. Ad Hoc Approaches Any of these methods can be used to obtain the two-port model Vi t e s t t: e s t Method for Obtaining Two-Port Amplifier Parameters SUMMARY from PREVIOUS LECTURE

i1 i2 V Rin Ro out-test Vout-test AV0  Vtest V1 V2

AvRV 2 Av0V 1 V test If If Unilateral A

i i TEST i1 2 V test R Rin  in Ro i Vtest V1 V2 test

AvRV 2 Av0V 1

VR VR =0 i i1 i2 TEST V R  test R 0 in Ro i test V1 V2 Vtest AvRV 2 Av0V 1

i1 i2 V out-test R AVR  in Ro V Vout-test V1 Vtest test A V V2 AvRV 2 v0 1 Will now develop two-port model for each of the three basic amplifiers and look at one widely used application of each

Common Emitter Common Source

Common Base Common Gate

Common Collector Common Drain Consider Common Emitter/Common Source Two-port Models

Common Emitter Common Source

Common Base Common Gate

Common Collector Common Drain

Will focus on Bipolar Circuit since MOS counterpart is a special case obtained by setting gπ=0 Basic CE/CS Amplifier Structures

VOUT VOUT

R1 M1 R VIN VIN

Common Emitter Amplifier Common Source Amplifier

V OUT VOUT

M1 R R1 VIN VIN Common Source Amplifier Common Emitter Amplifier

Can include or exclude R and R1 in two-port models (of course they are different circuits) The CE and CS amplifiers are themselves two-ports ! Two-port model for Common Emitter Configuration

B C

gπ g Vbe O Common Emitter gmVbe E

?

i1 i2

Ro Rin A V V1 v01 V2

{Ri, AV0 and R0} Two-Port Models of Basic Amplifiers widely used for Analysis and Design of Amplifier Circuits

Methods of Obtaining Amplifier Two-Port Network

i1 i2

Rin Ro V1 V2 AvRV 2 Av0V 1

1. VTEST : iTEST Method

2. Write V1 : V2 equations in standard form

Vi 1 1= IN R + AVRV 2

ViV 2 2= OV0 R 1 + A

3. Thevenin-Norton Transformations

4. Ad Hoc Approaches Two-port model for Common Emitter Configuration

B C

gπ g Vbe O Common Emitter gmVbe E

i1 i2

Ro Rin A V V1 v01 V2

By Thevenin : Norton Transformations

1 gm 1 Rin  AV0  R0  AVR  0 g g0 g0 Two-Port Models of Basic Amplifiers widely used for Analysis and Design of Amplifier Circuits

Methods of Obtaining Amplifier Two-Port Network

i1 i2

Rin Ro V1 V2 AvRV 2 Av0V 1

1. VTEST : iTEST method

2. Write V1 : V2 equations in standard form

Vi 1 1= IN R + AVRV 2

ViV 2 2= OV0 R 1 + A

3. Thevenin-Norton Transformations

4. Ad Hoc Approaches Two-port model for Common Emitter Configuration

Alternately, by VTEST : iTEST Method

To obtain Rin itest

Vtest gπ gO Vbe gmVbe Common Emitter

i1 i2 V test Rin  Ro i test Rin A V V1 v0 1 V2 1 Rin  g

{Rin, AV0 and R0} Two-port model for Common Emitter Configuration

Alternately, by VTEST : iTEST Method

To obtain AV0

Vtest gπ gO Vbe gmVbe Vout-test

Common Emitter

V out-test AV0  V test

i1 i2 gm VVout testtest g Ro 0 Rin A V V1 v0 1 V2 gm AV0  g0

{Rin, AV0 and R0} Two-port model for Common Emitter Configuration

Alternately, by VTEST : iTEST Method itest To obtain g0

gπ gO Vtest Vbe gmVbe

Common Emitter

V test R0  i test

i1 i2 Vtesttest ig 0 

Ro Rin A V V1 v0 1 V2 1 R0  g0

{Rin, AV0 and R0} Two-port model for Common Emitter Configuration

i1 i2

Ro Rin A V V1 v01 V2

Common Emitter

In terms of small signal model parameters: 1 g 1 R  A  m R0  A  0 in V0 g0 VR g g0 In terms of operating point and model parameters: V V t AF VAF Ri  AV0  R0  ICQ Vt ICQ Characteristics: • Input impedance is mid-range • Voltage Gain is Large and Inverting • Output impedance is large • Unilateral • Widely used to build voltage amplifiers Common Emitter Configuration VDD Consider the following CE application R (this will also generate a two-port model for C this CE application) Vout RC C B

E Common Emitter inc RC Vin

CE Two-port including RC VEE R B o Vout C Vin RC V1 Rin Av01V

E CE Two-Port Model AVR  0 gg0  C Vout g0AV0 gm VVoutggg C 00 AV0 in AVC      gmCR Vin g00 gCCg g

RinC = Rin = rπ g g 1 0 C RoutC = R o //R C RoutC= RoC //R   R C gg0  C Common Emitter Configuration Consider the following CE application

(this will also generate a two-port model for this CE application) RC

Common Emitter inc RC This circuit can also be analyzed directly without using 2-port model for CE configuration

B C Vout

Vin gπ gO RC Vbe gmVbe

E AVR  0

gg0  C 1 Vout gm VVoutm in g  ARV = gm C gg0  C Vingg0  C g g 1 0 C R =  R R = r out C in π gg0  C Common Emitter Configuration Consider the following CE application

(this is also a two-port model for this CE application) RC

Common Emitter inc RC Small signal parameter domain Operating point and model parameter domain

gg0  C gg 0 C IR ARg CQC V m C A V  Vt

gg0  C 1 gg0  C RRoutC RRout C gg0  C

R = r  Vt in π R in= AVR  0 ICQ Characteristics: • Input impedance is mid-range • Voltage Gain is large and Inverting • Output impedance is mid-range • Unilateral • Widely used as a voltage amplifier Common Source/ Common Emitter Configurations

Common Emitter Common Source AVR  0 1 g 1 R  A  m R  in V0 0 g Rin  g g0 0 In terms of operating point and model parameters: V 1 VAF t VAF VAF R  R0  Rin  AV0  R0  in IIDQDQ ICQ Vt ICQ 2 VAF AV0    2 VVEBQ EBQ Characteristics: • Input impedance is mid-range (infinite for MOS) • Voltage Gain is Large and Inverting • Output impedance is large • Unilateral • Widely used to build voltage amplifiers Common Source/Common Emitter Configuration

RD RC

Common Emitter inc RC Common Source inc RD

gg0  D gg 1 1 0 C RR RR out D outC gg0  D gg0  C

gg0  D gg0  C ARV gm D ARV gm C R  R in= r π AVR  0 in In terms of operating point and model parameters:

gg gg0  D 0 C 2I R IRCQC DQ D A V  A V  Vt VEBQ

gg0  C

gg0  D RRoutC  Characteristics: RRout D  V • Input impedance is mid-range (infinite for MOS) t • Voltage Gain is Large and Inverting Rin = • Output impedance is mid-range ICQ • Unilateral • Widely used as a voltage amplifier Consider Common Collector/Common Drain Two-port Models

Common Emitter Common Source

Common Base Common Gate

Common Collector Common Drain

Will focus on Bipolar Circuit since MOS counterpart is a special case obtained by setting gπ=0 Two-port model for Common Collector Configuration

gπ gO Vbe gmVbe

Common Collector

?

i1 RiX RoX i2 B E

V1 V2 Av0r2V Av01V C

{RiX, AV0, AV0r and R0X} Two-Port Models of Basic Amplifiers widely used for Analysis and Design of Amplifier Circuits

Methods of Obtaining Amplifier Two-Port Network

i1 i2

Rin Ro V1 V2 AvRV 2 Av0V 1

1. VTEST : iTEST Method

2. Write V1 : V2 equations in standard form

Vi 1 1= IN R + AVRV 2

ViV 2 2= OV0 R 1 + A

3. Thevenin-Norton Transformations

4. Ad Hoc Approaches Two-port model for Common Collector Configuration

i1 i2

gπ g Vbe O V1 gmVbe V2 Common Collector

Applying KCL at the input and output node, obtain Standard Two-Port Amplifier Representation

i1 i2 ig 1VV 1 2   R iX R AvRV 2 Av0V 1 oX V1 V2 iggggg221 mom VV 

These can be rewritten as VV112iARiX VR

VV112i rπ VV221iARoX V

V : V equations in standard form  1 ggm   1 2 ViV221  gmomo g   gg  g g It thus follows that

1 ggm   R =r A 1 A V0  iX π VOr= R0X   gmo g g gmo g g  Two-port model for Common Collector Configuration

i1 i2

gπ g Vbe O V1 gmVbe V2

Common Collector

Two-port Common Collector Model i1 Rix RoX i2 B E

V1 V2 Av0r2V Av0V 1 C

1 1 R0X   RiX=rπ gmo g g gm gg A 1 m  VOr= A V0   1 gmo g g Common Collector Configuration

VDD Consider the following CC application

C VOUT B VIN RE Determine Rin, R0, and A V Vin E Vout (this is not asking for a two-port model for the CC Common Collector application – Rin and AV defined for no additional load RE on output, Ro defined for short-circuit input)

VSS

i1 i2 Rix RoX Vout B E V in R V1 V2 E Av0rV 2 Av0V 1 C

if gmE g ggoxmmomm gg g gg  gg AV = A= V0  1 gggggggggox E  mo  mo  E  mo  E m gggggg E

ggEo rgm g  g o  g E g0X R =rr + βR V= iV R A A in gg ππ Egg in 1 ix v0r v0 in 1 m  oE g0X +g E gm g  g o  g E

ggmE 11RE 1 R0  = = gm +g E +g 0 +gπ g m +g E 1+g m R E gm Common Collector Configuration

VDD Consider the following CC application VOUT C B VIN RE

(this is not asking for a two-port model for the CC Vin E Vout

application, – Rin and AV defined for no additional RE Common Collector load on output, Ro defined for short-circuit input -)

VSS Alternately, this circuit can also be analyzed directly

iin

gπ gO V1 gmV1 VOUT

Vin RE

VVoutmEinmgggggg 0    VVVoutEinmggggg01 g  gmm g IRCQ E AV   VVVinout 1 gm g E g0  g g m  g E ICQ R E +V t

iVing m g  g E  g00  g in g E  g  iing  V in V out 

ggEo gm g  g o  g E Rin= rπ  rπE +βR ggoE Common Collector Configuration

VDD Consider the following CC application VOUT C B VIN RE

(this is not asking for a two-port model for the CC Vin E Vout

application, – Rin and AV defined for no additional RE Common Collector load on output, Ro defined for short-circuit input -)

VSS

iin

gπ gO V1 gmV1 iout gπ gO V1 gmV1 VOUT VOUT Vin RE RE

To obtain R0, set Vin  0

iout VV out g Em g0 out g   g  

gg 1 Eo1 Rout =  gm g  g o  g E gm Common Collector Configuration

VDD

Consider the following CC application VOUT C B VIN RE (this is not asking for a two-port model for the CC Vin E Vout application, – Rin and AV defined for no additional RE load on output, Ro defined for short-circuit input -) Common Collector

VSS

g  gmm g IRCQ E AV    1 Question: Why are gm g E  g0  g g m  g E ICQ R E +V t these not the two-port parameters of this ggEo ggggmoE Rrin= + rπ  πEβR circuit? ggoE • Rin defined for open-circuit gg on output instead of short- 1 Eo1 Rout =  circuit (see previous slide : -2 ggggmoE gm slides)

• AV0r ≠0

i1 Rix RoX i2 B E

V1 V2 Av0rV 2 Av0V 1 C Common Collector Configuration VDD

C For this CC application VOUT B

VIN RE (this is not a two-port model for this CC application) Vin E Vout

Common Collector RE

VSS Small signal parameter domain Operating point and model parameter domain ifgg  gg mE IRV   m IRCQE CQEt AV   1 AV   1 ggggmE 0  IR+VCQEt

I RV gg CQ Et Eo R  βR Rrin +  πEβR inE

I RV gR1 CQEt V R mE 1 t E R0  R0  ICQ 1+gmE R gm Characteristics: • Output impedance is low

• AV0 is positive and near 1 • Input impedance is very large • Widely used as a buffer

• Not completely unilateral but output-input transconductance (or AVr) is small and effects are generally negligible though magnitude same as AV Common Collector/Common Drain Configurations For these CC/CD applications (not two-port models for these applications)

VCC VDD VOUT

D VOUT C G B VIN RD VIN RE Vin S Vout Vin E Vout R Common Collector S Common Drain RE VSS

VEE if g g gm mS gg ifgg  A  A   m mE V  1 V  1 gmS g g0 ggggmE 0  R  ggEo in Rr+in  πEβR gR1 R mS 1 gR1 S mE R  RE 1 0 R0  1+gmS R gm 1+gmE R gm In terms of operating point and model parameters: IRV CQEt  2IRDQS ICQEt RV if 2IRV  IR V A  DQEBQS A  CQE  1 R  t V 2IR +V V IR+V 0 DQSEBQ  1 CQEt ICQ 2I R V VRVDQ S EBQ R EBQ S EBQ I RV 0 CQ Et VEBQ +2I DQ R S 2I DQ RinE  βR

• Output impedance is low • Widely used as a buffer

• AV0 is positive and near 1 • Not completely unilateral but output-input • Input impedance is very large transconductance is small Consider Common Base/Common Gate Two-port Models

Common Emitter Common Source

Common Base Common Gate

Common Collector Common Drain

Will focus on Bipolar Circuit since MOS counterpart is a special case obtained by setting gπ=0 Two-port model for Common Base Configuration

gπ gO Vbe gmVbe

Common Base

?

i1 RiX RoX i2 E C V 1 A V V2 Av0rV 2 v0 1 B

{RiX, AV0, AV0r and R0X} Two-Port Models of Basic Amplifiers widely used for Analysis and Design of Amplifier Circuits

Methods of Obtaining Amplifier Two-Port Network

i1 i2

Rin Ro V1 V2 AvRV 2 Av0V 1

1. VTEST : iTEST Method

2. Write V1 : V2 equations in standard form

Vi 1 1= IN R + AVRV 2

ViV 2 2= OV0 R 1 + A

3. Thevenin-Norton Transformations

4. Ad Hoc Approaches Two-port model for Common Base Configuration i1 i2

gπ gO V1 Vbe gmVbe V2

Common Base

From KCL

iVVVV111201ggg   m Standard Form for Amplifier Two-Port

i i2 iVVV22101 ggm 1   Vi 1 1IN= R + AVRV 2 Rin Ro V1 A V A V V2 These can be rewritten as vR 2 v0 1 ViV 2 2OV0= R +1 A

 1 g0 ViV112 ggggggmm00 V1 : V2 equations in standard form 1  gm  V2  i 2  1   V 1 gg00    It thus follows that: 11 g0 ggmm 1 AVOr  A 1   R  RiX  V0 oX gm  g g0 gmm g g0 g gg00 g0 Two-port model for Common Base Configuration

i1 i2

gπ gO V1 Vbe gmVbe V2

Common Base Two-port Common Base Model

i1 Rin RoX i2 E C

V1 V2 Av0rV 2 Av0V 1 B

11 R  ggmm iX AV0 1   gmm g g0 g gg00 gg00 AVOr  1 gmm g g0 g RoX  g0 Common Base Configuration

Consider the following CB application VDD (this is not asking for a two-port model for this CB RC VOUT application - – Rin and AV defined for no load on Vout output, Ro defined for short-circuit input ) C VIN RC B VBB E

Common Base Vin

i i2 1 RiX RoX Vout E C Vin V1 V RC Av0rV 2 Av0V 1 2 B

RC gmm g0  g 00  g g AV = A V0    gmRC RC +R 0X gg000  g gC g  C V iVR +A RiX gg0  C 1 in 1 iX V0r out Rin=  Rin = = 1-AV0r A V gC  gm  g  g00  g g gm ii 1 1 RC Rout  Rout R C //R 0X 1+g0C R Common Base Configuration

VDD Consider the following CB application VOUT RC (this is not asking for a two-port model for this CB Vout application – R and A defined for no load on output, in V C VIN RC B Ro defined for short-circuit input ) VBB E

Common Base Vin

Alternately, this circuit can also be analyzed directly i1 i2 V B C out

gπ gO R Vin V1 Vbe gmVbe V2 C

E

By KCL at the output node, obtain ggm  0 gC00m0in +g=VV g +g  A =  gR V g  g m C By KCL at the emitter node, obtain C 0 g0C +g 1 iVV1= g m0 +g inout +g   g0 Rin=  gCm g +gπ +g 0 +g π g 0 gm RC RRout C Rout R C //r 0 1+g0C R VDD

Common Base Application VOUT RC (this is not a two-port model for this CB application) Vout VIN RC C B VBB E

Common Base Vin

IR A  gR A  CQC V mC V V 1 t Vt Rin  R  g in m ICQ R <

• AV0 is large and positive (equal in mag to that to CE) • Input impedance is very low • Not completely unilateral but output-input transconductance is small Common Base/Common Gate Application

(these are not a two-port models) VDD

VDD

R VOUT V D RC OUT

Vout VOUT D VIN RD C VIN RC B G VBB V E GG S

Vin Common Base Common Gate Vin

1 R<

Characteristics: • Output impedance is mid-range

• AV0 is large and positive (equal in mag to that to CE) • Input impedance is very low • Not completely unilateral but output-input transconductance is small The three basic amplifier types for both MOS and bipolar processes

Common Emitter Common Source

Common Base Common Gate

Common Collector Common Drain • Have developed both two-ports and a widely used application of all 6 • A fourth structure (two additional applications) is also quite common so will be added to list of basic applications

RC RD

VOUT VOUT

M1 M1

VIN VIN

RE RS

CE with RE CS with RS Common Emitter with Emitter Resistor Configuration Application

(this is not a two-port model for this CE with RE application)

VDD

R C RC Vout Vout C B

E Vin Vin gπ gO Vbe gmVbe RE VE

VEE RE By KCL at two non-grounded nodes

VVoutCm gggg VV00  in- EE

VVVVVE g E g00  g  in- E gm  g out  g in

Vout -gm g E +g 0 gπC R AV = - V ing C g m +g C g 0 +gπ +g E +g 0 g π +g E R E Common Emitter with Emitter Resistor Configuration Application

(this is not a two-port model for this CE with RE application)

VDD

R C RC Vout Vout C B

E Vin Vin gπ gO Vbe gmVbe RE VE

VEE RE RC A-V  RE It can also be shown that

Rin  rπE +βR

RRout C

Nearly unilateral (is unilateral if go=0) Common Emitter with Emitter Resistor Configuration Application

(this is not a two-port model for this CE with RE application)

VDD

RC RC V A- out V R C E B

E Vin Rin  rπE +βR

RE RRoutC

VEE (this is not a two-port model)

Characteristics:

• Analysis would simplify if g0 were set to 0 in model • Gain can be accurately controlled with resistor ratios • Useful for reasonably accurate low gains • Input impedance is high (not two-port models for the four structures) Can use these equations only when small signal circuit is EXACTLY like that shown !! End of Lecture 30