Analog CMOS Subcircuits

MOS Diode/Active Resistor Current Sinks and Sources

17/04/2012 D. De Venuto 1 MOS Diode/Active Resistor

• Gate and Drain of MOS transistor are tied together • I-V characteristics are qualitatively similar to a pn-junction diode (MOS diode) • The MOS diode is used as component of a current mirror and for level translation (voltage drop).

17/04/2012 D. De Venuto 2 The I-V characteristic

• The I-V characteristics of the MOS diode are described by the large-signal equation for drain current in saturation (the connection of the gate to the drain guarantees operation in saturation region):

(1)  K'W  2 β 2 I = ID =  [(VGS −VT ) ]= (VGS −VT )  2L  2 or

(2) V = VGS = VDS = VT + 2ID / β

If V or I is given, then the remaining variable can be designed using either the equation (1) or the (2) and solving for the value of β.

17/04/2012 D. De Venuto 3 Small-signal model

• Connecting the gate to the drain means that VDS controls ID and therefore the channel transconductance becomes a channel conductance.

1 1 rout = ≅ gm + gmbs + gds gm

17/04/2012 D. De Venuto 4 Voltage division using active resistor

• An application of the MOS diode is the voltage division, where a bias voltage is generated with respect to ground. • Noting that VDS=VGS for both devices:

VDS = 2I / β +VT = VON +VT

VBIAS = VDS1 +VDS2 = 2VON + 2VT

17/04/2012 D. De Venuto 5 Current Sinks and Sources

• A current sink and current source are two terminal components whose current at any instant of time is independent of the voltage across their terminals.

• The current of a current sink or source flows from the positive node through the sink or source, to the negative node.

• A current sink typically has the negative node at VSS and the current source has the positive node at VDD.

17/04/2012 D. De Venuto 6 Current sink

• The gate is taken to whatever voltage is necessary to create the desiderate value of current. The voltage divider seen before can be used to provide this voltage.

• We note that in nonsaturation region the MOS is not a good current source. In fact, the voltage across the current sink must be larger than VMIN in order for the current sink to perform properly:

Vout ≥ VGG-VTO

17/04/2012 D. De Venuto 7 Current-voltage characteristic and output resistance • If the source and the bulk are both connected to ground, then the small-signal output resistance is given by:

-1 rout= (1+λVDS)/λlD ≈(λlD)

• Vout≤ VGG-|VTO|

17/04/2012 D. De Venuto 8 Advantages and disadvantages

• The advantage of the current sink and source is their simplicity. • However, there are two areas in which their performance may need to be improved for certain applications:

1) To increase the small-signal output resistance-resulting in a more constant current over the range of Vout values.

2) To reduce the value of VMIN, thus allowing a larger range of VOUT over which the current sink/source work properly.

17/04/2012 D. De Venuto 9 Techniques to increase the rout (1) • The small-signal output resistance can be increased using the principle of the figure.

• The principle uses the common-gate configuration to multiply the source resistance r by the approximate voltage gain of the common-gate configuration with an infinite load resistance.

17/04/2012 D. De Venuto 10

rout Evaluation (1)

• The exact small-signal output resistance rout can be calculated from the small-signal model:

rout=vout/iout=r+rds2+[(gm2+gmbs2)rds2]r≈(gm2rds2)r

where gm2rds2>>1 and gm2> gmb2

17/04/2012 D. De Venuto 11 Techniques to increase the rout (2)

• The output resistance of the current sink is increased by the common-gate voltage gain of M2

17/04/2012 D. De Venuto 12 rout Evaluation (2)

• To verify we use the small-signal output resistance of the cascode current sink.

• Since vgs2=-v1 and vgs1=0, summing the currents at the output node gives:

iout+gm2v1+gmbs2v1=gds2(vout-v1) Since v1=ioutrds1, we can solve for rout as rout=vout/iout=rds2(1+gm2rds1+gmbs2rds1+gds2rds1)= rds1+rds2+gm2rds1rds2(1+η2); being gmbs2=η2gm2 tipically gm2rds2>1 so rout=(gm2rds2)rds1. 17/04/2012 D. De Venuto 13 Relationship between the currents and the W/L of 2 equal devices

• For two transistor M1 and M2, it is assumed that the applied VGS can be divided into two parts, given as:

VGS=VON+VT

where VON is that part of VGS in excess of VT.

• This definition allows us to express the minimum value of VDS for which the device remains in saturation:

VDS(sat)=VGS-VT=VON

Then in saturation the current can be written:

2 ID=K’W/2L*(VON)

17/04/2012 D. De Venuto 14 Then if the currents of two MOS are equal (because they are in series) then the following relations holds:

K'1W1 2 K'2 W2 2 (VON1) = (VON 2) L1 L2 W1 2 W2 2 If both the transistors are the same type (VON1) = (VON 2) L1 L2 Or W1 L (V )2 1 = ON 2 2 W2 (V ) ON1 L2 The principle above can be used to define a relationship between the currents: W2 W1 I D1 = I D2 17/04/2012 D. De LVenuto2 L1 15 • This relation is useful even though the gate-source terminals of M1 and M2 may not be physically connected because voltages can be identical without being physically connected.

17/04/2012 D. De Venuto 16 Constant output current • The other performance limitation of the simple current sink/source was the fact that the constant output current could not be obtained for all values of vout.

• While this problem may not be serious in the simple current sink/source, it becomes more severe in the cascode current- sink/source configuration that was used to increase the small- signal output resistance.

• It becomes necessary to reduce VMIN.

• Obviously, VMIN can be reduced by increasing the value of W/L and adjusting the gate-source voltage to get the same output current.

17/04/2012 D. De Venuto 17 Cascode current sink

• Our objective is to use the above principle to reduce the

value of VMIN.

17/04/2012 D. De Venuto 18 Standard cascode current sink

If we ignore the bulk effect of M2 and M4 & assume M1=M2=M3=M4, I.e. all matched and same W/L

Then the their VGS is given by:

VGS=VT+VON

At the gate of M2 the voltage respect the power supply is:

2VT+2VON

To be in saturation VD>VG-VT

VD2(min)=VMIN=VT+2VON.

17/04/2012 D. De Venuto 19 • The resulting current-voltage relationship

VMIN is dropped across both M1 and M2. The drop across M2 is VON while the drop across M1 is VT+ VON. From the demonstration before results that we can still reduce VMIN by VT and still keep both M1 and M2 in saturation!

17/04/2012 D. De Venuto 20 High-swing cascode

• The W/L of M4 is made one-quarter of the identical W/L ratios of M1 and M3. • This causes that the gate – source voltage across M4 to be

VT+2VON rather than VT+VON.

• Consequently the voltage at the gate of M2 is now VT+2VON and then from the relationship seen before:

VD2(min)=VMIN=2VON

17/04/2012 D. De Venuto 21 17/04/2012 D. De Venuto 22 Problems of the High-swing cascode

• The VDS of M1 and the VDS of M3 are not the same. Therefore the current iout will not be an accurate replica of IREF due to channel length modulation as well as drain- induced threshold shift.

• A possible solution is to add an additional transistor M5 in series with M3 so as to force the drain voltages of M3 and M1 to be equal, thus eliminating any errors.

17/04/2012 D. De Venuto 23 Improved high-swing cascode

17/04/2012 D. De Venuto 24 17/04/2012 D. De Venuto 25 17/04/2012 D. De Venuto 26 17/04/2012 D. De Venuto 27 Exercise

• Use the cascode sink configuration to design a current sink of 250 uA and VMIN of 0.5V. K’n=110uA/V^2

17/04/2012 D. De Venuto 28