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The LT1167: Single Resistor Sets the Gain of the Best Instrumentation Amplifi er – Design Note 182 Alexander Strong and Kevin R. Hoskins

Introduction 0.14% accuracy. At very high gains (≥1000), the error Linear ’s next generation LT®1167 instru- is less than 0.2% when using 0.1% precision resistors. mentation amplifi er uses a single resistor to set gains Low Input Bias Current and from 1 to 10,000. The single gain-set resistor eliminates The LT1167 combines the pA input bias current of expensive resistor arrays and improves V and CMRR OS FET input amplifi ers with the low input noise voltage performance. Careful attention to and characteristic of bipolar amplifi ers. Using superbeta layout, combined with laser trimming, greatly enhances input , the LT1167’s input bias current is only the CMRR, PSRR, gain error and nonlinearity, maximiz- 350pA maximum at room temperature. The LT1167’s ing application versatility. The CMRR is guaranteed to low input bias current, unlike that of JFET input op be greater than 90dB when the LT1167’s gain is set at amps, does not double for every 10°C. The bias cur- 1. Total input offset voltage (V ) is less than 60μV at a OS rent is guaranteed to be less then 800pA at 85°C. The gain of 10. For gains in the range of 1 to 100, gain error low noise voltage of 7.5nV√Hz at 1kHz is achieved by is less than 0.05%, making the gain-set resistor toler- idling a large portion of the 0.9mA supply current in ance the dominant source of gain error. The LT1167’s the input stage. gain nonlinearity is unsurpassed when compared to other monolithic solutions. It is specifi ed at less than Input Protection 40ppm when operating at a gain of 1000 while driving The inputs of the LT1167 feature low leakage internal a 2kΩ load. The LT1167 is so robust that it can drive protection connected between each input and 600Ω loads without a signifi cant linearity penalty. These the supply pins. Their leakage is so low that they do parametric improvements result in an overall gain error not compromise the low 350pA input bias current. that remains unchanged over the entire input common These diodes are rated at 20mA when input mode range and is not degraded by supply perturbations exceed the supply rails. Precision and indestructibility or varying load conditions. The LT1167 can operate over are combined when an external 20k resistor is placed a wide ±2.3V to ±18V supply voltage range with only in series with each input. There is little offset voltage 0.9mA supply current. The LT1167 is offered in 8-pin penalty because the 320pA offset current from the PDIP and SO packages, saving signifi cant board space LT1167 multiplied by the 20k input resistors contributes compared to multi-op amp designs. less than 7μV additional offset. With the 20k resistors, As shown in Figure 1, the LT1167’s gain is set by the the LT1167 can handle both ±400VDC input faults and value of one external resistor. A single 0.1% precision ESD spikes over 4kV. This passes the IEC 1000-4-2 r e sis tor s e t s t h e g a in f r om 1 to 10, r e sul t in g in b e t t er t h a n level 2 specifi cation. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. V+ + LT1167 MONOLITHIC RG 499Ω LT1167C INSTRUMENTATION , G = 100 SUPPLY CURRENT = 1.3mA MAX –

DN182 F01 Figure 1. Combining Precision Trimmed Internal Resistors with a Single External Resistor Sets the LT1167 Gain with High Accuracy

06/98/182_conv ADC Signal Conditioning output stage can easily drive the ADC’s small nominal In many industrial systems, differential inputs are input , preserving signal integrity. Figure 3 used to eliminate ground loops and reject noise on shows two FFTs of the amplifi er/ADC’s output. Figures long lines. The LT1167 is shown in Figure 2 changing 3a and3b show the results of operating the LT1167 at a differential signal into a single-ended signal. The unity gain and a gain of ten, respectively. In both cases, single-ended signal is then fi ltered with a passive 1st the typical SINAD is 70.6dB. ® order RC lowpass fi lter and applied to the LTC 1400 12-bit analog-to-digital converter (ADC). The LT1167’s Figure 4 shows a simple, accurate, low program- 5V

10μF 10μF mable current source. The differential voltage across

+ + pins 2 and 3 is mirrored across RG. The voltage across 0.1μF 0.1μF RG is amplifi ed and applied across R1, defi ning the 5V 0.1μF output current. For example, opening RG and setting R1 3 1 equal to 1M sets the output current range from 30pA 3 VREF VCC + 7 5 DOUT to 10μA for an input voltage of 0V to 10V. The bottom 1 1k 2 6 SERIAL R1 LT1167AIN LTC1400 CLK 8 INTERFACE of the range is limited by circuit noise. The circuit can 5 C 7 CX ONV – 4 2 GND VSS be operated as a current source or sink by applying a 0.1μF

4 8 positive or negative differential voltage, respectively. + 10μF The 50μA bias current fl owing from the REF pin (Pin 5) 0.1μF –5V AV = 1 R1 = ∞ CX = 0.047μF –5V is buffered by the LT1464 JFET operational amplifi er, DN182 F02 AV = 10 R1 = 5.6kΩ CX = 0.030μF increasing the resolution of the current source to 3pA. Figure 2. The LT1167’s Dynamic Performance Allows It to V Convert Differential Signals into Single-Ended Signals for S + 3 7 the 12-Bit LTC1400 VIN + R1 V 8 6 + X RG LT1167 – 0 1 SUPPLY VOLTAGE = ±5V – 5 fIN = 3kHz VIN – –20 2 4

fSAMPLE = 400ksps I SINAD = 70.6dB – L –40 LT1167 GAIN = 1 –VS

LT1464 –60 + +– V ()VVGIN– () IN I ==X [] –80 L AMPLITUDE (dB) R11R LOAD G =+49.Ω 4k 1 RG –100 DN182 F4a (a) –120 0 25 5075 100 125 150 175 200 –2 10 + FREQUENCY (kHz) DN182 F03a V = 15V – 10–3 V = –15V (a) RG = ∞ 10–4 0 SUPPLY VOLTAGE = ±5V 10–5 fIN = 5.5kHz R1 = –20 –6 fSAMPLE = 400ksps 10 1k SINAD = 70.6dB 10–7 10k –40 LT1167 GAIN = 10 10–8 100k LOAD CURRENT (A) –60 10–9 1M

10–10 10M AMPLITUDE (dB) –80 10–11 10–4 10–3 10–2 10–1 110 –100 + – INPUT VOLTAGE (VIN – VIN ) (V) DN182 F04b –120 (b) 0 25 5075 100 125 150 175 200

FREQUENCY (kHz) DN182 F03b (b) Figure 4. (a) A Simple, Accurate, 3pA Resolution, Low Power Programmable Current Source and (b) Current Figure 3. These Plots Show the Results of Operating Source’s Output is Linear over 8 Decades the LT1167 at Unity Gain (a) and a Gain of 10 (b), Respectively. Each Indicates a Typical SINAD of 70.6dB

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