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A New Simulated Inductor with Reduced Series Resistor Using a Single VCII±

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A New Simulated Inductor with Reduced Series Resistor Using a Single VCII± electronics Article A New Simulated Inductor with Reduced Series Resistor Using a Single VCII± Erkan Yuce 1, Leila Safari 2, Shahram Minaei 3, Giuseppe Ferri 2 , Gianluca Barile 2 and Vincenzo Stornelli 2,* 1 Department of Electrical and Electronics Engineering, Pamukkale University, Denizli 20160, Turkey; [email protected] 2 Department of Industrial and Information Engineering, University of L’Aquila, 67100 L’Aquila, Italy; [email protected] (L.S.); [email protected] (G.F.); [email protected] (G.B.) 3 Department of Electrical and Electronics Engineering, Dogus University, Istanbul 34775, Turkey; [email protected] * Correspondence: [email protected] Abstract: This paper presents a new realization of a grounded simulated inductor using a single dual output second-generation voltage conveyor (VCII±) as an active building block, two resistors and one grounded capacitor. The main characteristic of the proposed circuit is that the value of the series resistor can be significantly reduced. Thus, it has the property of improved low-frequency performance. Another feature is the use of a grounded capacitor that makes the proposed circuit attractive for integrated circuit (IC) realization. A simple CMOS implementation of the required VCII± is used. However, a single passive component-matching condition is required for the proposed structure. As an application example, a standard fifth-order high-pass ladder filter is also given. SPICE simulations using 0.18 µm CMOS technology parameters and a supply voltage of ±0.9 V as well as experimental verifications, are carried out to support the theory. Citation: Yuce, E.; Safari, L.; Minaei, Keywords: simulated inductor; low-series resistor; VCII; voltage conveyor; high-gain VCII; current- S.; Ferri, G.; Barile, G.; Stornelli, V. A New Simulated Inductor with mode; ladder filter; band-pass filter Reduced Series Resistor Using a Single VCII±. Electronics 2021, 10, 1693. https://doi.org/10.3390/ electronics10141693 1. Introduction Inductors are analog passive components that play an essential role in many ana- Academic Editor: Christos Volos log and mixed-signal circuits. Due to the large occupation of area and the low-quality factor of spiral inductors, designers prefer to substitute them with simulated inductors Received: 10 June 2021 (SIs) [1–49]. SIs are constructed using a few active elements, resistors and one capacitor, Accepted: 12 July 2021 and exhibit characteristics of inductance within a specified frequency range. They find Published: 15 July 2021 wide applications in the design of active filters, oscillators, phase shifters, etc. SIs using various kind of active devices offer some advantages such as the capability for integra- Publisher’s Note: MDPI stays neutral tion, low area, high quality factor, operation in a wide frequency range, etc. However, with regard to jurisdictional claims in grounded SIs [1–49] have the following problems. Some of the grounded SIs [1,2] use oper- published maps and institutional affil- ational amplifiers (OAs); therefore, they suffer from slew-rate limitations. Other grounded iations. SIs [1–10,12–14,19,21,31,33,34,39,48,49] employ more than one active building block (ABB). The grounded SI configurations described in [1,2,6,11,12,15–20,24–28,35,37,39,43–47] in- clude a floating capacitor that is not suitable for integrated circuit (IC) fabrication. The grounded SI proposals in [17,22,24–30,36,38,42,45,46] contain complex internal structures. Copyright: © 2021 by the authors. Other grounded topologies [40–46] are made up of non-standard active devices. Finally, Licensee MDPI, Basel, Switzerland. the grounded SI architectures reported in [9,23,30–35,37] have a capacitor connected to a This article is an open access article low-impedance terminal or consist of an operational transconductance amplifier (OTA); distributed under the terms and accordingly, their high-frequency performances are limited [50,51]. conditions of the Creative Commons A literature survey revealed that, in recent years, the current-mode (CM) approach Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ has been widely used in the SI design [1–17,20–22,24–29,36,38–49]. The main reason is 4.0/). the potential of the CM signal processing with its low-voltage nature and high-frequency Electronics 2021, 10, 1693. https://doi.org/10.3390/electronics10141693 https://www.mdpi.com/journal/electronics Electronics 2021, 10, 1693 2 of 15 operation, etc. [52,53]. Recently, a new CM active building block called second-generation voltage conveyor (VCII) [54–56] has been used in the implementation of high-performance grounded immittance-function simulators [48,57]. This new block is the dual circuit of the more famous second-generation current conveyor (CCII). The difference between CCII and VCII is that, unlike VCII, CCII lacks a low-impedance voltage output port. This feature enables VCII-based circuits to benefit from advantages of processing signals in the current domain while producing output signals in voltage form. Therefore, VCII is suitable for all applications requiring output signal in the form of voltage. The results reported in [54–56] reveal that VCII-based circuits outperform conventional circuits in many aspects. For instance, achieved simulated impedances in [48,57] are robust against process mismatches and temperature variations while their power consumption is reduced, when compared to the other reported work. The latter feature comes from the very simple internal structure of the used ABB, i.e., VCII. The maximum operation frequency range and parasitic series impedance of the VCII-based grounded SI reported in [48] are 2.5 MHz and 191 W, respectively. It also employs two ABBs. Here, we aim to design a VCII-based grounded SI with improved performance that uses only one ABB. The proposed circuit is based on one dual-output VCII (VCII±) as ABB, two resistors and one grounded capacitor. The most important feature of the new implementation is that the value of series impedance is considerably reduced by adjusting resistor values. Hence, it has the property of improved low-frequency performance. It employs only a grounded capacitor that results in easy integration in the IC process. In addition, the frequency range is extended to 10 MHz. Additionally, complete circuit analysis and SPICE simulation results are reported. As an application example, a fifth- order high-pass (HP) ladder filter is presented. Nevertheless, there is a simple matching condition which can be easily satisfied. Fortunately, this matching condition is also useful in setting the value of parasitic series resistance to the desired value. The promising results through the SPICE simulation program and experimental verifications show that VCIIs are highly suitable in the SI applications. Compared to the grounded SI based on the negative- impedance converters (NICs) of [49] which employ two active elements, two resistors and one grounded capacitor, the realized inductor value is four times lower than the one extracted from the proposed circuit for the same values of the capacitor and resistors. The organization of this paper is as follows. In Section2, VCII ± and the proposed SI are introduced and analyzed. The non-ideal analysis is performed in Section3. Simulation results are reported in Section4. Experimental verifications are presented in Section5. Finally, Section6 concludes the paper. 2. The Proposed Circuit Figure1 shows the symbolic presentation and internal structure of the VCII ± without a Z− port. It has a low-impedance current input Y terminal, two high-impedance current output X+ and X− terminals and one low impedance voltage output terminal, Z+. It simply consists of a current buffer (CB) and a voltage buffer (VB). The input current is transferred from the Y terminal to the X+ terminal in the same direction and the X− terminal in the opposite direction. The voltage at the X+ terminal is transferred to the Z+ terminal. The VCII± demonstrated in Figure1 is described as: 2 3 2 3 IX+ 0 0 b 2 3 VX+ 6 IX− 7 6 0 0 −h 7 6 7 = 6 74 VX− 5 (1) 4 VY 5 4 0 0 0 5 IY VZ+ a 0 0 Electronics 2021, 10, x FOR PEER REVIEW 3 of 16 Electronics 2021, 10, x FOR PEER REVIEW 3 of 16 Electronics 2021, 10, 1693 3 of 15 (a) (b) Figure 1. VCII± without Z− port: (a) symbolic presentation (b) internal structure. The proposed VCII±-based SI is shown in Figure 2. Simple analysis shows that, in the case of ideal VCII (negligible contribution of parasitic impedances), the input impedance of the proposed SI is evaluated by () = + − (2) In above equation, if R2 = R1 = R is chosen, the following input impedance is obtained: () = (3) One observes from Equation (3) that a positive lossless grounded SI is obtained. If non-ideal(a) gains are considered, Equation (2) turns(b) to: Figure 1. VCII±Figure without 1. VCII Z−± port:without (a)Z symbolic− port: (a) symbolicpresentation presentation (b) internal (b) internal structure. structure. + + (1−) () = (4) In Equation (1), b and h, being current gains, are ideally equal to one and two, The proposed respectively.VCII±-based Additionally, SI is shownα, beingin Figure voltage 2. gain,Simple is ideally analysis equal shows to unity. that, in the case of ideal VCII (negligibleTheFrom proposed Equationcontribution VCII± (4),-based of quality parasitic SI is shown factor impedances), in Figure(Q) for2. Simple equivalent the analysis input inductance impedance shows that, in is the found as of the proposed SI caseis evaluated of ideal VCII by (negligible contribution of parasitic impedances), the input impedance of the proposed SI is evaluated by = (5) () = + − + (1−) (2) Zin(s) = sCR1R2 + R1 − R2 (2) In above equation, if R2 = R1 = R is chosen, the following input impedance is obtained: R1 () = (3) One observes from Equation (3) that a positive lossless grounded SI is obtained.
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