On-Chip Spiral Inductors for Silicon-Based Radio-Frequency Integrated Circuits

http://holst.stanford.edu/~CPYue [email protected]

C. Patrick Yue Center for Integrated Systems Stanford University, CA http://holst.stanford.edu/~CPYue [email protected] Outline

20M 36% Annual Growth (7%) (Source: CTIA, 1996.) Asia Pacific North America 5M 80M (27%) (6%) 125M (41%)

Asia Pacific North America 19M (22%) 38M (43%) Europe Europe 75M (25%) 25M (29%)

1996 Total: 87M 2000 Total: 300M http://holst.stanford.edu/~CPYue [email protected] A Typical Cellular Phone

RF front-end component count: Inductor 11 Capacitor >100 Resistor >50 IC 5 Transistor 12 Crystal 1 Filter 2

(Source: Bosch, 1997.) http://holst.stanford.edu/~CPYue [email protected] Advantages of Integration • Cost: assembly and packaging • Power: fewer parasitics • Design Flexibility: signals stay on chip •Size • Reliability • Tolerance http://holst.stanford.edu/~CPYue [email protected] Discrete Inductors

• L: 2 to 20 nH (2 to 10%)

• Q: 50 to 200 (1 to 2 GHz)

inch • srf: 4 to 10 GHz mm (Source: Coilcraft, 1997.) http://holst.stanford.edu/~CPYue [email protected] Active Inductors

i 1 -gm 1 i in • Excess Noise + + C v vin c • Extra Power g – m 2 – i2 • Limited Linearity

C L = ------gm1gm2 http://holst.stanford.edu/~CPYue [email protected] Bond Wire Inductors • Predictability • Unwanted Couplings

• Repeatability • Limited Inductance

(Source: ISSCC’95, pp. 266) http://holst.stanford.edu/~CPYue [email protected] A Typical Planar Spiral Inductor

Number of Turns

Outer Dimension Spacing Width http://holst.stanford.edu/~CPYue [email protected] Multilevel Interconnects

(Source: Semiconductor International, 1997.) http://holst.stanford.edu/~CPYue [email protected] A Typical Inductor On Silicon

Al SiO2 Si 3 µm

3D Perspective View

Top View http://holst.stanford.edu/~CPYue [email protected] Model Description

Cs Csi Cox Rsi Ls

Rs http://holst.stanford.edu/~CPYue [email protected] Model Description

Ls Rs

Cox Cox

Rsi Csi Csi Rsi http://holst.stanford.edu/~CPYue [email protected] Model Description Physical Model of Inductor on Silicon Effects L : Greenhouse Method Mutual s Couplings ρ ⋅ l Eddy Rs = ------–t⁄δ- w ⋅δ ⋅()1e– Current R ε C s 2 ox Feed-Through ox ⋅⋅------C C s =nw Capacitance s tox M1-M2 1 ε Oxide R C L ⋅⋅ ⋅ox si si s Cox =-- l w ------Capacitance 2 tox 1 Si Substrate C =-- ⋅⋅l wC ⋅ si 2 Sub Capacitance 2 Si Substrate R = ------si ⋅⋅ Ohmic Loss l wGSub http://holst.stanford.edu/~CPYue [email protected] Skin Effect

Co-axial

E Field Current

Conductor Microstrip http://holst.stanford.edu/~CPYue [email protected] Effective Metal Thickness

Current t Density - x / δ t = ∫ e ⋅ dx eff 0 J 0 - t / δ =δ ⋅()1e–

Actual Metal 0 t Thickness http://holst.stanford.edu/~CPYue [email protected] Measurement Setup

HP 8720B Open Structure

P P G R R G S O O S G B B G E E Device Under Test

Probe Station http://holst.stanford.edu/~CPYue [email protected] Parameter Extraction Procedure S to Transmission De-embedded Matrix Conversion S Parameters S S 11 12 → AB S21 S22 CD

Solve for Propagation Constant ( Γ ) and Characteristic Impedance ( Z0 ) coshΓl Z sinhΓl AB 0 = CD –1 Γ Γ Z0 sinh l cosh l

R 2Z0 s Γ⋅⋅ ------= = l Z0 Γ ⋅ l Rp Cp Cs Ls http://holst.stanford.edu/~CPYue [email protected] Measured and Modeled Values of Ls and Rs

10 25 R C s ox C 8 20 s R C L si si s ) 6 15 ) H Ω n ( (

s s R L 4 10 Copper 2 5 Aluminum (Cs =28fF) 0 0 Model 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Substrate Modeling

C ox 2Z0 R C = ------p p Γ ⋅ l R C si si

Physical Model Extracted Capacitance and Resistance http://holst.stanford.edu/~CPYue [email protected] Measured and Modeled Values of Rp and Cp

R 25 250 C s ox C s 20 200 R C L

) si si s

Ω 15 k 150 ( (fF)

p p C R 10 100 Copper 5 50 Aluminum 0 0 Model 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Definition of Inductor Quality Factor

ω V cos t R 0 s

R C C L p p s s

Peak Magnetic Energy– Peak Electric Energy π------Q2= Energy Loss in One Oscillation Cycle ω L R 2 () s p R s C p + C s ------× ------×1 – ------–ω 2 L ()C + C R []()ω ⁄ 2⋅s p s s R p +L s R s +1Rs Ls

Substrate Loss Factor Self-Resonance Factor http://holst.stanford.edu/~CPYue [email protected] Measured and Modeled Value of Q

6 Q 4 Copper 2 Aluminum 0 Model 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Measured and Modeled Values of Substrate Factors

1.0 1.0 r r o o t t c c a a 0.8 0.8 F F

e s c s n o 0.6 0.6 a L

n e o t s a r

0.4 0.4 e t R s - f b l

u Copper 0.2 0.2 e S S Aluminum 0.0 0.0 Model 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Comparison to Published Results

10 Line Width 5 5 µm 9 µm Q Predicted by Our Model Q Predicted by 14 µm 0 µ 0 5 10 15 20 19 m 24 µm Measured Qpeak presented by Ashby et al. http://holst.stanford.edu/~CPYue [email protected] Effect of Metal Scheme on Q

8 R C s ox C s 6 R C L si si s

Q 4 3 levels of 1 µm in parallel 2 3 µm Al 2 µm Al 0 1 µm Al 0.1 1 10 Frequency (GHz) Model http://holst.stanford.edu/~CPYue [email protected] Effect of Oxide Thickness on Q

8 R C s ox C s 6 R C L si si s

Q 4

6.5 µm Oxide 2 4.5 µm Oxide 2.5 µm Oxide 0 Model 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Effect of Substrate Resistivity on Q

8 R C s ox C s 6 R C L si si s

Q 4 10 Ω-cm Si: × -3 µ 2 Csub = 1.6 10 fF/ m 2 × -8 µ 2 Gsub = 4.0 10 S/ m 6 Ω-cm Si: × -3 µ 2 Csub = 6.0 10 fF/ m 0 G = 1.6×10-7 S/µm2 0.1 1 10 sub Frequency (GHz) Model http://holst.stanford.edu/~CPYue [email protected] Effect of Layout Area on Q

8 R C s ox C s 6 R C L si si s

Q 4 Outer Dimension Line Width 2 550 µm, 41 µm 400 µm, 24 µm 0 300 µm, 13 µm 0.1 1 10 Frequency (GHz) Model http://holst.stanford.edu/~CPYue [email protected] Application of Model

1 f = ------C L C 2π LC⋅

, → f C = 1.6 GHz C1.2= pF L= 8 nH

fC Circuit Requirements L ? Inductor Design with Area (Design Tool) Optimal Q Technology Substrate Constraints Factors http://holst.stanford.edu/~CPYue [email protected] Contour Plots of Q

Measured Q Measured Q 1.7 3.4 2.9 4.6 10 0.6 GHz 1.0 GHz 8 1 1 6 3 3 4 5 5 Inductance (nH) 2 7 9 0 0 100 200 300 400 0 100 200 300 400 Outer Dimension (µm) Outer Dimension (µm) http://holst.stanford.edu/~CPYue [email protected] Contour Plots of Q

Measured Q Measured Q 4.0 5.2 6.1 4.0 10 1.6 GHz1 4 3.0 GHz 1 4 8 3 2 5 4 6 5 4 7 7 Inductance (nH) 9 2 9

0 0 100 200 300 400 0 100 200 300 400 Outer Dimension (µm) Outer Dimension (µm) http://holst.stanford.edu/~CPYue [email protected] Outline

• Overview • A physical model for on-chip inductors • Effects of process and layout parameters • Design methodology • Inductors with patterned ground shields • Substrate noise coupling • Conclusions http://holst.stanford.edu/~CPYue [email protected] Overview • Challenges - Q degraded by substrate loss - Substrate coupling - Modeling and characterization - Process constraints • Approaches - Etch away Si substrate - Patterned Ground Shield http://holst.stanford.edu/~CPYue [email protected] Suspended Inductors

Wafer Backside Polyimide Membrane ~550 µm http://holst.stanford.edu/~CPYue [email protected] Electromagnetic Fields of Conventional On-Chip Inductors

Csi Cox E Rsi Ls Rs http://holst.stanford.edu/~CPYue [email protected] Problems with Solid Ground Shield

Induced Loop Current and Magnetic Field http://holst.stanford.edu/~CPYue [email protected] EM Fields of On-Chip Inductors with Patterned Ground Shield http://holst.stanford.edu/~CPYue [email protected] Patterned Ground Shield Design • Pattern - Orthogonal to spiral (induced loop current) • Resistance - Low for termination of the electric field Ground Strips - Avoid attenuation of Slot between Strips the magnetic field Induced Loop Current http://holst.stanford.edu/~CPYue [email protected] Effect of Aluminum Ground Shields on L

8 Patterned 6 Solid (nH)

s None L 4 (19 Ω-cm) 2 None (11 Ω-cm) 0 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Effect of Aluminum Ground Shields on R

20 Patterned

) 15 Solid Ω ( s None R 10 (19 Ω-cm) 5 None (11 Ω-cm) 0 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Effect of Aluminum Ground Shields on C

300

250 Patterned 200 Solid

(fF) 150 p None C 100 (19 Ω-cm) 50 None (11 Ω-cm) 0 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Effect of Polysilicon Ground Shields on L

6 Patterned

(nH) Solid s

L 4 Patterned 2 Aluminum

0 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Effect of Polysilicon Ground Shields on R

) 15 Patterned Ω (

s Solid

R 10 Patterned 5 Aluminum

0 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Effect of Polysilicon Ground Shields on C

300 250 200 Patterned

(fF) 150

p Solid C 100 Patterned Aluminum 50 0 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Circuit Models of On-Chip Inductors

Csi Cox Cox Rsi Ls Ls Rs Rs

Conventional Design With Patterned Ground Shield http://holst.stanford.edu/~CPYue [email protected] Effect of Aluminum Ground Shields on Q

6 Patterned Solid

Q 4 None (19 Ω-cm) 2 None (11 Ω-cm) 0 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Effect of Polysilicon Ground Shields on Q

6 Patterned

Q 4 Solid Patterned 2 Aluminum

0 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] Parallel LC Resonator at 2 GHz

1.50 fC Q = ----- Zmax at fc RESONATOR ∆f ) 1.25 ~30% Ω 1.00 ∆f C L 0.75

0.50

Magnitude of Z (k Magnitude of Patterned 0.25 Polysilicon 0.00 1.0 1.5 2.0 2.5 3.0 None Ω Frequency (GHz) (11 -cm) http://holst.stanford.edu/~CPYue [email protected] Noise Coupling Measurement

HP 8720B P G R S O G B E P R G O S B G E

Probe Station http://holst.stanford.edu/~CPYue [email protected] Effect of Polysilicon GS on Isolation

-40

-50 Patterned -60 None Ω | (dB) (19 -cm)

21 -70 |s None (11 Ω-cm) -80 Probes up -90 0.1 1 10 Frequency (GHz) http://holst.stanford.edu/~CPYue [email protected] A Single-Chip CMOS GPS Receiver http://holst.stanford.edu/~CPYue [email protected] Conclusions • A compact model for spiral inductors on silicon has been presented. • Physical phenomena important to limitation and prediction of Q were investigated. • Effects of various structural parameters on Q have been demonstrated. • The scalable model can be used as a design tool for optimizing Q. http://holst.stanford.edu/~CPYue [email protected] Conclusions on Patterned Ground Shield • Improves Q by eliminating substrate loss (up to 33% at 1-2 GHz) • Improves isolation by preventing substrate coupling (up to 25 dB at 1 GHz) • Simplifies modeling • Eliminates substrate dependency • Requires no additional process steps http://holst.stanford.edu/~CPYue [email protected] Acknowledgments

• Center for Integrated Systems Industrial Sponsors • National Science Fundation (MIP-9313701) • National Semiconductor FMA Fellowship (Dr. G. Li) http://holst.stanford.edu/~CPYue [email protected] Acknowledgments

• Prof. Simon Wong • Prof. Dwight Nishimura, Prof. Krishna Saraswat, and Prof. Robert Dutton • Prof. Calvin Quate • Prof. Tom Lee • Rosanna Foster and Ann Guerra • CIS and SNF Staff Members • Friends • Family