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IJEE 1830

Int. J. Engng Ed. Vol. 22, No. 1, pp. 000±000, 2006 0949-149X/91 $3.00+0.00 Printed in Great Britain. # 2006 TEMPUS Publications.

Using Embedded Emulation and Trimming to Demonstrate Measurement Methods and Associated Model Development*

PHILLIP A.M.SANDBORN AND PETER A.SANDBORN CALCE Electronic Products and Systems Center, Department of Mechanical Engineering, University of Maryland, College Park, MD, USA.E-mail: [email protected] Embedded are planar resistors that are fabricated inside printed circuit boards and used as an alternative to discrete resistor components that are mounted on the surface of the boards.The successful use of embedded resistors in many applications requires that the resistors be trimmed to required design values prior to into printed circuit boards.This paper describes a simple emulation approach utilizing conductive paper that can be used to characterize embedded resistor operation and experimentally optimize resistor trimming patterns.We also describe a hierarchy of simple modeling approaches appropriate to both college engineering students and pre-college students that can be verified with the experimental results, and used to extend the experimental trimming analysis.The methodology described in this paper is a simple and effective approach for demonstrating a combination of measurement methods, uncertainty analysis, and associated engineering model development. Keywords: embedded resistors; embedded passives; trimming

INTRODUCTION process that starts with a layer pair that is pre- coated with resistive material that is selectively EMBEDDING PASSIVE components (capaci- removed to create the resistors.The layer contain- tors, resistors, and possibly ) within ing the resistor is laminated together with other printed circuit boards is one of a series of technol- layers to make the finished . ogy advances enabling performance increases, size One significant factor governing the applicabil- and weight reductions, and potentially cost advan- ity of embedded resistors is their tolerance level. tages in the of electronic systems The tolerance to which a resistor can be fabricated [1].Figure 1 shows a comparison of surface mount determines the applications for which it can be and embedded resistors. used and potentially affects its impact on the yield Multilayer printed circuit boards are fabricated of the product.While discrete surface mount starting with layers that are plated on resistors can be pre-sorted by value, or even both sides with .Application-specific replaced during assembly when their value is not conductor patterns are created on each side of within the required range, embedded resistors the dielectric using a photosensitive resist and provide no such opportunity and must be within to remove the unnecessary copper.These design tolerance value before the board fabrication patterned `layer pairs' are stacked with a B-stage process is completed.Therefore, embedded resis- between them and laminated using high tors, depending on their method of fabrication and temperature and pressure.Holes can be drilled the application for which they are used, may be and plated in the laminated stack to create vertical `trimmed' to the desired value after they are connections.[Note, there are many printed circuit fabricated.To allow for trimming, embedded board fabrication process and material variations, resistors are designed to have a resistance value e.g., [2]. The process described here is one simpli- that is lower than that needed by the application. fied approach.] Embedded resistors (also called Trimming is then accomplished by cutting holes integral resistors) are fabricated by or into the resistor in order to increase its resistance printing a resistive material onto a layer that will value. be part of a printed circuit board (additive Embedded resistors are normally trimmed using process), or alternatively, using a subtractive a to micromachine a trough in the resistive element, [3].The length and path-shape of the trough determine the characteristics of the resis- tance change obtained.Several different path- * Accepted 18 May 2006. shapes can be used depending on the specific

1 2 P.A.M.Sandborn and P.A.Sandborn

Fig.1. Surface mount and embedded resistors. trimming requirements.As the laser cuts the resistance' (in per square), and L, W, and trough, the resistor value is measured and used T are the length, width, and thickness of the as feedback to control the trimming process. resistor.Therefore, for a constant aspect ratio Unfortunately, laser trimming equipment is expen- (L/W), a small planar resistor (dimensions in the sive and the process of trimming potentially repre- thousands of the inch) has the same resistance sents a throughput bottleneck in the board characteristics as a large area planar resistor fabrication process.Trimming has been identified (dimensions of inches), and trimming of small as one possible impediment to the widespread use resistors can be emulated using large area resistors. of embedded resistors [4, 5]. To emulate planar embedded resistors, we used This paper describes a simple methodology for conductive paper purchased from PASCO Scien- experimentally assessing embedded resistor trim tific (Model PK-9025).This type of paper is patterns that can be supplemented with the devel- usually used for tracing lines of equipotential and opment and verification of simple models that can electric fields, and comes in 8.5  11 inch pages be used to extend the experimental results.The with a centimeter grid printed on it.Prior to work described herein has been successfully used exploring trimming of the resistors, each page of by both pre-college high school students and paper is cut to the desired resistor shapeÐin our within an undergraduate case approximately 1 cm was removed from all the curriculum for college-level mechanical and elec- edges of the pages and the remaining page is cut in trical engineering students.Students are motivated half to create two 28  10 cm resistors.In order to by being able to work on a topic that is at the measure the resistance, metal clamps are placed on forefront of electronic systems design and fabrica- the ends of the resistor and an is tion, yet conceptually simple enough so as not to attached to the clamps via alligator clips, Fig.2. defeat their limited knowledge of physics and Students make an initial set of measurements on a engineering.The experiment and modeling single piece of paper by assembling the test setup, described in the paper provides students with an measuring, and disassembling the test setup, then understanding of resistance, resistance measure- repeating the process 10±15 times.The first thing ments, experimental uncertainty analysis, the en- noticed is that the resistance of the conductive gineering model development and verification paper varies from page-to-page.In order to make process, and the use of models to extend experi- the measurements from different pages compar- mental results. able, a page-specific `normalization' must be deter- mined.In order to normalize a page's mean resistance to 65 k ,65k was divided by the EMULATING EMBEDDED RESISTORS mean resistance from the initial measurements for the page to obtain a scaling factor, then each For a constant sheet resistance (ohms per measurement from that page of paper (as it is square), the resistance of a planar resistor does trimmed) is first multiplied by the scaling factor not change with size (i.e., length or width) as long before comparison with other pages.[For the 28  as the ratio of length to width (`aspect ratio') is 10 cm resistors suggested, 65 k was found to be constant, the approximate average resistance value over   many pages of conductive paper and was therefore L L  L L used as the normalization .] R ˆ ˆ ˆ ˆ R ; 1† A TW T W W The way that the page measurements are normalized adjusts for page-to-page variation in where  is the bulk resistivity, A is the cross- resistance due to variations in the sheet resistance sectional area of the resistor, R is the `sheet (R) but does not affect variations in the contact to Using Embedded Resistor Emulation and Trimming to Demonstrate Measurement Methods 3

).Students can also check to see if effects are significant by switching the ohmmeter connection and determining if there is any significant change in the resistance measured.In our experience, thermocouple effects, if present, are smaller than the measurement uncertainty.[The thermocouple effect is due to the thermal emf generated by the change in the temperature at the junction of the conductive paper and the contacts on each end, which form .If the temperature at both ends of the resistor is the same, the thermal emfs will cancel and the resistance measured is the same, regardless of the way the meter is connected.If the temperature at one end is different from the other than the measured resistance will differ when the meter connections are switched.] Fig.2. Experimental setup. the conductive paper or other series resistance effect within the measurement path.Variations in RESISTOR TRIMMING: the sheet resistance could be due to thickness EXPERIMENTAL RESULTS variations in the conductive coating or moisture absorption by the paper.Variations in the Once the baseline measurements are made on a measurement path are quantified as measurement page of paper and the page-specific normalization uncertainties. determined, the pages are ready for trimming. Figure 3(a) shows the distribution of normalized Several different types of trimming patterns can measured resistance when the clamps are attached be explored, Fig.4.The trim patterns are created directly to the conductive paper.Students discover using scissors or a razor blade to cut one square that when contacts are added to the ends of the centimeter from the paper at a time and measuring conductive paper using a thin strip (approximately the resulting resistance.By varying the length and 0.3 cm wide) of conductive silver paint, the location of the trim, the example results shown in measurement error can be reduced from a 6.6% Fig.5 can be obtained.The plots show the (4.3 k ) standard deviation to 0.9% (0.59 k ) progression that the resistance makes as the standard deviation (Fig.3(b)).The silver contacts length of the trim increases.Figure 5(a) shows make the measurement less sensitive to where the the trimming results for a Single-Dive trim pattern. clamp was placed, and the pressure with which the The results indicate that, regardless of location, the clamp is applied. resistance is the same for all cases until the trim Several physical effects on the resistance length exceeds four centimeters.However, if the measurement can also be explored including the length of the trim exceeds four centimeters, then a of resistance (TCR).The trim near the edge will result in more resistance TCR can be found by measuring the resistance of increase.Figure 5(b) shows the trimming results the paper at different temperatures.The slope of for an L-Cut.For the example shown in Fig.5(b), the temperature versus resistance relation allows resistors were trimmed so that the trim changed students to draw conclusions about the type of direction after three or six centimeters.The change material used to coat the conductive paper (e.g., a of direction can be seen on this graph when the negative slope indicates that the material is a slope of the line changes.Figure 5(c) shows a

Fig.3.Distribution of normalized resistance measurements with and without conductive silver contacts.The mean of both distributions is 65 k . 4 P.A.M.Sandborn and P.A.Sandborn

Simple pre-calculus models Students can construct a hierarchy of simple models based on summing resistors in series.An evolution of models used to model the single-dive trim is shown in Fig.6.The shape of each series resistor is determined by assuming the current path.Variables in the models are the lengths and widths of the resistor, the location and length of the trim, and the number of rectangles used in the model.For example, the formulations for a single- dive are given by,

R ˆ R1 ‡ R2 ‡ R3; 2† Fig.4. Example trimming patterns that can be considered. which becomes comparison of trimming results of several trim- Model 1: ming patternsÐthe single-dive, the double-dive, x x x R ˆ R 1 ‡ R 2 ‡ R 3 3a† the L-Cut, and a random trim.The patterns W W À D W varied in shape as well as location, and the results are illustrated in the graph. Model 2: 2 3 x1 Xn 6 7 RESISTOR TRIMMING: MODELING R ˆ R 6 n7 4 D 2i À 1 5 iˆ1 W À One advantage of using embedded resistor trim- n 2 ming as an engineering educational tool is that a x ‡ R 2 hierarchy of simple models can be developed that W À D readily match actual experimental trimming 2 3 results.The modeling methodology presented in x3 this paper has been used for both pre-college (pre- Xm 6 7 ‡ R 6 m7; 3b† calculus) students and college engineering students 4 D 2i À 1 5 iˆ1 W À making use of their respective mathematical m 2 levels.

Fig.5. Resistance as a function of the total trim length for (a) Single-Dives, (b) L-Cut and (c) a selection of different trimming types. Using Embedded Resistor Emulation and Trimming to Demonstrate Measurement Methods 5

Fig.6. Evolution of models.The bottom right shows a contour plot of equipotential lines in a Single-Dive trimmed resistor (only the potentials of points internal to the resistor are shown).

will find that Model 1 under predicts the resistance Model 3: and that Model 2 over predicts the resistance, 2 3 Fig.7(a).To develop a better model, students x 1 can apply a current across a trimmed resistor and x Xn 6 7 R ˆ R 1 ‡ R 6 2n7 use the ohmmeter to probe the potential as a 2W 4 D 2i À i 5 iˆ1 W À function of location within the trimmed resistor. n 2 By creating a contour plot showing lines of equi-  potential (Fig.6) models similar to Model 3 can be x2 ‡ R inferred.[Equipotential lines connect a set of W À D 2 3 points for which the potential difference (or x3 ) is a constant value.The potential differ- Xm 6 7 x3 ence can be determined by placing a voltage source ‡ R 6 2m7 ‡ R 4 D 2i À 1 5 2W across the resistor, connecting one end of a - iˆ1 W À m 2 meter to the grounded end and measuring the voltage at each point in the resistor (the PASCO 3c† paper has a 1 centimeter grid pre-printed on it that can be used to define measurement points).The where n and m are the number of rectangles on direction of the electric field is always perpendi- either side of the trim, R ˆ 65/(28/10) ˆ 23.21 k / cular to equipotential lines and its strength at and the other variables in (3) are defined in Fig.6. various points in the resistor can be inferred Students formulate the models themselves and from the distance between the equipotential lines.] implement the models on a spreadsheet.Students Model 3 assumes a uniform current flow across

Fig.7. Modeling results: (a) Model 1, 2, and 3 results compared with experimental measurements for a centered single-dive trim; (b) Model 3 results for L-cut trimming. 6 P.A.M.Sandborn and P.A.Sandborn the resistor for the first half of the distance between trims are shown on Fig.5(c)) yields a slightly the contact and the trim, then the effective cross- lower rate of resistance increase.Both the sectional area decreases linearly to the resistor's single-dive and double-dive trims are ideal for thinnest point.Figure 7(a) shows that Model 3 quickly (with a minimum of trim length) does a good job of fitting the single-dive trimming approaching a high target resistance, i.e., one experimental results.In Fig.7(b), Model 3 is that is considerably higher than the initial applied to L-cut trims.Figure 7(b) shows a range resistance of the resistor.However, if there is of cases where the depth of the initial portion of a risk of trimming errors, i.e., trimming too the trim is varied.In this case, the model is used to much or too far, then the single- and double- extend the experimental results and produce a dive trim patterns may not be preferred since family of results for various values of z. the rate of change of the resistance near the end of the trim is large.Trimming errors can occur More advanced models due to material inconsistencies, i.e., if a void in College-level engineering students who have a the embedded resistor material is encountered calculus background are expected to construct during the trimming process, the resistance models that are more sophisticated.For example, value may `jump' when the trimming trough the formulation corresponding to Model 2 is given reaches it.The risk of material inconsistencies by depends on the particular process used to create the embedded resistor.[One method of - R ˆ R1 ‡ R2 ‡ R3 ing embedded resistors (that have been over  trimmed) is to print conductive ink on the x1 dx x ˆ R ‡ R 2 surface of the embedded resistor thus adding a D W À D 0 W À x lower value resistor that effectively x1 `trims down' the resistor value, [6].]

x3 dx 2.The `L-cut' trim pattern has different character- ‡ R ; 4† D istics, in that the rate of increase changes when 0 W À x the trim changes direction.As the initial trim is x3 made (perpendicular to the current flow in the which reduces to resistor), the resistance steadily increases as it would for a single-dive trim, but when the trim hix ‡ x w x changes direction to become parallel to the R ˆ R 1 3 ln ‡ 2 : 5† D W À D W À D current flow, the rate of resistance increase slows (see Fig.5(b) ).The `L-cut' trim pattern Students are expected to check their formulation is ideal for balancing quick trimming with low by demonstrating that the model in (3b) limits to risk. the model in (5) when n and m become large. Detailed numerical models of resistor trimming exist (e.g., [7±9]) but are generally too advanced DISCUSSION for pre-college and undergraduate college students to obtain educational value from, therefore, simple This paper describes an experiment coupled with models of the sort suggested herein are more model development that is attractive to students reasonable for educational purposes.Students are because of its simplicity, open-ended nature, and able to use the simple models to confirm that the relevance to state-of-the-art electronic systems characteristics they are observing experimentally design and fabrication.Even given its simplicity, are in fact not artifacts of the measurement several findings clearly emerge. process, but actually the effects they are trying to 1.Different trimming patterns result in varying measure.Many other trim variations and locations rates of resistance increase and/or final resis- can be experimented with and the simple models tance.For example, a `single-dive' produces a suggested herein can be modified and applied to high rate of resistance increase, i.e., the `single- other trimming patterns. dive' trim pattern would be acceptable if reach- Emulating embedded resistor trimming is an ing a target resistance was desired in a short effective for introducing both pre-college amount of time.The `double-dive' trim pattern and college students to simple measurements shown in Fig.4 (specific results for double-dive coupled with engineering modeling.

REFERENCES

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4. Passive Components Technology Roadmap, National Manufacturing Technology Road- maps, NEMI, Inc.(2000). 5.P.Sandborn,An assessment of embedded resistor trimming and rework, IEEE Trans.on Electronics Packaging Manufacturing, 28(2), 2005, pp.176±186. 6. V.G.Shah and D.J.Hayes, Trimming and printing of embedded resistors using demand-mode ink- jet technology and conductor polymer, Proceedings of the Technical Conference IPC Printed Circuits Expo, March (2002), pp.S14-4-1 to S14-4-5. 7.B.Postlethwaite, CAD simulations improve resistor trimming results, Hybrid Circuits, June 1984, pp.100±105. 8.J.Ramirez-Angulo, R.L.Geiger and E.Sanchez-Sinencio, Characterization, evaluation, and comparison of laser-trimmed film resistors, IEEE J.of Solid-State Circuits , SC-22(6), 1987, pp.1177±1189. 9.K.Schimmanz and A.Kost, Trim simulations of resistors by the boundary element method (BEM), Proceedings of the Conference on the Computation of Electromagnetic Fields 2COMPUMAG), (July 2003).

Phillip Sandborn is a high school student at Wilde Lake High School in Columbia, Maryland.The work reported in this paper was performed as a science fair project in 2004 and later adapted for use in an undergraduate course at the University of Maryland. Phillip continued working on trimming embedded resistors in 2005 studying novel trimming patterns using experimental and simulation results.

Peter A. Sandborn is an Associate Professor in the Department of Mechanical Engineering at the University of Maryland, College Park.He received a BS degree in engineering physics from the University of Colorado, Boulder, and a MS degree in electrical science and Ph.D. degree in , both from the University of Michigan, Ann Arbor.His research interests include technology tradeoff analysis for electronic packaging, system life cycle economics, electronic part obsolescence and virtual qualification of electronic components and systems.Prior to joining the University of Maryland, he was a founder and Chief Technical Officer of Savantage, Austin, TX, and a Senior Member of Technical Staff at the and Technology Corporation, Austin.He is the author of over 100 technical publications and books on multichip module design and part obsolescence forecasting.Dr Sandborn is on the Editorial Board of the International Journal of Performability Engineering and is an Associate Editor for the IEEE Transactions on Electronics Packaging Manufacturing.