• What Are the Different Bias Regions in MOS Capacitors? • What Do The

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Things you should know when you leave… Key Questions ECE 340 • What are the different bias Lecture 33 : MOS Capacitor I regions in MOS capacitors? • What do the electric field and Class Outline: electrostatic potential look like? • What is the Debye length? •Ideal MOS Capacitor • What does the capacitance look like as a function of bias? M.J. Gilbert ECE 340 – Lecture 33

Ideal MOS Capacitor Ideal MOS Capacitor

Last time, we discussed the basic operation of the MOSFET… And how it operates as we vary VD… +++++++++++++ ++++ +++++++++++++ ++++ Pinch off

VD ------

Depletion Region Channel Region Depletion Region Channel Region •When the barrier region is sufficiently • reduced, then a current flows from the With VD swept in small positive increments, the channel merely acts like a resistor and the drain current is proportional to the drain voltage. source to the drain. VG •Past a few tenths of a volt of bias, the voltage drop from the source to the •As we put more positive charge on the gate, more holes are repelled depleting drain associated with current flow begins to negate the inverting effect of the the concentration near the surface and populating it with electrons. gate. •The point in the gate voltage sweep when significant current begins to flow is •Channel carriers begins to decrease leading to a reduction in the channel the threshold voltage, VT. conductivity. This is due to the electron flow not being through the channel but a •This corresponds to the point when the channel is formed under the gate. larger region about the drain. •Were we to have made a PNP device the application of a negative VG would repel •Drain current is said to be in saturation as changes in VD produce no changes electrons and attract hole forming a channel. in ID. M.J. Gilbert ECE 340 – Lecture 33 M.J. Gilbert ECE 340 – Lecture 33

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Ideal MOS Capacitor Ideal MOS Capacitor

But we saw that the operation in most regimes was controlled by the Remember all of the components… channel… The channel of a MOSFET is an example of a MOS capacitor… What is the structure of a MOS capacitor? •Heavily doped polycrystalline Si film as the gate electrode material. •N-type for “n-channel” Let’s start with the ideal situation, Ф • Charges only exist at the surface M transistors (NMOS). = ФS of the metal. •P-type for “p-channel” • We assume that there are no transistors (PMOS). charges or dopants located in the •SiO 2 as the gate dielectric oxide region. •Band gap = 9 eV. • We cannot achieve thermal Useful for: •Relative dielectric constant εr = equilibrium through the oxide •Digital and analog logic 3.9. layer. •Memory functionality •Si as the semiconductor material. • To achieve thermal equilibrium we need to use a wire to connect •Imaging (CCD) and displays (LCD) •P-type for n-channel devices. •N-type for p-channel devices. the metal to the semiconductor. M.J. Gilbert ECE 340 – Lecture 33 M.J. Gilbert ECE 340 – Lecture 33

Ideal MOS Capacitor Ideal MOS Capacitor

Let’s now apply a negative gate voltage to our MOS capacitor… Now apply a positive gate voltage… 1 dE • Applying a negative gate voltage E(x) = i q dx • Deposition of positive charge deposits negative charge on the on the gate requires metal. compensation by negative • We expect to see this charge charges in the semiconductor. compensated by a net positive • The negative charge in a p- charge on the semiconductor. type semiconductor arises • The applied negative voltage from the depletion of holes depresses the potential of the from the surface. metal. • This leaves behind Increased electron • As a result the electron uncompensated ionized concentration

energies are raised in the metal Ei −EF acceptors. relative to the semiconductor. kbT What happens if we keep increasing p = nie • The bands bend downward the amount of positive gate voltage • Moving EFM up causes a tilt in near the semiconductor More holes accumulate at we apply to the metal relative to the oxide bands and the surface (EI closer to EF). semiconductor bands the surface of the the semiconductor? semiconductor.

M.J. Gilbert ECE 340 – Lecture 33 M.J. Gilbert ECE 340 – Lecture 33

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Ideal MOS Capacitor Ideal MOS Capacitor

When V is large enough, the surface is bulk What other physical information can G qφF = EI − EF inverted. we obtain from this structure?

The n-type surface that forms as a result Electron and hole concentrations are of the applied electric field is the key to related to the potential… transistor operation! EF −EI −qφF kbT kbT • Define a potential qφS which n =n e =n e determines how much band 0 i i bending there is at the surface. We then know the electron (hole) • When qφS = 0 we are in flat band concentration at any x… condition. −q(φF −φ ) qφ • kbT kbT Electrons When qφS < 0 we have hole n =n0 e =n0 e accumulation at the surface. −qφ • k T When qφS > 0 we have electron b Holes k T ⎛ N ⎞ p = p0e accumulation at the surface. φ INV = 2φ = 2 b ln⎜ A ⎟ • When qφ > qφ we have S F ⎜ ⎟ S F q ⎝ ni ⎠ inversion at the surface. But we still need the potential, how do we get it? k T ⎛ N ⎞ Total Charge Density • Surface should be as strongly INV 2 2 b ln⎜ D ⎟ n-type as the body is p-type. φS = φF = ⎜ ⎟ Poisson Equation q ⎝ ni ⎠ M.J. Gilbert ECE 340 – Lecture 33 M.J. Gilbert ECE 340 – Lecture 33

Ideal MOS Capacitor Ideal MOS Capacitor

Use Poisson equation and total charge density to get the total charge… So what does the surface charge density look like? Substitute in our knowledge of carrier concentrations and we get… Use Gauss’ Law to find the 2 ⎡ −qφ qφ ⎤ Integrate from the bulk (where ∂ φ ∂ ∂φ q ⎛ k T ⎞ ⎛ k T ⎞ charge: ⎛ ⎞ ⎜ b ⎟ ⎜ b ⎟ Qs = −ε sξs = ⎜ ⎟ = − ⎢ p0 e −1 − n0 e −1 ⎥ ∂x2 ∂x ∂x ε ⎜ ⎟ ⎜ ⎟ the bands are flat, there are no ⎝ ⎠ S ⎣⎢ ⎝ ⎠ ⎝ ⎠⎦⎥ electric fields, and the doping • At φs = 0 there is no Electric Field alone sets the carrier space charge. • concentrations) towards the When φs is negative we dφ accumulate majority holes dx φ ⎡ −qφ qφ ⎤ surface… ⎛ ∂φ ⎞ ⎛ ∂φ ⎞ q ⎛ k T ⎞ ⎛ k T ⎞ at the surface. d ⎢ p ⎜e b 1⎟ n ⎜e b 1⎟⎥d ∫⎜ ⎟ ⎜ ⎟ = − ∫ 0 − − 0 − φ • When φ is positive ⎝ ∂x ⎠ ⎝ ∂x ⎠ ε S ⎜ ⎟ ⎜ ⎟ s 0 0 ⎣⎢ ⎝ ⎠ ⎝ ⎠⎦⎥ initially the linear term in the electric field solution We now integrate and examine the result at the surface (x = 0) where the dominates as a result of perpendicular electric field becomes… the exposed, immobile dopants. • Depletion extends over several hundred nm until we reach strong inversion Debye length – distance at which charge fluctuations are and the exponential field screened out to look like neutral entities. term dominates. M.J. Gilbert ECE 340 – Lecture 33 M.J. Gilbert ECE 340 – Lecture 33

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Ideal MOS Capacitor Ideal MOS Capacitor

What is the charge distribution on an inverted surface? What about the electric field and the potential?

• For simplicity, let’s assume • The electric field does not penetrate complete depletion for 0 < x < W the metal. and neutral material for x > W. • It is constant across the oxide as • Charge due to uncompensated there are no charges or impurities in acceptors is –qNaW. the oxide. • The electric field in the semiconductor • Positive charge on the metal QM is balanced by negative charge drops linearly, as we would expect. QS in the semiconductor which is the depletion layer charge • The potential is constant in plus the charge due to the the metal. QS will be inversion region QN. • It is drops linearly across the negative for an oxide (VI). n-channel giving QM = −QS = qN aW −QN • The potential is also dropped a positive VI. across the depletion region The depletion width here is exaggerated and is of the semiconductor, φ . typically only on the order of 10 nm. S

M.J. Gilbert ECE 340 – Lecture 33 M.J. Gilbert ECE 340 – Lecture 33

Ideal MOS Capacitor Ideal MOS Capacitor

Let’s explore the depletion region more… What about the capacitance of our structure? The capacitance depends From considerations based on other systems on the voltage… (p-n junction), we can use the depletion approximation to show that…

Length of depletion region MOS Capacitor is the series combination of the oxide and the voltage The depletion region grows with voltage until strong inversion is reached. dependent semiconductor So what is the maximum value of the depletion width? capacitances. Which must be driven by an applied voltage. The applied In accumulation: voltage required for strong inversion is… • The capacitance is huge. And the charge in the depletion region at strong inversion. • Structure acts like a parallel plate capacitor

Assumes negative charge at piling holes up at the surface. surface is due to depletion charge. M.J. Gilbert ECE 340 – Lecture 33 M.J. Gilbert ECE 340 – Lecture 33

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Ideal MOS Capacitor

Start increasing the voltage across the capacitor… The surface becomes depleted and the depletion layer capacitance needs to be added in…

Total capacitance:

In depletion: • Capacitance decreases as W grows until inversion is reached. 1/2 • Charge in depletion layer of MOS capacitor increases as ~ (φS) so depletion capacitance decreases as the inverse. • If signal applied to make measurement is too fast, inversion layer carriers can’t respond and do not contribute. • Slowly varying signals allow time for minority carriers to be generated, drift across depletion region, or recombine. • Majority carriers in the accumulation region respond much faster.

M.J. Gilbert ECE 340 – Lecture 33