Lecture 12: MOSFET Devices
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PN Junction Is the Most Fundamental Semiconductor Device
Fundamentals of Microelectronics CH1 Why Microelectronics? CH2 Basic Physics of Semiconductors CH3 Diode Circuits CH4 Physics of Bipolar Transistors CH5 Bipolar Amplifiers CH6 Physics of MOS Transistors CH7 CMOS Amplifiers CH8 Operational Amplifier As A Black Box 1 Chapter 2 Basic Physics of Semiconductors 2.1 Semiconductor materials and their properties 2.2 PN-junction diodes 2.3 Reverse Breakdown 2 Semiconductor Physics Semiconductor devices serve as heart of microelectronics. PN junction is the most fundamental semiconductor device. CH2 Basic Physics of Semiconductors 3 Charge Carriers in Semiconductor To understand PN junction’s IV characteristics, it is important to understand charge carriers’ behavior in solids, how to modify carrier densities, and different mechanisms of charge flow. CH2 Basic Physics of Semiconductors 4 Periodic Table This abridged table contains elements with three to five valence electrons, with Si being the most important. CH2 Basic Physics of Semiconductors 5 Silicon Si has four valence electrons. Therefore, it can form covalent bonds with four of its neighbors. When temperature goes up, electrons in the covalent bond can become free. CH2 Basic Physics of Semiconductors 6 Electron-Hole Pair Interaction With free electrons breaking off covalent bonds, holes are generated. Holes can be filled by absorbing other free electrons, so effectively there is a flow of charge carriers. CH2 Basic Physics of Semiconductors 7 Free Electron Density at a Given Temperature E n 5.21015T 3/ 2 exp g electrons/ cm3 i 2kT 0 10 3 ni (T 300 K) 1.0810 electrons/ cm 0 15 3 ni (T 600 K) 1.5410 electrons/ cm Eg, or bandgap energy determines how much effort is needed to break off an electron from its covalent bond. -
Chapter 7: AC Transistor Amplifiers
Chapter 7: Transistors, part 2 Chapter 7: AC Transistor Amplifiers The transistor amplifiers that we studied in the last chapter have some serious problems for use in AC signals. Their most serious shortcoming is that there is a “dead region” where small signals do not turn on the transistor. So, if your signal is smaller than 0.6 V, or if it is negative, the transistor does not conduct and the amplifier does not work. Design goals for an AC amplifier Before moving on to making a better AC amplifier, let’s define some useful terms. We define the output range to be the range of possible output voltages. We refer to the maximum and minimum output voltages as the rail voltages and the output swing is the difference between the rail voltages. The input range is the range of input voltages that produce outputs which are not at either rail voltage. Our goal in designing an AC amplifier is to get an input range and output range which is symmetric around zero and ensure that there is not a dead region. To do this we need make sure that the transistor is in conduction for all of our input range. How does this work? We do it by adding an offset voltage to the input to make sure the voltage presented to the transistor’s base with no input signal, the resting or quiescent voltage , is well above ground. In lab 6, the function generator provided the offset, in this chapter we will show how to design an amplifier which provides its own offset. -
Junction Field Effect Transistor (JFET)
Junction Field Effect Transistor (JFET) The single channel junction field-effect transistor (JFET) is probably the simplest transistor available. As shown in the schematics below (Figure 6.13 in your text) for the n-channel JFET (left) and the p-channel JFET (right), these devices are simply an area of doped silicon with two diffusions of the opposite doping. Please be aware that the schematics presented are for illustrative purposes only and are simplified versions of the actual device. Note that the material that serves as the foundation of the device defines the channel type. Like the BJT, the JFET is a three terminal device. Although there are physically two gate diffusions, they are tied together and act as a single gate terminal. The other two contacts, the drain and source, are placed at either end of the channel region. The JFET is a symmetric device (the source and drain may be interchanged), however it is useful in circuit design to designate the terminals as shown in the circuit symbols above. The operation of the JFET is based on controlling the bias on the pn junction between gate and channel (note that a single pn junction is discussed since the two gate contacts are tied together in parallel – what happens at one gate-channel pn junction is happening on the other). If a voltage is applied between the drain and source, current will flow (the conventional direction for current flow is from the terminal designated to be the gate to that which is designated as the source). The device is therefore in a normally on state. -
The P-N Junction (The Diode)
Lecture 18 The P-N Junction (The Diode). Today: 1. Joining p- and n-doped semiconductors. 2. Depletion and built-in voltage. 3. Current-voltage characteristics of the p-n junction. Questions you should be able to answer by the end of today’s lecture: 1. What happens when we join p-type and n-type semiconductors? 2. What is the width of the depletion region? How does it relate to the dopant concentration? 3. What is built-in voltage? How to calculate it based on dopant concentrations? How to calculate it based on Fermi levels of semiconductors forming the junction? 4. What happens when we apply voltage to the p-n junction? What is forward and reverse bias? 5. What is the current-voltage characteristic for the p-n junction diode? Why is it different from a resistor? 1 From previous lecture we remember: What happens when you join p-doped and n-doped pieces of semiconductor together? When materials are put in contact the carriers flow under driving force of diffusion until chemical potential on both sides equilibrates, which would mean that the position of the Fermi level must be the same in both p and n sides. This results in band bending: - + - + + - - Holes diffuse + Electrons diffuse The electrons will diffuse into p-type material where they will recombine with holes (fill in holes). And holes will diffuse into the n-type materials where they will recombine with electrons. 2 This means that eventually in vicinity of the junction all free carriers will be depleted leaving stripped ions behind, which would produce an electric field across the junction: The electric field results from the deviation from charge neutrality in the vicinity of the junction. -
Basic DC Motor Circuits
Basic DC Motor Circuits Living with the Lab Gerald Recktenwald Portland State University [email protected] DC Motor Learning Objectives • Explain the role of a snubber diode • Describe how PWM controls DC motor speed • Implement a transistor circuit and Arduino program for PWM control of the DC motor • Use a potentiometer as input to a program that controls fan speed LWTL: DC Motor 2 What is a snubber diode and why should I care? Simplest DC Motor Circuit Connect the motor to a DC power supply Switch open Switch closed +5V +5V I LWTL: DC Motor 4 Current continues after switch is opened Opening the switch does not immediately stop current in the motor windings. +5V – Inductive behavior of the I motor causes current to + continue to flow when the switch is opened suddenly. Charge builds up on what was the negative terminal of the motor. LWTL: DC Motor 5 Reverse current Charge build-up can cause damage +5V Reverse current surge – through the voltage supply I + Arc across the switch and discharge to ground LWTL: DC Motor 6 Motor Model Simple model of a DC motor: ❖ Windings have inductance and resistance ❖ Inductor stores electrical energy in the windings ❖ We need to provide a way to safely dissipate electrical energy when the switch is opened +5V +5V I LWTL: DC Motor 7 Flyback diode or snubber diode Adding a diode in parallel with the motor provides a path for dissipation of stored energy when the switch is opened +5V – The flyback diode allows charge to dissipate + without arcing across the switch, or without flowing back to ground through the +5V voltage supply. -
Lecture 16 the Pn Junction Diode (III)
Lecture 16 The pn Junction Diode (III) Outline • Small-signal equivalent circuit model • Carrier charge storage –Diffusion capacitance Reading Assignment: Howe and Sodini; Chapter 6, Sections 6.4 - 6.5 6.012 Spring 2007 Lecture 16 1 I-V Characteristics Diode Current equation: ⎡ V ⎤ I = I ⎢ e(Vth )−1⎥ o ⎢ ⎥ ⎣ ⎦ I lg |I| 0.43 q kT =60 mV/dec @ 300K Io 0 0 V 0 V Io linear scale semilogarithmic scale 6.012 Spring 2007 Lecture 16 2 2. Small-signal equivalent circuit model Examine effect of small signal adding to forward bias: ⎡ ⎛ qV()+v ⎞ ⎤ ⎛ qV()+v ⎞ ⎜ ⎟ ⎜ ⎟ ⎢ ⎝ kT ⎠ ⎥ ⎝ kT ⎠ I + i = Io ⎢ e −1⎥ ≈ Ioe ⎢ ⎥ ⎣ ⎦ If v small enough, linearize exponential characteristics: ⎡ qV qv ⎤ ⎡ qV ⎤ ()kT (kT ) (kT )⎛ qv ⎞ I + i ≈ Io ⎢e e ⎥ ≈ Io ⎢e ⎜ 1 + ⎟ ⎥ ⎣⎢ ⎦⎥ ⎣⎢ ⎝ kT⎠ ⎦⎥ qV qV qv = I e()kT + I e(kT ) o o kT Then: qI i = • v kT From a small signal point of view. Diode behaves as conductance of value: qI g = d kT 6.012 Spring 2007 Lecture 16 3 Small-signal equivalent circuit model gd gd depends on bias. In forward bias: qI g = d kT gd is linear in diode current. 6.012 Spring 2007 Lecture 16 4 Capacitance associated with depletion region: ρ(x) + qNd p-side − n-side (a) xp x = xn vD VD − qNa = − QJ qNaxp ρ(x) + qNd p-side −x −x n-side (b) p p x xn xn = + > > vD VD vd VD-- − qNa x < x |q | < |Q | p p, J J = − qJ qNaxp = ∆ ∆ρ = ρ − ρ qj qNa xp (x) (x) (x) + qNd X p-side d n-side (c) x n xn − − xp xp x q = q − Q > j j j 0 − qN = −qN x − −qN a − = − ∆ a p ( axp) qj qNd xn = − qNa (xp xp) ∆ = qNa xp Depletion or junction capacitance: dqJ C j = C j (VD ) = dvD VD qεsNa Nd C j = A 2()Na + Nd ()φB −VD 6.012 Spring 2007 Lecture 16 5 Small-signal equivalent circuit model gd Cj can rewrite as: qεsNa Nd φB C j = A • 2()Na + Nd φB ()φB −VD C or, C = jo j V 1− D φB φ Under Forward Bias assume V ≈ B D 2 C j = 2C jo Cjo ≡ zero-voltage junction capacitance 6.012 Spring 2007 Lecture 16 6 3. -
The Transistor, Fundamental Component of Integrated Circuits
D The transistor, fundamental component of integrated circuits he first transistor was made in (SiO2), which serves as an insulator. The transistor, a name derived from Tgermanium by John Bardeen and In 1958, Jack Kilby invented the inte- transfer and resistor, is a fundamen- Walter H. Brattain, in December 1947. grated circuit by manufacturing 5 com- tal component of microelectronic inte- The year after, along with William B. ponents on the same substrate. The grated circuits, and is set to remain Shockley at Bell Laboratories, they 1970s saw the advent of the first micro- so with the necessary changes at the developed the bipolar transistor and processor, produced by Intel and incor- nanoelectronics scale: also well-sui- the associated theory. During the porating 2,250 transistors, and the first ted to amplification, among other func- 1950s, transistors were made with sili- memory. The complexity of integrated tions, it performs one essential basic con (Si), which to this day remains the circuits has grown exponentially (dou- function which is to open or close a most widely-used semiconductor due bling every 2 to 3 years according to current as required, like a switching to the exceptional quality of the inter- “Moore's law”) as transistors continue device (Figure). Its basic working prin- face created by silicon and silicon oxide to become increasingly miniaturized. ciple therefore applies directly to pro- cessing binary code (0, the current is blocked, 1 it goes through) in logic cir- control gate cuits (inverters, gates, adders, and memory cells). The transistor, which is based on the switch source drain transport of electrons in a solid and not in a vacuum, as in the electron gate tubes of the old triodes, comprises three electrodes (anode, cathode and gate), two of which serve as an elec- transistor source drain tron reservoir: the source, which acts as the emitter filament of an electron gate insulator tube, the drain, which acts as the col- source lector plate, with the gate as “control- gate drain ler”. -
Fundamentals of MOSFET and IGBT Gate Driver Circuits
Application Report SLUA618A–March 2017–Revised October 2018 Fundamentals of MOSFET and IGBT Gate Driver Circuits Laszlo Balogh ABSTRACT The main purpose of this application report is to demonstrate a systematic approach to design high performance gate drive circuits for high speed switching applications. It is an informative collection of topics offering a “one-stop-shopping” to solve the most common design challenges. Therefore, it should be of interest to power electronics engineers at all levels of experience. The most popular circuit solutions and their performance are analyzed, including the effect of parasitic components, transient and extreme operating conditions. The discussion builds from simple to more complex problems starting with an overview of MOSFET technology and switching operation. Design procedure for ground referenced and high side gate drive circuits, AC coupled and transformer isolated solutions are described in great details. A special section deals with the gate drive requirements of the MOSFETs in synchronous rectifier applications. For more information, see the Overview for MOSFET and IGBT Gate Drivers product page. Several, step-by-step numerical design examples complement the application report. This document is also available in Chinese: MOSFET 和 IGBT 栅极驱动器电路的基本原理 Contents 1 Introduction ................................................................................................................... 2 2 MOSFET Technology ...................................................................................................... -
Photodetectors
Photodetectors • Convert light signals to a voltage or current. • The absorption of photons creates electron hole pairs. • Electrons in the CB and holes in the VB. • A p + n type junction describes a heavily doped p-type material(acceptors) that is much greater than a lightly doped n-type material (donor) that it is embedded into. • Illumination window with an annular electrode for photon passage. • Anti-reflection coating ( Si 3 N 4 ) reduces reflections. Vr (a) SiO 2 R Vout Electrode p+ Iph Photodetectors h" > E + g h e– n E + Antireflection Electrode • The side is on the order of less than a coating p W Depletion region micron thick (formed by planar diffusion ! (b) net into n-type epitaxial layer). eNd x • A space charge distribution occurs about the junction within the depletion layer. –eNa E (x) (c) • The depletion region extends x predominantly into the lightly doped n region ( up to 3 microns max) E max (a) A schematic diagram of a reverse biased pn junction photodiode. (b) Net space charge across the diode in the depletion region. Nd and Na are the donor and acceptor concentrations in the p and n sides. (c). The field in the depletion region. © 1999 S.O. Kasap, Optoelectronics (Prentice Hall) Photodetectors Short wavelengths (ex. UV) are absorbed at the surface, and longer wavelengths (IR) will penetrate into the depletion layer. What would be a fundamental criteria for a photodiode with a wide spectral response? Thin p-layer and thick n layer. What does thickness of depletion layer determine (along with reverse bias)? Diode capacitance. -
Power MOSFET Basics by Vrej Barkhordarian, International Rectifier, El Segundo, Ca
Power MOSFET Basics By Vrej Barkhordarian, International Rectifier, El Segundo, Ca. Breakdown Voltage......................................... 5 On-resistance.................................................. 6 Transconductance............................................ 6 Threshold Voltage........................................... 7 Diode Forward Voltage.................................. 7 Power Dissipation........................................... 7 Dynamic Characteristics................................ 8 Gate Charge.................................................... 10 dV/dt Capability............................................... 11 www.irf.com Power MOSFET Basics Vrej Barkhordarian, International Rectifier, El Segundo, Ca. Discrete power MOSFETs Source Field Gate Gate Drain employ semiconductor Contact Oxide Oxide Metallization Contact processing techniques that are similar to those of today's VLSI circuits, although the device geometry, voltage and current n* Drain levels are significantly different n* Source t from the design used in VLSI ox devices. The metal oxide semiconductor field effect p-Substrate transistor (MOSFET) is based on the original field-effect Channel l transistor introduced in the 70s. Figure 1 shows the device schematic, transfer (a) characteristics and device symbol for a MOSFET. The ID invention of the power MOSFET was partly driven by the limitations of bipolar power junction transistors (BJTs) which, until recently, was the device of choice in power electronics applications. 0 0 V V Although it is not possible to T GS define absolutely the operating (b) boundaries of a power device, we will loosely refer to the I power device as any device D that can switch at least 1A. D The bipolar power transistor is a current controlled device. A SB (Channel or Substrate) large base drive current as G high as one-fifth of the collector current is required to S keep the device in the ON (c) state. Figure 1. Power MOSFET (a) Schematic, (b) Transfer Characteristics, (c) Also, higher reverse base drive Device Symbol. -
Chapter 4: the MOS Transistor
Chapter 4: the MOS transistor 1. Introduction First products in Complementary Metal Oxide Silicon (CMOS) technology appeared in the market in seventies. At the beginning, CMOS devices were reserved for logic, as they offer the highest density (in gates/mm2), and the lowest static power consumption. Most high‐frequency circuitry was carried out in bipolar technology. As a result, a lot of analog functions were realized in bipolar technology. The technology development, which is driven by digital circuits (in particular by flash memories), lead to smaller and faster CMOS devices. At the beginning of the seventies, 1µm transistors length was considered short. Currently, CMOS technology with 22nm channel length is available. In the last twenty years a lot of analog circuits started to be developed in CMOS technology. In fact, the technology scaling enabled CMOS devices at higher frequencies of working, also for the analog counterpart. Today, CMOS and bipolar technologies are in competition over a wide frequency region up to 100GHz. The challenge indeed, to choice the technology that fulfills best the system and circuit requirements at a reasonable cost. Bipolar is more expensive than standard CMOS technology. Moreover, most systems and circuits are mixed signal, i.e. they include digital and analog parts. In the past, separated integrated circuits were dedicated to the analog (bipolar) and digital (CMOS) circuits. As analog circuits were also available in CMOS technology, this technology started to offer the opportunity to integrate cheap, high density and low power digital circuits, as well as analog circuits, in the same chip. This brings enormous advantages in terms of reduced costs and smaller form factors of electronic devices. -
CMOS Basics MOS: Metal Oxide Semiconductor Transistors Are Built on a Silicon
Principles of VLSI Design CMOS Basics CMPE 413 MOS: Metal Oxide Semiconductor Transistors are built on a Silicon (semiconductor) substrate. Pure silicon has no free carriers and conducts poorly. Dopants are added to increase conductivity: extra electrons (n-type) or extra holes (p-type) MOS structure created by superimposing several layers of conducting, insulating and tran- sistor-forming materials. Metal gate has been replaced by polysilicon or poly in modern technologies. There are two types of MOS transistors: nMOS : Negatively doped silicon, rich in electrons. pMOS : Positively doped silicon, rich in holes. CMOS: Both type of transistors are used to construct any gate. 1 Principles of VLSI Design CMOS Basics CMPE 413 nMOS and pMOS Four terminal devices: Source, Gate, Drain, body (substrate, bulk). SourceGate Drain Polysilicon Thin W Oxide SiO2 Source Gate Drain L nMOS n+ n+ n+ p bulk Si p substrate n+ SourceGate Drain Polysilicon SiO2 pMOS p+ p+ n bulk Si 2 Principles of VLSI Design CMOS Basics CMPE 413 CMOS Inverter Cross-Section Cadence Layer's for AMI 0.6mm technology m1-m2 contact (via) p-diffusion contact (cc) p-substrate contact (cc) (source) metal2 metal1 n-diffusion contact (cc) n-substrate contact (cc) (source) (Out) glass(insulator) VDD GND layer #3 layer #2 layer #1 p+ n+ n+ p+ p+ n+ (pactive) (drains) n-well (nwell) (nactive) p substrate (black background) n-transistor polysilicon gate (poly ) p-transistor 3 Principles of VLSI Design CMOS Basics CMPE 413 CMOS Cadence Layout Cadence Layout for the inverter on previous slide 4 Principles of VLSI Design CMOS Basics CMPE 413 MOS Transistor Switches We can treat MOS transistors as simple on-off switches with a source (S), gate (G) (con- trols the state of the switch) and drain (D).