sign in sign up
<<
Home , Transistor

Diode-connected BJT

Lecture 17-1 Current Mirrors

• Current sources are created by mirroring currents β • Example: with infinite , Io = IREF

Diff Amp VCC

I IREF o

Lecture 17-2 Current Mirrors

• Example: with finite β

Diff Amp VCC

I IREF o

• What is the other reason for IREF ¦ Io?

Lecture 17-3 Output Resistance of , R

• What is the small output resistance of this current source, and why do we care?

Diff Amp VCC

I IREF o

Lecture 17-4 Simple IREF Model

• Select R to establish the required reference current

Diff Amp VCC

I R IREF o

Lecture 17-5

• For a given Vcc, you need large R values to obtain small current! • Lagre are expensive, Widlar current source uses smaller resistor in emitter to reduce achive the same current?

VCC IoRE =VBE1- VBE2

Io R IREF VBE1=VT ln(IREF/Is)

VBE2=VT ln(Io/Is) Q1 Q2 VBE1- VBE2=VT ln(IREF/Io)

RE IoRE =VT ln(IREF/Io)

Lecture 17-6 Widlar current source vs. ordinary current mirror

• Let us say we need Io = 10µA

• Assume that for I - 1mA VBE = 0.7

VCC

I R IREF o

VCC Q Io Q1 2 R1 IREF

R Q1 Q2 E IoRE =VT ln(IREF/Io)

Lecture 17-7 Widlar current source - output resistance

• If we neglect R || re1 , base of Q2 is on ac ground

VCC vox R I Io + REF g v R r v m π e1 π rπ ro - Q1 Q2

RE RE

• Presence of RE is increases output resistance to (1+gm RE||rπ)ro. (Read Sec. 6.4 in the textbook!)

Lecture 17-8 Current Steering

• With an IREF established, steer and/or scale the reference value

V+

Io I 2I R IREF o o

Lecture 17-9 Reading IC circuit schematics

• Find a path between + power supply and - power supply which sets the reference current (very often there is only one even in a large circuit): Only VBE and resistors are in this path. • Type of will tell you the expected direction of current: npn - current sink, pnp - current source. • Identify current mirror configurations (Widlar, Wilson, etc.) and respective emitter areas. • Proceed from the reference current branch an calculate subsequent currents independently V+ V+ V+

V+

R2 R1 R IREF V+

Lecture 17-10 Beta Dependence

β • When “steered” to several points, the Io dependence on can be a problem

VCC VCC

IREF Io

Lecture 17-11 Simple Opamp Example • First stage is used to reject common mode • The 2nd diff amp and level shifting stage provide the • The input diff amp also provides the large input resistance • Why is Q6 designed to be 4x larger than Q3?

R4 VCC 2300Ω + 15V R3 3E3Ω R1 R2 20E3Ω 20E3Ω Q7

VEE -15V Q4 + Q5

Q1 Q2 VI + SIN Q8 R7 28600Ω

4x R5 R6 Q3 Q9 Q6 157E2Ω 3E3Ω

Lecture 17-12 Differential : Active Loads

• IC resistors are impractical • Active loads provide current-source-like loads, hence large small signal gains

VCC VCC

vout

+ vd _

I

VEE

Lecture 17-13 Differential Amplifiers: Active Loads

• The output in this example is single-sided, but behaves sort of differentially

• The output is a current, proportional to vd ---

VCC VCC

iout vout _ 1 iout vd Gm + + 2 vd _

I

VEE

β • Assuming infinite , what is the output current when vd = 0 ?

Lecture 17-14 Common Mode Gain

• If all of the parameter values are exactly matched to one another, and β =100, will there be any common mode gain?

VCC VCC

iout vout

I

VEE • Will there be any dc offset?

Lecture 17-15 Small Signal Gain, Gm

VCC VCC

iout

+ vd _

I

VEE

Lecture 17-16 Small Signal Gain, Gm

Lecture 17-17 Transconductance Stage of Opamp Model

• The gain of stage 1 depends on the output impedance of stage 1 and the input impedance of stage 2

_ 1 vd G –µ +1 + 2 m + vo _

stage 1 stage 2

+ + v d G v R v _ m d o1 Ri2 o2 _

Lecture 17-18 Transconductance Amplifier Voltage Gain

• Active loads are often designed to maximize Ro

stage 1 stage 2

+ + v d G v R v _ m d o1 Ri2 o2 _

Lecture 17-19