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...... PROPRIETARY VERSUS OPEN INSTRUCTION SETS

...... MOST WIDELY USED INSTRUCTION SET ARCHITECTURES (ISAS) ARE PROPRIETARY, WHILE

MUCH INNOVATION IS FACILITATED BY BEING OPEN.MIGHT HARDWARE

INNOVATION ALSO BE ACCELERATED BY ISASBEINGOPEN?THIS ARTICLE EXAMINES THIS Mark . Hill QUESTION WITH AN EDITED TRANSCRIPT OF A DEBATE FROM THE 4TH WORKSHOP ON University of ARCHITECTURE RESEARCH DIRECTIONS. Wisconsin–Madison

Dave Christie ...... An instruction set architecture tributing to virtually all of AMD’s pro- (ISA) is one of the most important interfaces cessors, including the K5, , and in a computer system because it divides soft- . He developed the for the ware from hardware. Most widely used ISAs K5, the first superscalar x86 were developed decades ago and are propriet- designed independently from . He is also David Patterson ary. This may make sense because hardware known for having co-designed the x86-64 implementations were and are mostly propri- instruction set (the 64- extensions to the University of California, etary and most software was proprietary when x86 instruction set). Currently, he is serving as these ISAs were developed. Today, however, AMD’s ARM architecture liaison. He argued Berkeley we appreciate how open source software (such in favor of proprietary ISAs. as LAMP stack) and open standards (such The second panelist was David Patterson, Joshua J. Yi as TCP/IP) can unleash competition and who holds the E.H. and M.E. Pardee Chair of creativity. Computer Science at the University of Cali- Dechert Might open ISAs accelerate the innovation fornia, Berkeley. Of all his accomplishments of , or are the lessons of and honors, most pertinent to this debate was open software not pertinent? That was the that he led the design and implementation of Derek Chiou subject of the debate Mark D. Hill moderated RISC I, an early VLSI reduced-instruction-set at the 4th Workshop on Computer Architec- computer. This research served as the founda- University of Texas at Austin ture Research Directions in June 2015. Nor- tion of the Sparc architecture. He has con- mally, a moderator is conflict free. In this case, sulted for 25 years at various Resit Sendag Hill is conflict full, because David Patterson companies, including spending a sabbatical at coadvised Hill’s PhD with Alan Smith, and Digital Equipment Corp. in 1979 working on University of Rhode Island Hill currently consults for Advanced Micro the VAX and consulting for Devices, where Dave Christie has worked for Intel for a few years on , and decades. he was the first person hired by Sun Microsys- ThefirstpanelistwasDaveChristie,a tems to develop the Sparc architecture. He is a senior fellow at AMD. He first worked for the member of both the National Academy of Control Data Corp. before moving to AMD Engineering and the National Academy of in the late 1980s. He spent two decades con- Sciences, and a Fellow of both IEEE and ......

58 Published by the IEEE Computer Society 0272-1732/16/$33.00 2016 IEEE ACM. He argued in favor of open source at least in the past decade or two—has dem- ISAs. onstrated responsible stewardship by the ISA The format of the panel was as follows: owners through the of extensions each panelist had 10 minutes to present his that have been carefully thought out from position statement, after which the modera- a benefit and need perspective, often in tor asked the panelists a few questions. consultation with others in the industry. For Finally, the floor opened up to the audience example, one cannot reasonably view SIMD to ask questions. Video of the panel is avail- instructions, 64-bit , and machine able at www.ele.uri.edu/CARD. virtualization as architectural missteps. Yes, there are occasional missteps—some things that seemed like a good idea at the time. But Dave Christie: It’s Not the ISA, It’s the the same will eventually be true of RISC-V. In Ecosystem! any case, this evolution, coupled with back- Mainstream commercial ISAs—particularly wards compatibility, keeps proprietary ISAs x86 and ARM but also Power, MIPS, and very much alive. Sparc—have served the industry well. Com- In conclusion, the strong ecosystems that mercial ISAs operate as very effective de facto developed around mainstream commercial standards; standards provide stability, stability ISAs and the underlying economics of those supports strong ecosystems, and strong ecosys- ecosystems are a formidable hurdle for any tems enable a tremendous breadth of applica- open source ISA effort that would aspire to tions. These commercial ISAs achieved a achieve parity, let alone replace them. In this critical mass of support and took on lives of vein, I have several important questions: their own not solely due to an inherent What benefits and advantages would these “architectural goodness” in the ISA; they did so open source ISAs have? How many open because of the ecosystems that have developed source ISAs do we need? Who will drive and around them and the underlying economics. participate in the development of these open Broadly speaking, the necessary conditions source ISAs? And what is the business case for an ISA to be commercially successful are for these ISAs? that it should provide the basics needed to sup- I reviewed the RISC-V specification. port the software development needs at the Overall, it is interesting, a decent effort, and present time (for example, an instruction set a clean design. It is clear that RISC-V’s archi- that can readily target, and protec- tects know what they are doing. They appear tion mechanisms and for mul- to recognize that widespread success is not titasking OS support) and be commercially going to happen overnight. RISC-V incorpo- feasible to implement. Over the years, many rates good lessons from the past, including ISAs have met these two conditions. But sim- base plus extensions. (While I have seen sug- ply meeting these conditions is not sufficient gestions that this is a new invention from to achieve the critical mass required for com- RISC-V, I disagree. x86 has had extensions mercial success. Rather, commercial success for a long time; there are software visible ID depends more on marketing, support capabil- that indicate whether an extension is ities, economics, timing, and luck than on spe- present. ARM is similarly extensible.) Finally, cific features within the ISA. Because the world it looks like a lot of fun. Designing an ISA is is full of tradeoffs, architecting the “perfect” a lot of fun and something we do not do very ISA does not ensure its commercial success. often, but it is even more fun if we actually But once an ISA achieves critical mass, the put it into wide use. huge ecosystem supporting it makes it quite So, what are the holes in RISC-V? First, I formidable. For example, we all know what think the need for it is questionable. Open happened when Intel tried to kill off x86. RISC is a similar kind of effort. Lattice ISAownersalsohavetoberesponsiveto Mico32 is a 32-bit open source RISC pro- the needs of their customer bases. As such, cessor that some people in industry are already they add extensions that make sense for their using. Why do we need RISC-V when these customer base and that will be accepted. The other ISAs are commercially accepted alterna- evolution of mainstream commercial ISAs— tives, at least in certain embedded areas? ...... JULY/AUGUST 2016 59 ......

Table 1. Standards and implementations thereof in the computing industry.

Field Standard Free, open implementation Proprietary implementation

Networking , TCP/IP Many Many Posix , FreeBSD Windows Compilers C GCC, LLVM Intel icc, ARMcc Databases SQL MySQL, PostgreSQL Oracle 12C, Microsoft DB2 Graphics OpenGL Mesa3D Microsoft DirectX Architecture None None x86, ARM

Second, a very long instruction word David Patterson: The Case for Open Source (VLIW) format appears to be an option in ISAs RISC-V. I think that this option goes a little We live in a remarkable world, one where too far and is too academic in that it is trying open source standards and open implemen- to be too many things for too many people. tations of those standards really work. They VLIW is best suited to highly specialized uses are everywhere. Given that the computing where there’s little point in standardization. industry has been revolutionized by open That said, I understand that this option may standards and open source software, why is not be under serious consideration. one of the most important interfaces—the Third, I disagree with the premise that ISA—proprietary? Table 1 illustrates this shared open-core designs, like RISC-V, shorten the time to market. It is not obvious fact. While ISAs may be proprietary for his- to me that having a of open source torical or business reasons, there is no good designs that you can pick from is faster than technical reason for the lack of free, open licensing a proprietary core, for example, an ISAs. M3 core from ARM. Dave Christie argues that ISAs do not Fourth, I disagree with the premise that matter that much because performance is due the industry needs a standardized ISA to save to the algorithms and software above that the world from proprietary ISA -in. interface, or the hardware below it. I disagree; Much has been done to improve software ISAs do matter. If they don’t matter, why is portability, and most software is ISA-agnostic the x86 ISA unsuccessful in mobile devices (as illustrated by Apple’s ISA shifts, Windows and why is the ARM ISA unsuccessful in on ARM, ISA shifts, and smart TVs datacenters? They matter because they are the that are MIPS or ARM based from the same most important interface in a computer sys- TV maker, running the same software). tem and where the hardware meets the soft- Rather than standardizing at the ISA, I ware. This fact is particularly meaningful believe that the proper place to standardize given that most of the cost of a new is the software/machine interface is with a vir- the cost to port the software to it. On the tual ISA or intermediate language. Heteroge- other hand, I agree that most of the perform- neous System Architecture (HSA) is a great ance and energy running software on a com- example of that approach.1 It is designed to puter is due to the algorithm, application support the CPU and GPU, and it targets code, , OS/runtime libraries, micro- HSAIL (HSA Intermediate Language). ISA architecture, circuit design, physical design, owners provide a finalizer that does a transla- and the fabrication , but not the ISA. tion (at build time or runtime), and com- So if the ISA does not matter that much to pilers can pass optimization information to the energy and performance, but it costs a lot it. HSAIL is currently in place for x86, to use different ones, why do we not have a ARM, and AMD GPUs, and is expected to free, open ISA that anyone can use for be applied to other kinds of accelerators. everything? ...... 60 IEEE MICRO It is not an error of omission that ISAs are Finally, proprietary ISAs are not guaran- proprietary. It is not that AMD and Intel teed to last. Rather, the ISA is tied to the for- simply forgot to make x86 open. Rather, tunes of a particular company such that if the companies with successful ISAs like ARM, company dies, it takes its ISAs with it. An IBM, Intel, and MIPS have patents on quirks excellent example of this point is Digital of their ISAs, which prevent others from Equipment Corp.; its demise terminated the using them without license. And they have Alpha and VAX ISAs. lawyers to sue you if you allegedly infringe What are the benefits of an open source their patents and/or breach your license with ISA? First, open source ISAs would produce them. Even taking a license, however, may greater innovation because more people would not protect you from lawsuits. For example, get to design them, not just the engineers at thinks the Imagination and ARM Intel, ARM, and so on. Rather, engineers GPUs violate their patents. But Nvidia is not working for both open and closed companies suing ARM; it is suing for using and researchers all over the world could design their intellectual property and Samsung for and improve them. Furthermore, as is true in using Qualcomm chips. other fields, open source means that engineers Even IBM’s Open Power is an oxymoron can share their designs, which in turn produ- because you must pay IBM to use its ISA. ces further innovation. An ARM license does not let you design an Second, sharing cores will reduce the time ARM core; it only allows you to use ARM’s to market and the cost because engineers do designs. (Only about 10 to 15 big companies not have to design the cores themselves. Cost have licenses that allow them to design custom is becoming a very important factor because versions of ARM cores.) The cost of an ARM chips for the Internet of Things must cost license is prohibitively high such that academ- less than a dollar. ics and many small companies cannot afford Third, sharing cores reduces the number to take a license. While this business model of errors because more people are looking at may be sound, licenses stifle competition and and debugging the designs. If you are afraid innovation by stopping many from designing that some government agency has inserted a and sharing their ISA-compatible cores. backdoor or kill into your chip, you Apart from the intellectual property issues, have a better chance to discover it from the there is no technical reason why an ISA should RTL itself when everybody can look at. be proprietary. First, despite the value of the Finally, for those of us in academia, like software ecosystems that grow around popular our colleagues in operating systems and com- proprietary ISAs, the owners of proprietary pilers, we can do our research on “industrial- ISAsdonotdomostofthatsoftwaredevelop- strength” platforms that will not run into ment. Rather, outsiders build almost all of the proprietary limits. For example, the lowRISC software in the ecosystem. Second, these com- effort in Cambridge is trying to produce fully panies do not have a monopoly on the experi- open hardware systems using RISC-V. ence needed to design a competent ISA. Why is this happening now? I think it is While it is a lot of work, many today can because Moore’s law is ending. More specifi- design an ISA. Third, a company that designs cally, improvements in cost and/or perform- an ISA is not the only one who can verify it. ance are not coming from the semiconductor Rather, long ago, open organizations devel- manufacturers, but they are coming from oped mechanisms to ensure compatibility architectural innovation. A lot of people with hardware standards, such as floating- believe that we are going to see a renaissance point units (IEEE 754), networking chips and in domain-specific like GPUs, (Ethernet), and I/O buses (PCIe). If DSPs, image processors, and so forth. If so, not for such organizations, open standards we do not want each type of to would not be so popular. Fourth, the most have its own ISA. By contrast, we want to use popular ISAs are not particularly clean or ele- an ISA that is standards-based, minimal, gant. For example, ARM and x86 are not con- open, unencumbered by patents, that can sidered to be exemplary ISAs; they are just run all standard software, and to which you functional and successful. can add your own coprocessors...... JULY/AUGUST 2016 61 ...... COMPUTER ARCHITECTURE

Table 2. Difference between monolithic (20th-century) and minimal modular (21st-century) instruction set architectures.

20th-century architecture 21st-century architecture

ISA hardware is the microprocessor: ISA hardware is intellectual property (IP) intended for a (SoC): Microprocessor has a complete ISA, including what will not be used in the application because we SoC will customize the ISA used for this application cannot determine the environment when hardware when hardware is built. is built. ISAs only grow over time to support the past.

Monolithic ISA microprocessors Minimal modular ISA, such as RISC-V

The difference between proprietary ISAs, Dave Christie suggested that we already labeled as “20th-century architecture” in tried the open ISA approach in the past and Table 2, and minimal modular ISAs like it failed. Perhaps surprisingly, I agree. Twenty RISC-V, labeled “21st-century architecture,” years ago, had an open is where the ISA is intended to run. In a version of Sparc, and 15 years ago, there was 20th-century architecture, the ISA is bundled another effort based on Deluxe (DLX). Why into the hardware. As such, I call these did these efforts not catch on? I think that “monolithic ISA microprocessors.” In this they were simply too early. They were intro- architecture, a company like Intel designs the duced in the monolithic microprocessor era, ISA and gives you the chip. This microproc- and there was no business need for it. By con- essor has to run anything and everything. As trast, the era of minimal modular ISAs for such, it cannot shrink; it will only enlarge SoCs may embrace open source ISAs. over time. For example, the x86 ISA has Dave Christie opined that there’s been gained an average of two new instructions a good stewardship by proprietary ISAs. Again, I month for each of the past 40 years. disagree. For example, 10 years ago, Intel tried In a 21st-century architecture, the ISA to foist the architecture on everyone. should be intended for a SoC. The SoC will The only reason it did not work is because normally customize to the application, so it there was a second source, AMD, which is a knows what software it is running. I called rarity for proprietary ISAs. Nevertheless, the this approach “minimal modular ISA,” an industry wasted billions of dollars and compa- example of which is RISC-V. nies went out of business all because Intel tried Inanutshell,thebaseRISC-VISAhasa to force everyone to use a new ISA. ARM is minimal number of instructions, less than 50, doingthesamethingrightnow.It’sforcingthe and it supports three different address sizes; 32, industry to use the ARMv8 ISA. But in this 64, and 128 bits. If you want the standard case, there is no second source. extensions, you add integer multiply and I have spent a lot of time analyzing the divide; atomic memory operations; and single, ARMv8 ISA, and while it is gigantic—the double, and quad floating-point instructions. ARMv8 manual is 5,400 pages long—it is RISC-V also supports smaller instruction sizes still missing things. For example, while it has (16-bit and 32-bit). The key difference between more than a thousand instructions, it does monolithic and modular ISAs is that in the lat- not have 16-bit instructions, so the code size ter, software runs just on the base. You can add is very large, even bigger than x86. As such, or subtract instructions and the rest of the running the code will result in higher instruc- software will still work. Finally, RISC-V has tion miss rates. To compensate, their reserved space for domain-specific SoC inst- current cores have larger instruction caches. ructions. See the “RISC-V History and In conclusion, given the consensus on ISA Momentum” sidebar for more information. principles, there are no good technical reasons ...... 62 IEEE MICRO ...... RISC-V History and Momentum RISC-V (“RISC Five”) is a modern RISC instruction set developed at the An optional compact extension was announced that makes RISC- University of California, Berkeley, that was made free and openly V programs smaller than both the x86 programs and other RISC available in response to requests from industry. In addition to a full architectures. software stack (compilers, operating systems, and simulators), there In addition to the initial free and open RISC-V core with a conven- are several RISC-V implementations available for use in custom chips tional five-stage pipeline and in-order core (Rocket), or in field-programmable gate arrays (FPGAs). Developed 30 years we’ve released a tiny, 0.01 mm2 RISC-V core (Zscale) and a more after the first RISC instruction sets, RISC-V inherits its ancestors’ sophisticated core that issues multiple instructions per clock cycle good ideas (a large set of registers, easy-to-pipeline instructions, and and executes instructions out-of-order (BOOM). a lean set of operations) while avoiding their omissions or mistakes Beyond the cores designed at UC Berkeley, designs are underway (branches are not delayed, it has support for virtualization, and it in Colombia, England, India, and Russia. In fact, the Indian offers both 32- and 64-bit addresses). government has invested US$45 million so far in RISC-V RISC-V has gained considerable momentum since this debate last year. implementations. One RISC-V design optimized for FPGAs (Jan Gray’s GRVI-Phalanx) Four RISC-V workshops sold out, with the last workshop in Boston runs faster than 300 MHz and fits 400 cores in a single affordable having 250 attendees from more than 100 organizations. FPGA, thereby offering a peak performance of more than 100 bil- The RISC-V foundation was established in August 2015 to support lion . and evolve the RISC-V instruction set. Initial sponsors include , Hewlett Packard Labs, IBM, Lattice Semiconductor, Mel- As a result of the rising popularity of RISC-V, the 2017 edition of the lanox, Microsemi, Nvidia, Oracle, Rambus, , and venerable textbook Computer Architecture: A Quantitative Approach will several smaller companies and start-ups. switch to RISC-V as its reference instruction set. not to have a free and open ISA standard, as is and its very closed ecosystem. Now, ARM the case in other fields. A standard ISA enables has a flourishing ecosystem with different an open source ecosystem of cores and periph- goals than x86, but it’s still semiclosed. So erals. An open source ecosystem allows many why shouldn’t an open source architecture more people—not just a few companies—to start and we get going on it? use and build upon it, which will spur more Christie: I have no reason at all. Have at it. innovation and reuse. If we are going to do But I don’t think there’s the commercial pull that, which ISA would you pick? We should for it that David Patterson seems to think pick the one designed for the 21st century. It there is. Maybe in time; it is certainly worth should be free and open. It should be minimal taking a shot. because a lot of innovation will come from the Patterson: I think that if there was no open coprocessor, as compared to the cores. It should source software and we were the first people have a full stack of software running on it. to try that, then there’s a lot of reason to be Finally, it should be modular. It should have a skeptical. But when Linux started, it didn’t minimal, standard subset of instructions, have an ecosystem. It remarkably caught on standard extensions, and space for application- with companies, and they poured resources specific unique instructions. I believe RISC-V into it. Obviously, this is like the Innovator’s should be that ISA. Dilemma. It’s incomplete yet very promising, but it doesn’t have everything you need. In Moderator and Audience Questions this open source world, we think volunteers will help supply the missing pieces and build Here, we present an edited transcription of that ecosystem. We bet that in five years, the conversations that took place. RISC-Vþ is going to be a significant force. We’llsee;timewilltell. Are There Reasons against a Non-x86/Non-ARM Ecosystem? Hill: A question for Dave Christie: You can Is the ARM Ecosystem Sufficiently Open? argue that the ARM ISA had no initial eco- Hill: Another question for Dave Christie: system and it started out as a response to x86 Another reason why this might fail is if the ...... JULY/AUGUST 2016 63 ...... COMPUTER ARCHITECTURE

ARM ecosystem is sufficiently open to enable pate, given that you can’t just replicate hard- the SoCs. Would you say that is the case? ware for free but you have to fabricate it? Christie: Yes. There are so many players in Patterson: The incentives are similar to the the ARM ecosystem in terms of tools; you incentives for open source software. You can can buy instruction set simulators, program participate in the design and evolution of development tools, and debug tools for sili- those systems, or you buy the proprietary sys- con from a variety of companies. This shared tem. There are advantages in helping shape development of the ecosystem and shared what the future is going to look like, both for cost of tool development is very effective for the ISA and their implementations. ARM’s customer base. In terms of getting RISC-V started, we’re Hill: David Patterson, do you think ARM launching a foundation that we hope will has opened enough? have its first members at the RISC-V work- Patterson: No.Theyhavenotdefineda shop, so it’s not just a Berkeley effort. And we coprocessor interface in the ARMv8 architec- think that people will be attracted to building ture, and a lot of people in this room really the missing pieces. We have faith in open believe that coprocessors are the future of ar- source systems in general, and we think it chitecture. I presume ARM wants to supply all will apply to hardware as well. the coprocessors you ever want from them, as Some people are frustrated with ARM, as opposed to making it open. That’s a glaring it’s kind of a monopoly right now. I think it omission. ARM is a great company if what is beneficial—just like it is beneficial to oper- you are building right now fits and you can ating systems and compilers—that there are afford it. But it has been documented where open ones and closed ones. I think it’d be ARM says it takes six or more months to nego- good for our field if there was an open ISA, tiate a contract,2–4 so for a lot of small compa- which might temper the behavior of compa- nies, this delay is a real problem. Furthermore, nies if they realize they’re not the only sources ARM doesn’t even want to do business with a in town. lot of companies unless you’re going to have Hill: Dave Christie, if you wanted to do volume. So they’re kind of a monopoly, and this, how would you develop an ecosystem as they get to pick who works with them; they quickly as possible? are not as open to business as you might think. Christie: Building an ecosystem, it’s not Why wouldn’t they have a coprocessor inter- just the tools, it’s critical mass—it’s critical face? There are business reasons for that deci- volume of implementations and software sion, but no technical reasons. support, it’s people knowing that they write Christie: The ARMv7 has this coprocessor applications (or tools) for processors that will interface—at least in the ISA—which they be mainstream products, and that it’s worth- did away with because it really wasn’t put to while investing money in developing your any use except for mapping system registers application because there will be a market for into the various functions. Why isn’t—if it. Reaching that critical mass is somewhat we’re talking coprocessors though—memory less tangible, I think; that’s why you need mapped a solution? marketing and luck, along with good tools. Patterson: Memory map works for some ARM has done this, but it’s been a long, slow things,butyouwouldn’twanttodofloating- climb. point or vectors that way. There are some things you’d rather have closer to the processor. How Many Open Source Cores Do We Really Need? What Are the Incentives for Open Source, and Christie: I have a question for David Patterson. How Can One Develop Them as Quickly as I’m not sure how big the market is for people Possible? who really want to design their own cores. A Hill: Assume that open ISAs are a good idea. lot of people who want to design systems for a To make that work, you need large ecosys- particular function like a set-top box or a tems. How does one develop an ecosystem TV—they aren’t necessarily keen on designing for a new open architecture, and what are the thehostprocessororevenanyofthemicrocon- incentives for the various parties to partici- trollers that handle various functions, power ...... 64 IEEE MICRO management, et cetera. They’ve got all they can of stuff we tried over the decades didn’t work deal with just to assemble the SoC functionality outsowell,butthereisalsostuffthatstill that they need for the product they envisioned. seems like a pretty good idea. I don’t know They’re quite happy to use whatever ISA and that we need a lot of innovation in ISA design processor implementation they can get their now, but I think for cores, it’s wide open given hands on. So there’s limited appeal for people that Moore’s law is slowing down and energy wanting to design those cores. There will be is becoming more important. These $1 chips libraries, in some form, and there may be some fortheInternetofThingsofferavastdesign financial backing for some of that from for- spacetoexplore.Ithinkthiswillenableinno- profit companies along the lines of Red Hat. vation because most architects will try some- So, I can see the ecosystem developing that thing on their own. If they did a custom ISA, way. But I wonder what the demand is for a they’d try to port software over to it and noth- wide variety of different cores: how many cores ing would run, and it would take several years. does an SoC or TV designer want to be able to With RISC-V, you have the OS base, Linux, choose from? Five or maybe 15—how many? and all these compilers ready, so you can inno- Patterson: Weshallsee.Ithinkthatinthe vate on the things you want to do and inno- open source community, a lot of the software vate underneath the ISA, but the big pieces of gets done in academia; some of the implemen- software will run. I’m willing to take bets that, tation is done by the students and faculty. In at worst, we’re going to see a lot more innova- terms of who would want to design that, I tion than we get from the ARM. Those cores could imagine that that would be one source. are designed at one company. By contrast, if I believe ARM has somewhere between 10 youlookatthecoreswedesignedatBerke- and15licensedcompanieswhohavetheright ley—just one group at Berkeley—I think we to design their own cores and who have spent designed some cores better than ARM. We’ll a lot of money for that right. So there’s at least show you the data. 10 to 15 companies that want to design ARM Christie: I think that’s an interesting obser- cores even though they can get one directly vation. RISC-V has got a huge fan club and a from ARM. For the high-end stuff—which lot of very smart people participating in the AMD does—that’s really rocket science. I effort and doing really cool things. But over think opportunities for RISC-V are going to time, the initial people go off and do other be in the Internet of Things; we’re talking things, and the business that was built around about amazingly energy-efficient, amazingly it gets certain constraints, and things mire involved small things, things that are 0.01 down and … mm2.Therearenolegacybarriersforthe Patterson: So, don’t do anything, is that it? Internet of Things, there is a lot of innovation [Mark Hill throws penalty flag.] therethatalotofpeoplecando,soIcan Christie: No, I just mean innovation that’s imagine many people might be building cores happening now might taper off. for the Internet of Things. How Does One Experiment with New Instructions Will Open Source Kill Innovation Rather than Grow it? in a Proprietary ISA? Audience member: I am a little worried that Audience member: IknowwithRISC-Vthat open source ISA and open source microproc- if I want to experiment with transactional essor cores will change the business model, memory, new security models, or new mem- possibly through killing innovation in much ory systems, I can see how I can build those the same way that open office software has in that infrastructure. In a proprietary ISA killed innovation. ecosystem, how does a researcher experiment Patterson: Right now, there’s only a couple with these new innovations and get them of microprocessor companies, so to innovate updated? in cores you have to work for one of those Christie: For work— companies. Let’s try an experiment where we I noticed that’s a blank chapter in the RISC-V letalotmorepeopledesigncores.What’s specification, which I don’t fault them for. But interesting, especially over my career, is the there’s been no shortage in the ability to experi- widespread agreement on ISA designs. A lot ment and develop, for example, transactional ...... JULY/AUGUST 2016 65 ...... COMPUTER ARCHITECTURE

capabilities that could be adopted by any ISA, Remember that initially there were a so I think that’s not been a problem. bunch of competing BSD out there Patterson: We’re doing extensions where (FreeBSD, NetBSD, OpenBSD, PC-BSD), we think there’s a consensus in the architec- which divided the community. One of them ture community. There’s no consensus in hadtobesuccessful,butnoneofthemwere. transactional memory, and that’s why we put Linux came later and took off when the field a placeholder in there. However, we think we rallied around it. You could try to do another need to make more progress to figure what to open ISA, and there are other efforts besides do on something like transactional memory, ours right now. For example, there is one and once we do, there is space to add it to that’s based around the SuperH. But RISC-V. I agree with the questioner that this my opinion is that the community needs to is an opportunity to do significant stuff; we build the ecosystem to make one ISA success- can build chips and run software and try ful before trying to build ecosystems for mul- things out. We’ll give you an ecosystem, a tiple ISAs. register transfer level (RTL) design that you I think if RISC-V became a monopoly or can start modifying, and then do your something, and you couldn’t influence what experiments. was going on, that would be a good reason As a concrete example, security research is for another ISA. But we don’t even know if done mostly by pointing out flaws rather RISC-V is going to work yet. The problem than building things and seeing if they work. isn’t that there’s not enough open ISAs. The With RISC-V, you can try your idea question is whether we can do this in hard- and build a system, usually from field- ware at all; can a free and open ISA be as suc- programmable gate arrays, and try it out. You cessful as the LLVM compiler or Linux? can put it up on the Internet and claim that That’s the question. it’s going to work. You’d get sued if you try to Christie: I’m going to agree with the prem- do that with ARM. So you can’t use the pro- ise that one open source effort kind of makes prietary ISAs to do such experiments. ARM sense. Although I disagree that they can cover seems to believe in security by obscurity, anything you want to do. Do you have a while no security researcher that I know of GPU? Various accelerators? Is that the most agrees with that philosophy. Experts think efficient way to do a GPU? their best path forward is where everybody Patterson: Yes, that’s a good question. knows what is going on, and then you try to Christie: Like I said, for certain accelera- break into it. You can do that with RISC-V. tors, you want give the designers freedom to You could put your RTL out there and share do their own customized ISA. And I think it, so everybody doesn’t have to do it them- the intermediate layer is a good approach to selves. I think one of the big releases of inno- deal with that. vation in architecture is for the things we Patterson: Yes, I think the question is could don’t know how to do, because many could we build a GPU? We think you could build build systems that run software and try the the GPU around RISC-V, but we haven’t dem- ideas out. Otherwise, you have to wait for onstrated it. [Authors’ note: Since this talk, two Intel or ARM to figure it out. And they’ll other groups have announced open GPUs: the give you their solution, and that’s what you MIAOW GPU from the University of Wis- will be allowed to use. consin (http://miaowgpu.org) and Nyami from Binghamton University.] Should There Be More than One Open ISA? Audience member: Should there be more than one of these open ISAs? Why Can’t We Have a Choice between Open and Patterson: No, I don’t think so. [Laughter] Proprietary ISAs? First of all, it’s a lot of work. When Krste Asa- Audience member: Will it be possible to have novic, Yunsup Lee, and Andrew Waterman both an open ISA and a proprietary ISA started this, I said, “Don’t do this, it’s a bad together and have a choice, just like we have idea.” Krste said, “This will be three months.” inthesoftwareworld,suchthatwecango It took four years. with the proprietary one if we wanted to and ...... 66 IEEE MICRO if we want innovation in the research com- is sort of like driving a Yugo. Why should we munity we can go with the open source? expect that the quality of this open source Patterson: Okay, we promise not to drive effort will be competitive with what we get Intel and ARM out of business. commercially? Hill: You notice Dave Christie didn’t Patterson: Many think proprietary software promise. [Laughter at implied reference to Intel.] also has dubious quality. ARM abandoned the Patterson: I think that in every case in ARM C compiler and endorsed the LLVM C Table 1, there was a viable, money-making compiler. That was an open source University proprietary one and a free and open one. of Illinois effort. I don’t know if you used the Linux did not destroy all operating systems; Apache open source Web , but I would Microsoft still makes a lot of money selling be surprised if you don’t. A huge part of this operating systems. The experiment is to see if software you use every day is open source. I we can have an open ISA. The proprietary know there’s lousy open source, but a lot of ones are absolutely not going to go away, but software the world depends on is open source. can open source sustain a viable ISA, too? For example, ’s soft- ware is all open source. As a second example, How Does One Deprecate Something from an every time you do a Google search, you use Open Source ISA? open source software. I’d be thrilled if the Audience member: So how do you deprecate RISC-V cores are the equivalent quality of the something from an open ISA? same “crappy” software that Google runs to Patterson: What I expected from the ques- do searches. tion is how you prevent wretched excess like Christie: The idea of having all these eyes what’s happening with x86 and ARMv7. on the correctness for open source can be a Like other open source organizations, we are good thing and may work really well, but at setting up a RISC-V foundation. I think of it the same time, the Heartbleed bug is open like the US Constitution in that it gets seeded source code, which is obviously a weakness. with principles, which are the instructions. How would you like to have that—some- And then we’re going to have a voting mecha- thing of the magnitude of Heartbleed—cast nism by the members of the foundation to in hardware? amend it. So we can add things to it and we Patterson: Yeah, fortunately, proprietary can take things out, but it’s going to be like software has never had bugs. The argument is the US Congress; it’s a slow-changing system, that more people looking at design will help. and that’s on purpose. For the areas we I guess if we had to build something with haven’t defined, like transactional memory, zero bugs, I don’t think open source would there’s a hole there; but once there’s a pro- do it; perhaps try formal verification. But I posal, that will be different. For stuff that think it’s common sense that reuse via sharing gets established, it will probably be a slow- could well reduce the number of bugs. changing thing. That is why I think it’s not going to add two instructions per month for 40 years like the x86. I think those parts will ill: Please make a one-minute conclud- change slowly; the places that are brand new H ing statement. as they come along, but those will pop up. Patterson: Open architecture and imple- Christie: Do you have a mechanism for mentations are a real possibility. I hope every- the software discovery of features, namely, body in the room believes this could happen. where the software is able to query whether It has already happened in other software or not the feature is present, and if not, it fields. For it to happen in our field, it’s going takes an alternate path? to need people to volunteer. What was great Patterson: Yes, that’s there. was that 150 people showed up at our first workshop. A lot of people came from these Will the Quality of an Open Source ISA Be companies, but not representing their com- Competitive with that of Proprietary Ones? pany. For example, there’s a person who did Audience member: My personal experience of validation for Qualcomm and he took a vaca- the quality of most open source software is it tion day to come because he wanted to make ...... JULY/AUGUST 2016 67 ...... COMPUTER ARCHITECTURE

this happen and was willing to contribute. ware interface, , CPU People in this room could help make this , and performance instru- happen. And it would be a very exciting mentation techniques. Christie began his future. I can see a lot of positives coming out never-ending computer architecture education of that, making our research even more rele- at Ryerson Polytechnical [now University]. vant. We no longer would have to convince Contact him at [email protected]. Intel or ARM to enable people to try our ideas. Rather, we could do it ourselves, put it David Patterson is the E.H. and M.E. Par- out there, and have people start using it. So I dee Chair of Computer Science at the Univer- see a potentially very exciting future, but it’ll sity of California, Berkeley. His research inter- take volunteers to help make it happen. I ests include free and open instruction sets, hope some of you consider joining us. domain-specific accelerators, and hardware Christie: I think if you want to write a support for improved security. Patterson finalizer for HSAIL [HSA’s Intermediate received his PhD in computer science from Language] to target RISC-V, the HSA Foun- the University of California, Los Angeles. dation would be happy to include it. Contact him at [email protected]. Hill: Okay, so with that we will finish our debate. [Blows whistle.] MICRO Joshua J. Yi is a patent litigation associate at Dechert. His research interests include ...... microarchitecture, reliability, variation- References tolerant , and performance 1. HSA Foundation, 2013; www.hsafoundation. methodology. Yi received a PhD in electrical com. engineering from the University of Minne- 2. A.L. Shimpi, “The ARM Diaries, Part 1: How sota, Minneapolis, and a JD from the Uni- ARM’s Business Model Works,” Anand- versity of Texas at Austin. Contact him at Tech, 28 June 2013; www.anandtech.com/ [email protected]. show/7112/the-arm-diaries-part-1-how-arms- business-model-works. Derek Chiou is a partner hardware architect at Microsoft and an associate professor at 3. C. Demerjian, “A Long Look at How ARM the University of Texas at Austin. His Licenses Chips: Part 1,” SemiAccurate,7 research interests include accelerating data- Aug. 2013; semiaccurate.com/2013/08/07/ center applications and infrastructure; rapid a-long-look-at-how-arm-licenses-chips. system design; and fast, accurate simulation. 4. C. Demerjian, “How ARM Licenses Its IP Chiou received a PhD in electrical engineer- for Production: Part 2,” SemiAccurate,8 ing and computer science from the Massa- Aug. 2013; semiaccurate.com/2013/08/08/ chusetts Institute of Technology. Contact how-arm-licenses-its-ip-for-production. him at [email protected].

Mark D. Hill is the John P. Morgridge Pro- Resit Sendag is a professor of electrical and fessor, Gene M. Amdahl Professor of Com- computer engineering at the University of puter Sciences, and Computer Sciences Rhode Island. His research interests include Department Chair at the University of Wis- microarchitecture, memory systems, and consin–Madison. His research interests simulation techniques. Sendag received a include parallel-computer system design, PhD in electrical engineering from the Uni- memory system design, and computer simu- versity of Minnesota, Minneapolis. Contact lation. Hill received a PhD in computer sci- him at [email protected]. ence from the University of California, Ber- keley. Contact him at [email protected].

Dave Christie is lead AMD64 architect emeritus, ARM architecture liaison, and a Senior Fellow at Advanced Micro Devices. His research interests include hardware/soft- ...... 68 IEEE MICRO