CoolMOSTM 500V CE Power Electronics
500V CoolMOSTM CE
Newest 500V Superjunction MOSFET for Consumer and Lighting Applications
The new CoolMOSTM CE is the fourth technology platform of Infineon’s market leading high voltage MOSFETs designed according to the revolutionary superjunction (SJ) principle in the 500V class. 500V CE provides all benefits of a fast switching SJ MOSFET while keeping ease of use and implementation. This article will show that the complete CE series of MOSFETs can achieve very low switching losses can make applications more efficient, more compact, lighter and thermally cooler while representing a cost appealing alternative compared to standard MOSFETs.
Written by: René Mente, Application Engineer for CoolMOSTM CE, Infineon Technologies
Nowadays the 500V market is and Hu in the late 80ies [1]. No which requires a careful dominated by standard commercial has an on-state balancing of the additional MOSFETs, particularly in the resistance better than the limit n-charge by adjacently consumer market. It is visible line of silicon.” [2] positioned deep p-columns, that also this market range is going all the way straight going to be efficiency driven 40.00 through the device close to the especially in light load operation. back side n+ contact.” [2]
The way to achieve higher light 30.00
]
2 state state resistance
load efficiency is to reduce - 20.00 State-of the-art *mm
Ω conventional MOS driving losses and switching [ Reduction of Internal 10.00 losses in load conditions. Due to "Silicon limit" Capacitances CoolMOSTM the revolutionary area specific on specific area 0.00 500 600 700 800 900 1000 on-state resistance (Ron*A) of SJ Blocking voltage [V] The most important benefit of MOSFETs this losses can be this small R *A of 1.95Ω/mm² is reduced by the reduced internal Figure 1: area specific on-state on resistance versus breakdown voltage the reduction of internal capacitances and therefore capacitances. The following reduced output capacitance Figure 1 describes the Ron*A (y- figure represents the internal (Coss) and gate charge (Qg). axis) over the rated blocking capacitances of the voltage or breakdown voltage IPA50R280CE against a
(V(BR)DSS). It is clearly visible that comparable standard MOSFET Superjunction Principle TM the CoolMOS series has a with the same RDS(on). nearly constant R *A over all TM on “All CoolMOS series are V(BR)DSS classes which brings a based on the SJ principle. reduction of about 70% Ron*A Where conventional or standard with a value of 1.95Ω*mm² of the MOSFETs just command on one 500V CE in comparison to a degree of freedom to master conventional or standard both on-state resistance and MOSFET. “The basic idea is blocking voltage, the SJ principle simple, instead of having allows two degrees of freedom electrons flowing through a for this task. Therefore relatively high resistive (high Figure 2: capacitance comparison conventional MOSFETs are voltage blocking) n-area, we 500V CE vs. standard MOSFET bound by the limit of silicon, a allow them to flow in a very rich barrier which marks the optimum doped n-area, which gives In Figure 2 the capacitance doping profile for a given voltage naturally a very low on-state value in pF on the y-axis and the class. This limit line (which is resistance. The crucial point for drain source voltage (VDS) from visible in Figure 1), has been the SJ technology is to make the 0V - 500V is visible. The red line theoretically derived by Chen device block its full voltage, describes the input capacitance
CoolMOSTM 500V CE Power Electronics
(Ciss), the blue line the output gate driver with lower gate drive concludes in the following target capacitance (Coss) and the green capability which leads to a applications for the 500V CE: line the reverse capacitance reduction of the overall system (Crss). Furthermore the solid line costs. PC Silverboxes represents the 500V CE and the LCD/LED/PDP TVs dashed line the comparable Gaming Consoles standard MOSFET. It is visible Lighting applications that the Ciss and the Coss are much lower in comparison to the Efficiency comparison between standard MOSFET and the CGD 500V CE and standard MOSFET is portioned to the CGS in order was conducted in CCM PFC, to have a self-limiting behavior of while hard commutation on the dv/dt of the MOSFET for conducting body diode was example during hard Figure 3: typical gate charge carried out in a half bridge commutation on a conducting 190mΩ-950mΩ RDS(on) configuration which is relevant body diode. “A fundamental for resonant topologies like a characteristic of all superjunction Figure 3 represents the Qg in nC LLC resonant converter. Both MOSFETs is, that both the on the y-axis over the different comparisons are shown in this output and reverse capacitance maximum RDS(on) from 190mOhm document. show a strong non-linearity. The to 950mOhm. The blue line non-linearity in SJ capacitance illustrates the 500V CE and the characteristics comes from the red line the standard MOSFET. Efficiency fact that at a given voltage, It is visible that there is a typical th typically in the range of 1/10 of Qg reduction of 40% in In order to give a clear statement comparison to a standard the rated blocking voltage, p- of differences in the efficiency MOSFET. This impact on the and n-columns deplete to each the CCM PFC is one of the most other leading to a fast expansion light load efficiency is going to suitable applications to prove of the space charge layer be shown in the efficiency such a better efficiency throughout the structure. This comparison in one of the statement given its simple means that at a voltage beyond following sections of this construction and the applied document. 50V for a 500V rated MOSFET fixed frequency. The following both Coss and Crss reach setup was therefore used: minimum values of a few pF only, resulting in a dv/dt of more Applications CCM PFC than 100V/ns and di/dt of several V = 90VAC thousand A/µs if the load current The new 500V CE finds its place in V = 400VDC is allowed to fully commute into in different applications out the output capacitance during according to the following figure Pout = 0W to 400W turn-off.” [3] Furthermore it is of a typical AC/DC SMPS power Frequency = 100kHz visible that the capacitance architecture: RG,ext = 5Ω value of the Coss is decreasing Ambient temperature = 25°C by higher voltages, which means Heat sink preheated to 60°C that the highest dv/dt is reached Plug & Play scenario shortly before the bulk or bus between IPP50R280CE and voltage is reached. By the end comparable standard the reduction of the MOSFET capacitances brings a benefit Figure 4: typical AC/DC SMPS power also in the gate charge (Qg) architecture As shown in the setup definition reduction. a worst case scenario was As shown 500V CE fits in PFC chosen with 90VAC input stage or more precisely in the voltage in order to have higher boost stage of the PFC. Gate Charge (Qg) currents flow through the PFC Furthermore, also the DC/DC MOSFET. The switching One of the most important conversion stage is addressed frequency was set to 100kHz improvements is the gate charge where two different converters representing the average are mentioned. On the one hand frequency currently used on the (Qg) reduction which heads to light load efficiency side a hard switching topology market (normally between 65kHz improvements given by the where the TTF comes into place and 135kHz). Furthermore the reduction of the driving losses. and the LLC converter which is a heat sink is preheated to 60°C Furthermore it is possible to resonant topology. This which is typically the drive the MOSFET by using a temperature in a power supply.
CoolMOSTM 500V CE Power Electronics
Hard Commutation on Figure 5 represents the Conducting Body Diode efficiency comparison of the mentioned parts in absolute The best way to analyze the values (upper diagram) and in behavior of the body diode of the relative values (lower diagram). MOSFET is in an half bridge configuration where the high side MOSFET is used as a switch to load the 145µH Figure 7: hard commutation on inductance which is located in conducting body diode parallel to the drain and source of the low side MOSFET. When the high side MOSFET is References turned-off the current is running through the body diode of the [1] X. B. Chen and C. Hu, low side MOSFET. After 2µs “Optimum doping profile of body diode conduction time the power MOSFET’s epitaxial high side MOSFET is turned-on Layer.”, IEEE Trans. Electron again and the Qrr from the low Devices, vol. ED-29, pp. side MOSFET has to be 985-987, 1982 removed. In this case a high Figure 5: efficiency comparison 500V current is flowing from drain to [2] G. Deboy, L. Lin, R. Wu: TM CE vs. standard MOSFET source of the low side MOSFET “CoolMOS C6 Mastering the with high di/dts which could Art of Slowness”, Application On the x-axis the output power provoke a voltage overshoot, Note revision 1.0 2009-1221, pp. Pout is represented and on the which is marked as VDS,max, due 5-6 y-axis the absolute efficiency to the source inductance of the and the efficiency delta of the low side MOSFET. The setup [3] DR. H. Kaples: two analyzed MOSFETs. This according this behavior is “Superjunction MOS devices – plug and play measurement represented in Figure 6. From device development shows the big advantage of the towards system optimization”, 500V CE in comparison to the paper EPE 2009 – Barcelona, standard MOSFET especially in ISBN 9789075815009, pp. 3 light load operation. The highest efficiency on this system was measured at around 150W with Figure 6: simplified circuitry and an absolute value of around waveform for hard commutation 95.5% bringing an average 0.3%-0.4% higher efficiency According to this setup the starting from 100W to 400W. maximum VDS peak is going to The biggest advantage is be analyzed in represented in observed at 40W which Figure 7 which illustrates the VDS corresponds to 10% of load. In peak on the y-axis over different this load condition the 500V CE currents (IF) through the body has about 0.9% higher efficiency diode. It is visible that the than the comparable standard IPP50R500CE has a lower or MOSFET mainly deriving from same VDS,max peak over the the 40% Qg reduction. An whole current range than the increased switching speed could much slower switching also bring negative aspects e.g. comparable standard MOSFET. high di/dts could incite high This can only be achieved due to voltage peaks in combination the self-limiting dv/dt behavior of with parasitic inductances. this SJ MOSFET family. All Highest di/dts are reached mentioned technology during hard commutation on the parameters and these two conducting body diode when the measurements show that 500V Qrr of the body diode has to be CE brings benefits in hard removed. switching topologies and resonant switching topologies.