Fabs in the Internet of Things Era F a B Nanochip a Message from Our Publisher Solutions FAB SOLUTIONS

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V8/Issue 2/2013 Fab-wide Effort 2 Power Struggle: 6 Partnering with 32 Increases Yield As Mobile Systems Offer Customers to at CMOS Imager Additional MEMS Sensors, Improve Yield Facility in Italy Power Is a Primary Challenge

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Fabs in the Internet of Things era F a b Nanochip A Message from Our Publisher Solutions FAB SOLUTIONS

Executive publisher Our new electronic delivery system Dana Tribula Contents [email protected] Will Make you flip publisher —pages that is. For more than a year now we’ve given our Peggy Marcucci [email protected] readers the option of receiving Nanochip Fab Solutions in PDF format. You loved the idea of going green and saving trees, 1 EDITOR-IN-CHIEF A Message from but scrolling through a PDF document just wasn’t the same as Our Publisher Liz Baird [email protected] flipping through the pages of a magazine. CONTRIBUTING EditoRS Gary Dagastine Fab-wide Effort Increases Yield David Lammers So we hope you’re now enjoying our December 2013 issue in one of its two new Power Struggle: at CMOS Imager Jill O’Nan As Mobile Systems Offer 2 Facility in Italy online versions, each designed to give you the most enjoyable and efficient reader Additional MEMS Sensors, Dana Tribula experience possible. Power Is a Primary Challenge 6 Design Our Nanochip Fab Solutions electronic flipbook includes high-resolution images and makes Jane Olson Graphic Design VP, Strategy and CMO, Applied Global Services; it easy to select, read, print or download a PDF of articles that interest you. In addition to the Executive Publisher, flipbook, the email we send you announcing each issue features individual links to every article. Clicking on an article title will take you directly to a web page where you can read a simplified Nanochip Fab Solutions NANOCHIP is published by version. No downloading, no waiting, and formatted for reading on a phone, tablet or computer. STMicroelectronics:10 Applied Materials, Inc. Rest assured, though, that we will continue to print Nanochip Fab Solutions for anyone who On Top of Key Markets © Copyright Applied Materials, Inc., 2013 prefers to receive a hard copy. If you’ve already registered to receive a printed copy we’ll keep www.appliedmaterials.com sending to you as usual. If you’ve changed companies or have new contact information, or if you’d like to start receiving print copies, just e-mail us at [email protected]. There’s no charge to subscribe, and doing so will ensure that you receive a copy of every issue. 14 Although traditionally we publish Nanochip Fab Solutions twice a year (summer and winter), New Controller Nanochip Fab Solutions is now delivered we understand that many of you would like us to publish more frequently. This fall we piloted Extends Life of in an environment-friendly online version. 200mm Tools Printed copies are available upon request. a new electronic-only edition called Nanochip Express. This streamlined email version of the For a free subscription, or to magazine features a handful of shorter articles, and will be published in the fall and spring, in add colleagues to the mailing list, between our semi-annual issues of the full-length magazine. please send an email to As for the content of our publications, we’ll continue to make it as engaging and relevant as [email protected] When Good Parts we can. This issue of Nanochip Fab Solutions focuses on how the Internet of Things is challenging Go Bad: with the following information: Repair or Replace? Fabs in the • Name manufacturers to create connected fabs, and we look at the struggle to power sensors and 18 Internet of Things Era • Title other components for mobile devices without compromising battery life. • Company 20 We also consider yield improvement, with three articles that examine this critical issue • Business address • Business email* from different perspectives. On the personal side, STMicroeletronics executive Orio Bellezza

*Sorry—no general accounts, e.g., Gmail, AOL, Yahoo tells us how his company is using “clusters of competencies” to take the lead in several key markets. And an in-depth interview with Applied Global Services (AGS) chief, Charlie Pappis 24 discusses the growing complexity of fab operations and how AGS is “retooling” its service Improving Yield with offerings and delivery to keep pace. Finally, we wrap-up with Dave Lammers’ insightful look at Fleet Chamber Matching All trademarks so designated or otherwise indicated as product names the technology transitions that lie ahead in 2014. 28 or services are trademarks of Speaking of technology transitions, we encourage you to email us at the address above Charlie Pappis: Applied Materials, Inc. in the U.S. and to let us know what you think of our new electronic formats—and the kinds of articles you’d Serving Up a other countries. All other product and Better Outcome service marks contained herein are like to see next year. Whether you read Nanochip Fab Solutions as a flipbook, a series of web trademarks of their respective owners. articles, or a printed magazine, what’s important is that you keep reading. As long as you do,

PLUS: we’ll keep publishing. 31: Helping Customers Improve Equipment and Fab Productivity 32: METHODOLOGY FEATURE: Partnering With Customers to Improve Yield 37: The Last Word: A Look at 2014 Nanochip 1 The goal of Applied’s FabVantage chambers and tools, but also looked chamber to chamber, which caused consulting group is to help customers at some aspects of production from nonuniform etching across chambers. increase their operational capability a more integrated perspective, In addition, sensor trace analysis with respect to cost, efficiency examining several tools that together and Applied’s best known methods and yield. FabVantage consultants were engaged in carrying out specific (BKMs) were used to optimize the address customer productivity process steps. etch process to eliminate voltage FA-WB IDE and yield issues by combining the Here are a few examples showing spikes that are known to lead to skills and knowledge of seasoned how yield improvements were achieved. yield loss. fab experts with state-of-the- art modeling and analysis tools, MI OD FIed ETCH PROCESS B Etter CONTROL OF and Applied’s deep systems and REDUCES DEVICE LEAKAGE VARIABILITY IN RTP PROCESS EFFORT technology roots. On one etch tool, excessive Elsewhere, there was significant A good example of the benefits transistor current leakage was variability in the performance of of this collaboration are the results of observed following an oxide spacer a rapid thermal processing (RTP) an extensive fab-wide engagement etch step. When fab personnel tried tool at a new technology node, with encompassing about 10 separate INCREASES to address the problem through resulting transistor performance projects that took place at a CMOS preventive maintenance and auto- issues across wafers. image sensor array fab in Avezzano, cleanings, the leakage became Audits of hardware, maintenance Italy. The fab is run by Marsica even worse. practices, process recipes, and Innovation & Technology srl (MIT), YIELD A detailed recipe and process fault detection and classification an operating company of the joint audit was initiated. The FabVantage (FDC) analyses identified the tool’s venture between LFoundry Europe team determined the root cause temperature profile as the root cause and Marsica Innovation SpA. of the problem to be a recipe with of the process variability. Excessive For each of 12 tool-types, the team AT CMOS IMAGER low oxide-to-polysilicon sensitivity, temperatures during ramp-up turned audited tools and recipes, and used which sometimes led to over-etching out to be the specific cause of the sensor- and on-wafer data to pinpoint into the silicon substrate. Further transistor performance problems. FACILITY IN ITALY key issues. By leveraging best known complicating the matter, this over- Additionally, the team found other practices and specific expertise, the etching was not uniform across the temperature issues that impacted the team made recommendations to tool’s chambers. tool’s ability to achieve targeted yields. improve performance. In most cases, Applied and the customer These were excessive temperature By proposed solutions were first tested identified an optimized recipe as the differences among heater zones A Case on a golden tool. Successful solutions LIMING ZHANG best solution (see figure 1). It was during the stabilization phase of then were fanned out to the entire also determined that the chamber the process, and poor temperature Study fleet. As the work progressed, the AND lid temperature set point varied from control during spike anneal. HELEN ARMER team evaluated not only individual

Manufacturers must continually refine and improve their operations in order to meet increasingly difficult device performance and yield goals. This article describes a fab-wide engagement in which Applied Materials’ FabVantage consulting group helped one customer solve a variety of yield challenges

across a fleet of tools. The result has been (1a) (1b)

a significant and sustainable increase in Figure 1. A recipe with low oxide-to-polysilicon sensitivity sometimes led to over-etching into the silicon substrate (figure 1a left). A new recipe the fab’s overall yield. eliminated the problem (figure 1a right). The graph compares the oxide-to-polysilicon sensitivity of several of Applied’s proposed recipe changes with the customer’s original recipe (figure 1b).

2 Nanochip Nanochip 3 The goal of Applied’s FabVantage chambers and tools, but also looked chamber to chamber, which caused consulting group is to help customers at some aspects of production from nonuniform etching across chambers. increase their operational capability a more integrated perspective, In addition, sensor trace analysis with respect to cost, efficiency examining several tools that together and Applied’s best known methods and yield. FabVantage consultants were engaged in carrying out specific (BKMs) were used to optimize the address customer productivity process steps. etch process to eliminate voltage FA-WB IDE and yield issues by combining the Here are a few examples showing spikes that are known to lead to skills and knowledge of seasoned how yield improvements were achieved. yield loss. fab experts with state-of-the- art modeling and analysis tools, MI OD FIed ETCH PROCESS B Etter CONTROL OF and Applied’s deep systems and REDUCES DEVICE LEAKAGE VARIABILITY IN RTP PROCESS EFFORT technology roots. On one etch tool, excessive Elsewhere, there was significant A good example of the benefits transistor current leakage was variability in the performance of of this collaboration are the results of observed following an oxide spacer a rapid thermal processing (RTP) an extensive fab-wide engagement etch step. When fab personnel tried tool at a new technology node, with encompassing about 10 separate INCREASES to address the problem through resulting transistor performance projects that took place at a CMOS preventive maintenance and auto- issues across wafers. image sensor array fab in Avezzano, cleanings, the leakage became Audits of hardware, maintenance Italy. The fab is run by Marsica even worse. practices, process recipes, and Innovation & Technology srl (MIT), YIELD A detailed recipe and process fault detection and classification an operating company of the joint audit was initiated. The FabVantage (FDC) analyses identified the tool’s venture between LFoundry Europe team determined the root cause temperature profile as the root cause and Marsica Innovation SpA. of the problem to be a recipe with of the process variability. Excessive For each of 12 tool-types, the team AT CMOS IMAGER low oxide-to-polysilicon sensitivity, temperatures during ramp-up turned audited tools and recipes, and used which sometimes led to over-etching out to be the specific cause of the sensor- and on-wafer data to pinpoint into the silicon substrate. Further transistor performance problems. FACILITY IN ITALY key issues. By leveraging best known complicating the matter, this over- Additionally, the team found other practices and specific expertise, the etching was not uniform across the temperature issues that impacted the team made recommendations to tool’s chambers. tool’s ability to achieve targeted yields. improve performance. In most cases, Applied and the customer These were excessive temperature By proposed solutions were first tested identified an optimized recipe as the differences among heater zones A Case on a golden tool. Successful solutions LIMING ZHANG best solution (see figure 1). It was during the stabilization phase of then were fanned out to the entire also determined that the chamber the process, and poor temperature Study fleet. As the work progressed, the AND lid temperature set point varied from control during spike anneal. HELEN ARMER team evaluated not only individual

across a fleet of tools. The result has been (1a) (1b)

2 Nanochip Nanochip 3 cause of peak temperature control IM PROVed FA B-WIDE EFFORT issues, and the recipe was modified PROCESS STABILITY to accommodate higher pressures INCREASES YIELD Production and yields from (see figure 2b). Finally, hardware/ AT CMOS IMAGER a PVD tool that was trying to run maintenance practice audits revealed FACILITY IN ITALY a new recipe were impacted by that the tool’s process kit was the complexity of a cobalt silicide marginal, and also that preventive (CoSi) deposition loop, which led to Temperature overshoots during maintenance procedures needed to widespread transistor leakage and ramp-up caused oxide growth and be optimized. The hardware issues logic timing failures during wafer dopant out-diffusion, and these were addressed and BKM cleaning probe tests. effects led to the variation in device procedures were implemented. The FabVantage consultants performance. In response, the determined that failures were customer and the FabVantage team DE FEct REDUCTION dependent on product-type, process (4a) (4b) modified the tool’s system controller LEADS TO BETTER CMP integration of the CoSi step was to optimize it for the temperature Figure 4. Tool hardware and recipe audits of tools in the CoSi loop uncovered several findings that were contributing to poor A chemical-mechanical marginal, and within-wafer leakage ramp-up step (see figure 2a). transistor performance. After optimizing the Co PVD recipe to eliminate transient steps and increase pressure and power, the planarization (CMP) tool was unable patterns were related to the thickness Meanwhile, the recipe audit standard deviation of within-wafer thickness uniformity decreased by almost half (figure 4a) and the standard deviation of to achieve targeted yields because of the cobalt film—the thicker the Co, identified chamber pressure as a within-wafer resistivity declined about 15% (figure 4b). More importantly, resistivity was controlled in a tighter range. of scratches generated during a the worse the leakage. polishing step. These scratches The team recommended were being generated at more than improved inline electrical parametric implemented a patch to contain the loss from defects during backside three times the number that could tests and test layouts as a way to problem, it was costly. etch. FabVantage consultants be tolerated by the customer’s detect failure mechanisms early, These hillocks were caused by Al identified chamber maintenance technology. as well as the implementation of a film stress, which can be modulated practices as the root cause of the The FabVantage team conducted very soft sputter (VSS) etch process by the temperature of the hot Al defects. They then recommended several tool audits to understand the prior to Co deposition to improve deposition step. However, a lower and helped implement new problem and identify solutions. They film uniformity (see figure 4). Al de-gas temperature can lead to procedures for electrostatic determined that upstream processes Modifications to pressure and power defects in subsequent steps; therefore chuck (ESC) cleaning and inline induced particles at the wafer edge to improve process stability were a number of related processes need to defect detection. be tuned in accordance with changes that subsequently scratched the suggested, and the Co PVD recipe was ■■ Side-to-Side Chamber in Al deposition. wafer during polishing. A multi- optimized for better within-wafer and Mismatch Eliminated. The faceted solution was recommended wafer-to-wafer thickness uniformity. A series of changes to the stack (5a) (2a) parameters of devices produced and implemented that focused on recipe were recommended and on different sides of one optimizing slurry delivery, evaluating OP D TimiZE implemented, from de-gas to Al Applied Producer CVD tool’s specific tool components, and ALUMINUM DEPOSITION reflow, which reduced the number chamber were mismatched. conducting upstream preventive REDUCES HILLOCKS of hillocks by more than half. The The team determined the tool’s maintenance activities in accordance results were validated by electrical One PVD tool was experiencing showerhead was one factor; the with Applied’s BKMs. The result parametric tests (see figure 5). yield loss with specific device-types second factor was differences in was a more than 300% reduction in because high aluminum (Al) hillocks the level of radio frequency (RF) scratches (see figure 3). TOLO L AVAI ABILITY power from one side to the other. were being produced by the baseline IMPROVEMENT process. Although the customer had A faceplate change at the next Other results of the work preventive maintenance cycle (5b) performed during the fab-wide was recommended, and the level consulting engagement include: of RF power applied throughout Figure 5. The Al hillocks seen at left were caused by Al film ■■ Greater Availability. The the chamber was optimized and stress and were impacting yields from a PVD tool (figure 5a). (2b) uptime and stability of one PVD equalized. Applied’s FabVantage consultants recommended a number of tool used to fabricate copper The key to successful ways to reduce film stress, reducing hillock formation by more Figure 2. An RTP tool’s system controller was optimized to barrier/seed (CuBS) layers was semiconductor manufacturing is to than half (figure 5b). eliminate temperature overshoots during ramp-up (figure increased by the addition of a achieve and maintain the highest 2a). These can cause oxide growth and dopant out-diffusion, new bell jar component. DC bias possible yields at the lowest possible Acknowledgements: and lead to variations in transistor performance across deterioration was eliminated and cost. As this project demonstrates, Key participants in this project included wafers. Also, the beneficial effects of a recipe change to RF matching for load and tune well-qualified and experienced Laura Bertarelli, Massimo Casella, accommodate higher chamber pressures are shown in figure Figure 3. Tool audits conducted by the FabVantage team led to a more than 300% positions was stabilized. consultants such as those in Marco Crivellari, Francesco Fattibene, 2b. The FabVantage team discovered that chamber pressures reduction in scratches from one CMP tool. The team recommended changes to Patrick Fernandez, Robert Grimwood, ■■ Backside Etch Defect Reduction. Applied’s FabVantage group, backed were causing peak temperature control issues. The new upstream preventive maintenance procedures in accordance with Applied’s BKMs, Valeria Lanza and Tony Persico One Applied Centura tool was by extensive technology resources, recipe led to more uniform temperatures across heater zones. and optimized slurry delivery and evaluation of certain tool components. For additional information, contact experiencing intermittent yield can help manufacturers achieve those goals. [email protected]

4 Nanochip Nanochip 5 cause of peak temperature control IM PROVed FA B-WIDE EFFORT issues, and the recipe was modified PROCESS STABILITY to accommodate higher pressures INCREASES YIELD Production and yields from (see figure 2b). Finally, hardware/ AT CMOS IMAGER a PVD tool that was trying to run maintenance practice audits revealed FACILITY IN ITALY a new recipe were impacted by that the tool’s process kit was the complexity of a cobalt silicide marginal, and also that preventive (CoSi) deposition loop, which led to Temperature overshoots during maintenance procedures needed to widespread transistor leakage and ramp-up caused oxide growth and be optimized. The hardware issues logic timing failures during wafer dopant out-diffusion, and these were addressed and BKM cleaning probe tests. effects led to the variation in device procedures were implemented. The FabVantage consultants performance. In response, the determined that failures were customer and the FabVantage team DE FEct REDUCTION dependent on product-type, process (4a) (4b) modified the tool’s system controller LEADS TO BETTER CMP integration of the CoSi step was to optimize it for the temperature Figure 4. Tool hardware and recipe audits of tools in the CoSi loop uncovered several findings that were contributing to poor A chemical-mechanical marginal, and within-wafer leakage ramp-up step (see figure 2a). transistor performance. After optimizing the Co PVD recipe to eliminate transient steps and increase pressure and power, the planarization (CMP) tool was unable patterns were related to the thickness Meanwhile, the recipe audit standard deviation of within-wafer thickness uniformity decreased by almost half (figure 4a) and the standard deviation of to achieve targeted yields because of the cobalt film—the thicker the Co, identified chamber pressure as a within-wafer resistivity declined about 15% (figure 4b). More importantly, resistivity was controlled in a tighter range. of scratches generated during a the worse the leakage. polishing step. These scratches The team recommended were being generated at more than improved inline electrical parametric implemented a patch to contain the loss from defects during backside three times the number that could tests and test layouts as a way to problem, it was costly. etch. FabVantage consultants be tolerated by the customer’s detect failure mechanisms early, These hillocks were caused by Al identified chamber maintenance technology. as well as the implementation of a film stress, which can be modulated practices as the root cause of the The FabVantage team conducted very soft sputter (VSS) etch process by the temperature of the hot Al defects. They then recommended several tool audits to understand the prior to Co deposition to improve deposition step. However, a lower and helped implement new problem and identify solutions. They film uniformity (see figure 4). Al de-gas temperature can lead to procedures for electrostatic determined that upstream processes Modifications to pressure and power defects in subsequent steps; therefore chuck (ESC) cleaning and inline induced particles at the wafer edge to improve process stability were a number of related processes need to defect detection. be tuned in accordance with changes that subsequently scratched the suggested, and the Co PVD recipe was ■■ Side-to-Side Chamber in Al deposition. wafer during polishing. A multi- optimized for better within-wafer and Mismatch Eliminated. The faceted solution was recommended wafer-to-wafer thickness uniformity. A series of changes to the stack (5a) (2a) parameters of devices produced and implemented that focused on recipe were recommended and on different sides of one optimizing slurry delivery, evaluating OP D TimiZE implemented, from de-gas to Al Applied Producer CVD tool’s specific tool components, and ALUMINUM DEPOSITION reflow, which reduced the number chamber were mismatched. conducting upstream preventive REDUCES HILLOCKS of hillocks by more than half. The The team determined the tool’s maintenance activities in accordance results were validated by electrical One PVD tool was experiencing showerhead was one factor; the with Applied’s BKMs. The result parametric tests (see figure 5). yield loss with specific device-types second factor was differences in was a more than 300% reduction in because high aluminum (Al) hillocks the level of radio frequency (RF) scratches (see figure 3). TOLO L AVAI ABILITY power from one side to the other. were being produced by the baseline IMPROVEMENT process. Although the customer had A faceplate change at the next Other results of the work preventive maintenance cycle (5b) performed during the fab-wide was recommended, and the level consulting engagement include: of RF power applied throughout Figure 5. The Al hillocks seen at left were caused by Al film ■■ Greater Availability. The the chamber was optimized and stress and were impacting yields from a PVD tool (figure 5a). (2b) uptime and stability of one PVD equalized. Applied’s FabVantage consultants recommended a number of tool used to fabricate copper The key to successful ways to reduce film stress, reducing hillock formation by more Figure 2. An RTP tool’s system controller was optimized to barrier/seed (CuBS) layers was semiconductor manufacturing is to than half (figure 5b). eliminate temperature overshoots during ramp-up (figure increased by the addition of a achieve and maintain the highest 2a). These can cause oxide growth and dopant out-diffusion, new bell jar component. DC bias possible yields at the lowest possible Acknowledgements: and lead to variations in transistor performance across deterioration was eliminated and cost. As this project demonstrates, Key participants in this project included wafers. Also, the beneficial effects of a recipe change to RF matching for load and tune well-qualified and experienced Laura Bertarelli, Massimo Casella, accommodate higher chamber pressures are shown in figure Figure 3. Tool audits conducted by the FabVantage team led to a more than 300% positions was stabilized. consultants such as those in Marco Crivellari, Francesco Fattibene, 2b. The FabVantage team discovered that chamber pressures reduction in scratches from one CMP tool. The team recommended changes to Patrick Fernandez, Robert Grimwood, ■■ Backside Etch Defect Reduction. Applied’s FabVantage group, backed were causing peak temperature control issues. The new upstream preventive maintenance procedures in accordance with Applied’s BKMs, Valeria Lanza and Tony Persico One Applied Centura tool was by extensive technology resources, recipe led to more uniform temperatures across heater zones. and optimized slurry delivery and evaluation of certain tool components. For additional information, contact experiencing intermittent yield can help manufacturers achieve those goals. [email protected]

4 Nanochip Nanochip 5 Rob Lineback, an IC Insights Japan-based companies have cut back foundries in China, raising the number analyst who tracks power ICs as on investments in system-on-chip of competitors to about 15. “We have part of the market research firm’s production, “they keep investing in seen new business models emerge, report on optoelectronics, sensors, the power area. No one is selling off or and unexpected players entering,” and discretes (O-S-D), said much of consolidating in this area.” Yole concluded. the attention in the power field has Market research firm Yole For a variety of technical reasons, been on mobile systems, principally Développement predicts 19.5% growth SJ power ICs are gaining acceptance smartphones. “Battery power for the power electronics market— compared with conventional power management has been talked about including power ICs, power modules, MOSFETs, particularly in consumer for so long. But there is renewed and discretes such as rectifiers—with applications such as phones and tablets. attention on reducing the power total revenues for the sector approaching With their high aspect ratio (HAR) consumption of the big computers $14 billion. Revenues for power ICs by trenches, SJ MOSFETs can be much and switches, partly so we can cut themselves will increase from $3 billion smaller than lateral or planar power air pollution from the power plants. in 2013 to about $3.55 billion in 2014. MOSFETs, with faster switching speeds Power management plays across By 2018 power electronics will be a due to a lower ON resistance. Though SJ the whole range of systems, and $16 billion sector, the market researcher MOSFETs can also be used in relatively there is a lot of money there for the predicts, with power ICs accounting for high-power applications, the architecture Power semiconductor companies.” $4.23 billion of the total. excels in the small power supplies used The consolidation in the chip In a 2013 study of the super in mobile systems that must stay within industry, so Darwinian for makers junction (SJ) power IC market, Yole a relatively low operating temperature of memory and digital ICs, has not noted that several new players entered range. Vendors are reducing the die sizes impacted the power IC market as the SJ MOSFET market over the last of SJ offerings, and smaller packages Struggle: severely. Lineback noted that while 36 months, including some smaller also are coming to the market. A s mobile systems offer additional MEMS sensors, power is a primary challenge

By To be sure, we can all look forward to an array of exciting new capabilities built into everything you can imagine−from cars and smartphones to intelligent appliances David and wearable technology−based on a range of new sensors and ICs (see figure 1). Lammers The behind-the-scenes challenge, however, is to deliver power to those components without exceeding the system’s power budget. That is spurring power IC vendors to develop new device architectures and advanced 200mm manufacturing techniques.

Jeremie Bouchaud, senior As more sensors are added, able to lay a smartphone down principal analyst for MEMS and consumers are keeping one eye on on the car’s center console to charge sensors at market research firm IHS, the battery’s charge level. Partly the battery. said environmental sensors on the to keep power under control, the Other developing−and horizon will turn smartphones into iPhone5 includes a dedicated potentially huge−markets for “micro gas chromatographs” able to coprocessor to handle the fingerprint power semiconductors include monitor pollen in the air or alcohol processing and other data streams solar-powered buildings and on one’s breath. STMicroelectronics coming from MEMS devices. And battery-powered electric vehicles, foresees each phone having a micro with Intel Corporation squarely which depend on efficient high- display capability. Apple’s decision to behind the trend, smartphone and voltage power-switching ICs. Home Figure 1. Today’s advanced power switching applications are driven mostly by the fast-growing consumer market. While higher provide a fingerprint MEMS sensor in mobile computer users soon may be appliances and HVAC systems are frequency and ever higher power-handling capabilities are sought, portability is also a key factor because there is increasing its latest iPhone will soon be emulated able to take advantage of wireless fertile markets for smarter power pressure to make these devices smaller and more efficient. In doing so, the device density increases and so does the complexity of by the Android smartphone camp. charging; for example, drivers may be electronics (see figure 2). manufacturing for this class of semiconductor power device. (Courtesy of Yole Développement.)

6 Nanochip Nanochip 7 Rob Lineback, an IC Insights Japan-based companies have cut back foundries in China, raising the number analyst who tracks power ICs as on investments in system-on-chip of competitors to about 15. “We have part of the market research firm’s production, “they keep investing in seen new business models emerge, report on optoelectronics, sensors, the power area. No one is selling off or and unexpected players entering,” and discretes (O-S-D), said much of consolidating in this area.” Yole concluded. the attention in the power field has Market research firm Yole For a variety of technical reasons, been on mobile systems, principally Développement predicts 19.5% growth SJ power ICs are gaining acceptance smartphones. “Battery power for the power electronics market— compared with conventional power management has been talked about including power ICs, power modules, MOSFETs, particularly in consumer for so long. But there is renewed and discretes such as rectifiers—with applications such as phones and tablets. attention on reducing the power total revenues for the sector approaching With their high aspect ratio (HAR) consumption of the big computers $14 billion. Revenues for power ICs by trenches, SJ MOSFETs can be much and switches, partly so we can cut themselves will increase from $3 billion smaller than lateral or planar power air pollution from the power plants. in 2013 to about $3.55 billion in 2014. MOSFETs, with faster switching speeds Power management plays across By 2018 power electronics will be a due to a lower ON resistance. Though SJ the whole range of systems, and $16 billion sector, the market researcher MOSFETs can also be used in relatively there is a lot of money there for the predicts, with power ICs accounting for high-power applications, the architecture Power semiconductor companies.” $4.23 billion of the total. excels in the small power supplies used The consolidation in the chip In a 2013 study of the super in mobile systems that must stay within industry, so Darwinian for makers junction (SJ) power IC market, Yole a relatively low operating temperature of memory and digital ICs, has not noted that several new players entered range. Vendors are reducing the die sizes impacted the power IC market as the SJ MOSFET market over the last of SJ offerings, and smaller packages Struggle: severely. Lineback noted that while 36 months, including some smaller also are coming to the market. A s mobile systems offer additional MEMS sensors, power is a primary challenge

6 Nanochip Nanochip 7 Power Mike Rosa, 200mm strategic “This etch system is aimed Struggle marketing manager for emerging at a broad swathe of applications, markets at Applied Global Services, including power and MEMS. There is said “for the epi steps, everyone wants interest in making devices with very high throughput; 40 to 100 microns high aspect ratio (VHAR) submicron of epi at greater than 4 microns per trenches from companies making minute. Once grown, customers many kinds of products−optical need to etch trenches in the blanket devices, inkjet heads, even things like film with a DRIE process. The DRIE blood filters,” Farr said. process must have a high etch rate, SJ power MOSFETs are as well as the ability to handle slightly challenging, partly because the tapered structures.” trenches have a high open area due to Subsequent processes include a the pitch, often with a 50% open area Figure 3. Next-generation devices will require reduced pressure epi to then fill these and a 10:1 aspect ratio. CDs range a unique combination of fine CD or sub-micron structures in a void-free, uniformly from 1 to 5 microns. While the aspect capability and deep trench etch to produce tightly doped manner. “With Applied’s ratio of trenches in memory ICs rarely packed devices with aspect ratios approaching or DRIE etch tool we can do etch rates of goes beyond 10:1, deep silicon etch in excess of 100:1. (Source: Applied Materials) 15 microns per minute, with excellent steps are at ratios of 10:1 to 100:1. uniformity across the wafer. That Customer applications are divided leaves us well positioned to apply it to between single-step etch methods power chips,” Rosa said. and the Bosch process, each having The critical dimension (CD) of its specific advantages. The single- the trench opening is also challenging. step process works well for creating Rosa said today’s state of the art is the smooth sidewalls required for approximately 1 to 2 microns and 40 miniaturized SJ devices, he said. microns deep. “We can shrink it. Using While another emerging market, Figure 2. The push for more functionality in portable electronics has resulted in more MEMS technology with each generation of consumer device. our DRIE tool, we can shrink the trench through-silicon vias (TSVs) also Some MEMS devices, such as the Inkjet, are mature; others, such as the inertial measurement unit (IMU) combo sensor, are in a high-growth phase. CD in a gyroscope to .2 microns or 200 requires deep trenches, Farr said Devices such as pico projectors are still emerging. All these devices compete for mobility power resources. (Source: Applied Materials) nanometers. The fingers become five TSV trenches are not particularly times more sensitive as compared to demanding, and only require low- Figure 4. Advanced DRIE solutions for SJ power Insulated gate bipolar transistors through epitaxial doped regions. For relatively time-consuming, requiring the 1-micron CD structures. With the cost, high-throughput systems. devices call for exacting control over the sidewall (IGBTs), the higher power switching the increasingly popular SJ devices, the multiple thick-epi growth steps capabilities of this new etch product, “What we are doing is more difficult. profile, undercut, and selectivity to the oxide chips used in industrial electronics, thickness of the doped regions impacts followed by dopant implantation and customers can either make the gap With gyroscopes (MEMS), such a and photoresist masks used. (Source: Applied Materials) electric vehicles (EVs) and electric the ON resistance (Ron), which controls annealing to activate the dopants. smaller and have the same number level of precision is required that each utilities, are also undergoing the switching speed, but making them Accurately placing the dopants is of fingers, or make the fingers smaller device has to be electrically tested.

manufacturing developments. IGBTs too thin affects the necessary Roff. challenging. and keep the gap the same, or use With SJs, there are challenges with Waiting in the wings of can gain switching performance Bringing the heavily doped columns The deep trench approach, by fewer fingers,” said Rosa, who earned the large open area, loading, and CD the power IC market are two by thinning the wafer, and market closer together can improve the contrast, involves etching a trench his doctorate in MEMS technology. uniformity.” developing processes, one based leader Infineon is moving to thinner performance of power ICs. and then backfilling it with highly Applied’s etcher is a cluster-type on gallium nitride (GaN) and one 300mm wafers for its high-volume Applied Materials has efforts doped epi films. DRIE, however, D eep Trench Etcher tool, capable of plugging in up to four using silicon carbide (SiC), each bipolar products. Lineback said underway to improve the epitaxial, requires excellent sidewall profile etch chambers. The RF configuration Jon Farr, senior etch product bearing the challenges associated “using vertical trench structures deep reactive ion etching (DRIE), control, at a high etch rate, with was modernized to improve the manager, said Applied’s deep trench with compound substrates and and wafer thinning improves the and dense aluminum interconnect uniformity across the wafer. Deep across-wafer CD uniformity and etch product is targeted primarily the promise associated with wide switching speed of the IGBTs. But the deposition steps. For SJ MOSFETs trench MEMS, such as gyroscopes, provide for higher open areas and at power ICs and MEMS. It features band-gap materials. With revenues problem has been that thinning the created with the deep trench method can require etching of trenches as improved across-wafer depth decoupled inductive and capacitive growing and multiple companies wafers creates some other problems, instead of the multi-step epitaxial deep as 40–50 microns with high uniformity. reactor sources. Applied’s DPS investing in new manufacturing and Infineon is always working on deposition and doping approach, precision. Figure 3 shows an example “We changed the way the reactor source is a two-part chamber, with techniques and materials, the power improving its trench stop technology.” DRIE is the critical difference. of DRIE for MEMS using Applied’s works, with more digital controls a lower loading chamber and an electronics market will be well worth Deep trench SJ MOSFETs 200mm etch tool. Deep trench SJ requiring more computing power. upper process chamber. The system paying close attention to. have certain advantages. The MOSFETs can involve, for example, Customers can configure the system Epi itax al Growth offers good uniformity, repeatable and Deep RIE conventional, and still-mainstream 60-micron trenches with slightly with metal etch, deep trench reactors, For additional information, performance, low aspect ratio contact [email protected] approach, which builds up the tapered sidewalls so the trench can strippers, and so on—all on one In all types of power devices, dependence, and long time between epitaxial layers one by one, is be filled without voids (see figure 4). platform,” Farr said. current flows from top to bottom cleans (LTBC), Farr said.

8 Nanochip Nanochip 9 Power Mike Rosa, 200mm strategic “This etch system is aimed Struggle marketing manager for emerging at a broad swathe of applications, markets at Applied Global Services, including power and MEMS. There is said “for the epi steps, everyone wants interest in making devices with very high throughput; 40 to 100 microns high aspect ratio (VHAR) submicron of epi at greater than 4 microns per trenches from companies making minute. Once grown, customers many kinds of products−optical need to etch trenches in the blanket devices, inkjet heads, even things like film with a DRIE process. The DRIE blood filters,” Farr said. process must have a high etch rate, SJ power MOSFETs are as well as the ability to handle slightly challenging, partly because the tapered structures.” trenches have a high open area due to Subsequent processes include a the pitch, often with a 50% open area Figure 3. Next-generation devices will require reduced pressure epi to then fill these and a 10:1 aspect ratio. CDs range a unique combination of fine CD or sub-micron structures in a void-free, uniformly from 1 to 5 microns. While the aspect capability and deep trench etch to produce tightly doped manner. “With Applied’s ratio of trenches in memory ICs rarely packed devices with aspect ratios approaching or DRIE etch tool we can do etch rates of goes beyond 10:1, deep silicon etch in excess of 100:1. (Source: Applied Materials) 15 microns per minute, with excellent steps are at ratios of 10:1 to 100:1. uniformity across the wafer. That Customer applications are divided leaves us well positioned to apply it to between single-step etch methods power chips,” Rosa said. and the Bosch process, each having The critical dimension (CD) of its specific advantages. The single- the trench opening is also challenging. step process works well for creating Rosa said today’s state of the art is the smooth sidewalls required for approximately 1 to 2 microns and 40 miniaturized SJ devices, he said. microns deep. “We can shrink it. Using While another emerging market, Figure 2. The push for more functionality in portable electronics has resulted in more MEMS technology with each generation of consumer device. our DRIE tool, we can shrink the trench through-silicon vias (TSVs) also Some MEMS devices, such as the Inkjet, are mature; others, such as the inertial measurement unit (IMU) combo sensor, are in a high-growth phase. CD in a gyroscope to .2 microns or 200 requires deep trenches, Farr said Devices such as pico projectors are still emerging. All these devices compete for mobility power resources. (Source: Applied Materials) nanometers. The fingers become five TSV trenches are not particularly times more sensitive as compared to demanding, and only require low- Figure 4. Advanced DRIE solutions for SJ power Insulated gate bipolar transistors through epitaxial doped regions. For relatively time-consuming, requiring the 1-micron CD structures. With the cost, high-throughput systems. devices call for exacting control over the sidewall (IGBTs), the higher power switching the increasingly popular SJ devices, the multiple thick-epi growth steps capabilities of this new etch product, “What we are doing is more difficult. profile, undercut, and selectivity to the oxide chips used in industrial electronics, thickness of the doped regions impacts followed by dopant implantation and customers can either make the gap With gyroscopes (MEMS), such a and photoresist masks used. (Source: Applied Materials) electric vehicles (EVs) and electric the ON resistance (Ron), which controls annealing to activate the dopants. smaller and have the same number level of precision is required that each utilities, are also undergoing the switching speed, but making them Accurately placing the dopants is of fingers, or make the fingers smaller device has to be electrically tested.

8 Nanochip Nanochip 9 How do you stay on top when times are tough? For Europe’s biggest chipmaker, STMicroelectronics, it takes a renewed focus on the five markets STMicroelectronics: where the company has the products, technology and ambition to lead.

ST already holds top-3 positions technical mission, but there is also By in some of those key markets—and flexibility across sites and with foundry On Top of Adele plans to win more. Orio Bellezza, partners to ensure appropriate support executive vice president and general for customers as needed. Hars manager of Front-End Manufacturing Because ST offers thousands of & Technology R&D for ST’s Sense & products, each fab runs anywhere Power and Automotive Product (SP&A) from one- to three-dozen processes, Key Markets segment (and member of ST’s Strategic each with multiple variations and Committee) explains how. “You need each variation requiring multiple mask scale,” he said. “You need to be on top sets. Price pressure on high-volume of large, growing markets, with leading applications requires optimal scheduling customers, and driving innovative across the manufacturing sites. applications. The name of the game is While this kind of scheduling is to be fast and first.” A key component complex to manage, “ST has a very in the strategy, he says, is “relentless efficient planning system at a central commitment to process technology.” level to optimize asset utilization and ST already has the leading deliver the service and responsiveness customers: Apple, Bosch, Cisco, expected by our customers,” said Continental, HP, Samsung, Sony and Bellezza. “At a local level, of course Western Digital, among others. But the MES and automation systems play the company also sells more and more important roles in fab management to diversified markets and smaller and we work on their continuous customers, especially through its evolution and adaptation in the fab. distribution channel. In 150 and 200mm our focus is not The company has six front-end so much on the transportation manufacturing sites serving two main [AMHS] but more on WIP manage- product blocks: Sense & Power and ment, advanced process control and Automotive (SP&A), located primarily data analysis.” in Italy (around Milan and Catania) and Manufacturing is tightly coupled Singapore, and Embedded Processing with R&D; together they account for Solutions (EPS), located mainly in almost a quarter of the company’s and around Grenoble and Rousset. workforce. “It’s very important for us to ST also manages its own back end have manufacturing and R&D people and packaging, primarily at sites in working side-by-side, developing Orio Bellezza, executive vice president China, Malaysia, Malta, Morocco, the technology and translating it to and general manager of Front-End Philippines and Singapore. volume,” explained Bellezza. “We often Manufacturing & Technology R&D for The main technologies ST will have R&D and manufacturing in the ST’s Sense & Power and Automotive focus on are: MEMS and sensors; same fab, which speeds development.” Products segment and member of smart power; set-top box/home In fact, Bellezza attributes ST’s ST’s Strategic Committee gateway and ASICs; microcontrollers; leadership in MEMS today to the and automotive. strong contribution and ability of the teams around Milan (and in Malta’s C lusters of Competencies back end) to manage a very efficient coordination among design, technology The manufacturing sites and manufacturing, enabling fast time are organized into “clusters of to market and volume. It’s an excellent competencies” comprising design, example of how the flow of information technology and manufacturing, toward manufacturing, the learning STMicrosystems operations in Agrate, Italy. explained Bellezza. Each fab has a

10 Nanochip Nanochip 11 How do you stay on top when times are tough? For Europe’s biggest chipmaker, STMicroelectronics, it takes a renewed focus on the five markets STMicroelectronics: where the company has the products, technology and ambition to lead.

10 Nanochip Nanochip 11 STMicroelectronics: O Keyn To Marp of kets to follow next year. As the investments reduce costs. Is moving to larger ability to compete is strongly related required are immense, “competencies wafer sizes the solution? Bellezza to our technology capabilities. clustering” is shared across alliances believes there are essentially three So we keep developing internally with IBM and GlobalFoundries. approaches to reducing costs: those manufacturing technologies Under the Nano2017 public/private design and innovation, wafer that enable us to differentiate our investment initiative, enhanced R&D diameter and optical shrink. portfolio. Of course, we don’t sell efforts will support customer demand Optical shrink is slowing in technology; we sell products.” by increasing the capacity of ST’s CMOS, and while going to larger In recent months, ST has 300mm fab. It’s expected to grow from wafer diameters can be helpful, announced a host of new 3,500 wafers per week to 5,700 wafers especially on the digital side, it is not technologies that are enabling per week by 2017, and ultimately reach a panacea. Bellezza cited issues in new products. But if there’s one 7,000 wafers per week. moving to 450mm with step-and- thing that gets Bellezza excited, it’s The €3.5 billion Nano2017 scan lithography tools. Basically, the clearly the prospects for automotive Power and other BDC products are produced at ST’s Catania facility. initiative is so important that the bigger the wafer, the more step-and- applications. Historically northern French government has announced scan steps you need to do. “Those Italy, including greater Milan and and the anticipation of problems in might be some outsourcing of very it will contribute €600 million to it. machines have not yet made the Turin, which are among Europe’s the development phase are naturally high volume motion sensors, there The French government contends leap—in fact, to expose a 450mm wealthiest cities, is an important addressed with time-to-volume are a lot of other flavors of MEMS and that Nano2017 will make ST Grenoble wafer takes two to three times area for the automotive industry. It is in mind. And with good R&D and sensors in the pipeline. one of the three pillars (along with longer [you have to stay on the home to Fiat, Pirelli and Alfa Romeo, coordination comes higher yields. With the “humanization” of user GlobalFoundries Dresden and wafer longer to get all dice exposed], the prestigious Milan and Turin “There is a lot of innovation interfaces, ST is anticipating a radical FD-SOI technology will be in a broad NXP Eindhoven) of the European so there’s no gain in those expensive Polytechnic Universities, and the here,” said Bellezza. Teamwork and expansion in smarter technologies range of applications for higher Horizon2020 program, which begins in process steps. The economics don’t famous Monza racetrack. meetings are part of the daily job. for capturing gesture, voice and performance with lower power January 2014. yet make sense,” he said. ST is in the top three of the Process control, stored program touch for markets such as health consumption. “All of this is before On the analog side (“south of On the analog side, ST is world’s biggest suppliers to the control, equipment management—all and wellness, wearable electronics, you even start talking about electric the Alps”), ST is also investing in the moving two of its 150mm lines to automotive market. It is first in are well mastered when ownership is and applications related to the vehicles!” he exclaimed. next technology nodes for its fabs in 200mm, but Bellezza does not smart power (with 25% market transferred from the R&D team to the Internet of Things. Targeting strong “I think ST definitely has all Catania, which do volume production see MEMS products in his SP&A share), ASICs, active safety and manufacturing engineers. growth for MEMS, the company is the ingredients to enhance our of smart power and other BCD- segment moving from 200mm to audio power amps, and second ST also insists on strong looking beyond its successful lines leadership in this continuously based products and development 300mm anytime soon. “There’s in infotainment. “Our relentless cooperation with the equipment of accelerometers and gyroscopes growing and evolving sector, for advanced discrete products; and still a huge market for 200mm,” he efforts to improve safety, reduce fuel suppliers, he noted, not just for to actuation (for example, mirrors including full ownership and Agrate, which does advanced BCD, said. “Of course you always need consumption, expand entertainment 300mm work but for analog, MEMS for micro-projectors), acoustics and ongoing investments in process and smart power devices and MEMS to continuously reduce process and infotainment options, and enable and even discrete products. Things environmental sensors. technology—especially at our R&D along with volume manufacturing. complexity and look for savings more efficient hybrid and electric like wafer thinning and doping, and However, the company does Crolles and Agrate technology in material costs and energy vehicles, make the car our most specialized interconnection schemes, take different approaches to R&D for centers—and full control of the R educing costs consumption.” exciting lab for electronics,” he said. as well as new materials integration, CMOS logic vs. the analog and MEMS supply chain through internal But in a business driven by As is often noted, the percentage require specific tools and strong side of things. For advanced CMOS, ST operates 150mm, 200mm manufacturing,“ said Bellezza. the steady reduction of price-per- of electronics in automotive BOMs support from suppliers. ST has pioneered FD-SOI, which is in and 300mm fabs, and like everyone With new technologies function, where do you focus your is increasing rapidly. “ST has a The tight coupling of R&D with production now at 28nm, with 14nm else in the industry, is working to coming to the fore, opportunities cost reduction efforts? “You have unique portfolio of technologies and manufacturing is another reason that abound. While typically ST works to bet on innovation,” said Bellezza. products that cover the full spectrum a major move to outsourcing is not interactively with customers to “Collaboration and support of key of opportunities, in most cases with envisioned for the SP&A segment. provide options, performance and suppliers is very important. For a leadership position,” he continued. “We have a broad portfolio, we’re enabling products, sometimes example, if you’re moving to cheaper Bellezza cited advanced BCD smart building on it, and we need to be in areas like analog and MEMS materials, you need to address the power for power train control, fuel very fast,” said Bellezza. Take MEMS “we find we can offer things our processes and equipment, find new consumption control, car radio for example, where ST is the world customers couldn’t even have recipes, and improve equipment and several other applications; leader. ST was the first company to imagined!” concluded Bellezza. productivity and efficiency.” embedded non-volatile memory move to 200mm MEMS R&D and (NVM) for microcontrollers; Adele Hars is a writer and director production. The company’s MEMS Differentiation advanced CMOS for image sensing of High Tech International, based in sales exceeded $1 billion, according to and processing; and MEMS motion Paris, France. research firm Yole Développement, As an IDM, “ST’s objective is and environmental sensors for while its market share grew from 43% to offer something differentiating,” Special thanks to Laura Bertarelli for active safety and comfort. ST’s new in 2011 to 48% today. While there noted Bellezza. As for analog, “our her support of this article.

12 Nanochip Nanochip 13 STMicroelectronics: O Keyn To Marp of kets to follow next year. As the investments reduce costs. Is moving to larger ability to compete is strongly related required are immense, “competencies wafer sizes the solution? Bellezza to our technology capabilities. clustering” is shared across alliances believes there are essentially three So we keep developing internally with IBM and GlobalFoundries. approaches to reducing costs: those manufacturing technologies Under the Nano2017 public/private design and innovation, wafer that enable us to differentiate our investment initiative, enhanced R&D diameter and optical shrink. portfolio. Of course, we don’t sell efforts will support customer demand Optical shrink is slowing in technology; we sell products.” by increasing the capacity of ST’s CMOS, and while going to larger In recent months, ST has 300mm fab. It’s expected to grow from wafer diameters can be helpful, announced a host of new 3,500 wafers per week to 5,700 wafers especially on the digital side, it is not technologies that are enabling per week by 2017, and ultimately reach a panacea. Bellezza cited issues in new products. But if there’s one 7,000 wafers per week. moving to 450mm with step-and- thing that gets Bellezza excited, it’s The €3.5 billion Nano2017 scan lithography tools. Basically, the clearly the prospects for automotive Power and other BDC products are produced at ST’s Catania facility. initiative is so important that the bigger the wafer, the more step-and- applications. Historically northern French government has announced scan steps you need to do. “Those Italy, including greater Milan and and the anticipation of problems in might be some outsourcing of very it will contribute €600 million to it. machines have not yet made the Turin, which are among Europe’s the development phase are naturally high volume motion sensors, there The French government contends leap—in fact, to expose a 450mm wealthiest cities, is an important addressed with time-to-volume are a lot of other flavors of MEMS and that Nano2017 will make ST Grenoble wafer takes two to three times area for the automotive industry. It is in mind. And with good R&D and sensors in the pipeline. one of the three pillars (along with longer [you have to stay on the home to Fiat, Pirelli and Alfa Romeo, coordination comes higher yields. With the “humanization” of user GlobalFoundries Dresden and wafer longer to get all dice exposed], the prestigious Milan and Turin “There is a lot of innovation interfaces, ST is anticipating a radical FD-SOI technology will be in a broad NXP Eindhoven) of the European so there’s no gain in those expensive Polytechnic Universities, and the here,” said Bellezza. Teamwork and expansion in smarter technologies range of applications for higher Horizon2020 program, which begins in process steps. The economics don’t famous Monza racetrack. meetings are part of the daily job. for capturing gesture, voice and performance with lower power January 2014. yet make sense,” he said. ST is in the top three of the Process control, stored program touch for markets such as health consumption. “All of this is before On the analog side (“south of On the analog side, ST is world’s biggest suppliers to the control, equipment management—all and wellness, wearable electronics, you even start talking about electric the Alps”), ST is also investing in the moving two of its 150mm lines to automotive market. It is first in are well mastered when ownership is and applications related to the vehicles!” he exclaimed. next technology nodes for its fabs in 200mm, but Bellezza does not smart power (with 25% market transferred from the R&D team to the Internet of Things. Targeting strong “I think ST definitely has all Catania, which do volume production see MEMS products in his SP&A share), ASICs, active safety and manufacturing engineers. growth for MEMS, the company is the ingredients to enhance our of smart power and other BCD- segment moving from 200mm to audio power amps, and second ST also insists on strong looking beyond its successful lines leadership in this continuously based products and development 300mm anytime soon. “There’s in infotainment. “Our relentless cooperation with the equipment of accelerometers and gyroscopes growing and evolving sector, for advanced discrete products; and still a huge market for 200mm,” he efforts to improve safety, reduce fuel suppliers, he noted, not just for to actuation (for example, mirrors including full ownership and Agrate, which does advanced BCD, said. “Of course you always need consumption, expand entertainment 300mm work but for analog, MEMS for micro-projectors), acoustics and ongoing investments in process and smart power devices and MEMS to continuously reduce process and infotainment options, and enable and even discrete products. Things environmental sensors. technology—especially at our R&D along with volume manufacturing. complexity and look for savings more efficient hybrid and electric like wafer thinning and doping, and However, the company does Crolles and Agrate technology in material costs and energy vehicles, make the car our most specialized interconnection schemes, take different approaches to R&D for centers—and full control of the R educing costs consumption.” exciting lab for electronics,” he said. as well as new materials integration, CMOS logic vs. the analog and MEMS supply chain through internal But in a business driven by As is often noted, the percentage require specific tools and strong side of things. For advanced CMOS, ST operates 150mm, 200mm manufacturing,“ said Bellezza. the steady reduction of price-per- of electronics in automotive BOMs support from suppliers. ST has pioneered FD-SOI, which is in and 300mm fabs, and like everyone With new technologies function, where do you focus your is increasing rapidly. “ST has a The tight coupling of R&D with production now at 28nm, with 14nm else in the industry, is working to coming to the fore, opportunities cost reduction efforts? “You have unique portfolio of technologies and manufacturing is another reason that abound. While typically ST works to bet on innovation,” said Bellezza. products that cover the full spectrum a major move to outsourcing is not interactively with customers to “Collaboration and support of key of opportunities, in most cases with envisioned for the SP&A segment. provide options, performance and suppliers is very important. For a leadership position,” he continued. “We have a broad portfolio, we’re enabling products, sometimes example, if you’re moving to cheaper Bellezza cited advanced BCD smart building on it, and we need to be in areas like analog and MEMS materials, you need to address the power for power train control, fuel very fast,” said Bellezza. Take MEMS “we find we can offer things our processes and equipment, find new consumption control, car radio for example, where ST is the world customers couldn’t even have recipes, and improve equipment and several other applications; leader. ST was the first company to imagined!” concluded Bellezza. productivity and efficiency.” embedded non-volatile memory move to 200mm MEMS R&D and (NVM) for microcontrollers; Adele Hars is a writer and director production. The company’s MEMS Differentiation advanced CMOS for image sensing of High Tech International, based in sales exceeded $1 billion, according to and processing; and MEMS motion Paris, France. research firm Yole Développement, As an IDM, “ST’s objective is and environmental sensors for while its market share grew from 43% to offer something differentiating,” Special thanks to Laura Bertarelli for active safety and comfort. ST’s new in 2011 to 48% today. While there noted Bellezza. As for analog, “our her support of this article.

12 Nanochip Nanochip 13 NEWO CONTR LLER Legacy 200mm tools are workhorses. Their reliability, economy and performance make them attractive to manufacturers who produce analog, ETN X E DS LIFE image sensor, MEMS and power products and for whom scaling and OF 200mm OTO LS migration to larger wafer sizes are not currently high priorities.

However, there are concerns with these older tools regarding requiring process or product requalification. Applied’s new controller continuing productivity, availability and uptime—critical requirements is specifically designed to help semiconductor manufacturers for cost-effective fabrication. minimize the need for tool and process requalification. Among these concerns are questions about the continued The new SBC is designed to be fully backward-compatible with availability of parts and whether the tools can accommodate modern the existing version of software on any tool, as well as process- advanced process control (APC) to enable fault detection and transparent with existing recipes. Using a proprietary Applied classification (FDC), as well as run-to-run and statistical process software interpreter layer, the SBC links a user’s specific version of control technologies. Applied Materials’ new system controller legacy application software to the modern electronic architecture, upgrade for its 200mm tools addresses these concerns by replacing enabling the upgraded system to provide consistent control the performance-limiting electronics in the original system controller, functionality. Recipes are executed in exactly the same way as before. which is fast becoming obsolete, with a new version (see figure 1). The Operators have a familiar user experience with the same system upgraded controller offers: interface (see figure 1). ■■ Easy connectivity of legacy tools with modern APC software for To achieve this, Applied conducted extensive in-house testing of higher yields and lower cost production the controller upgrade and followed that by collaborating with chip manufacturers for production-validation tests. ■■ Much faster and more robust data collection, enabling the use of FDC analysis tools to help optimize device performance and yield PROME F R ANCE VALIDATED IN PRODUCTION TESTS ■■ Greatly improved system data management, storage and By Maintaining the viability of 200mm fabs cost-effectively for protection another 10-15 years is critical to many customers who believe that JEFFREY ■■ Full backward compatibility with each tool’s existing application supporting an aging installed base requires close cooperation with DIETZ AND software version their equipment manufacturers. ■■ Process- and recipe transparency with the same look and feel Working together at one customer’s fab, the Applied/ CHERYL for operators and technicians customer team needed only a single day to swap the controller hardware and restart one of the customer’s Applied Endura tools. ■■ Readily available component supplies for future repairs KNEPFLER This work included a complete hard drive backup, which captured and upgrades Figure 1. Applied’s new controller for legacy 200mm tools makes tool settings and performance set points. No recalibration was Applied’s new controller includes an advanced single-board it possible for customers to develop new materials and processes. required to achieve the same performance in the tool’s material- computer (SBC) with a 2.6 GHz Intel Core CPU and Windows 7 It provides fast data-collection capabilities for advanced FDC, handling functions, a result similar to a standard tool recovery or operating system. It is fully and easily compatible with contemporary high connectivity for remote monitoring/control and scalability, restart procedure. data communications architectures and technologies, making remote and uses a modern operating system and components to ensure The process transparency of the upgraded Endura tool was monitoring/control and high-speed host communications possible. easy parts replacement. evaluated and verified in production during more than three months New features not available in the legacy design include 4 Ethernet and over 30,000 wafers. Regular film properties tests of the up- ports for advanced HSMS, with additional data access from 6 USB 2.0 graded tool and, ultimately, end-of-line output were compared with connections, and 16 additional serial ports. other systems on the line. The electrical tests evaluated four metal layers on five different tools comparing contact resistance, intermetal MINIMID ZE REQUALIFICATIONS leakage, sheet resistance and via resistance. The execution of recipes Significant hardware changes within a fab’s qualified production on the tool equipped with the new controller matched that of like tools flow can increase manufacturing risk and change control costs by that still use the original controller, with no need to alter any recipes.

14 Nanochip Nanochip 15 NEWO CONTR LLER Legacy 200mm tools are workhorses. Their reliability, economy and performance make them attractive to manufacturers who produce analog, ETN X E DS LIFE image sensor, MEMS and power products and for whom scaling and OF 200mm OTO LS migration to larger wafer sizes are not currently high priorities.

14 Nanochip Nanochip 15 NEW CONtrOLLER ETN X E DS LIFE OF 200mm OTO LS As file load on the legacy HDD increases, throughput drops. With the new controller this performance loss does not occur; throughput is optimized to full system entitlement. The increase in system throughput depends on many variables, including product line, configuration, recipe time, and system maintenance practices. The tests at the customer site showed increases between 1.0% and 2.3%, depending on the application. Stable high-quality data and higher data transfer rates also enable customers to build viable FDC models that more effectively identify yield excursions, to initiate root cause analyses, and to provide feedback to APC systems to improve yield. To be most effective in capturing short-duration events of interest, these FDC models require data sampling rates of 10Hz or greater and at least 100 SVIDs (status variable identifier data). Figure 4. Communications rate matched performance of HSMS-enabled Until now FDC has had limited efficacy with legacy 200mm original controller. tools because the data sampling rate was too low. The priority had been placed on the stability of the controller interface with factory design already includes Ethernet HSMS, eliminating the need for automation software, rather than on data collection. this additional hardware. Now, however, the controller upgrade supports up to 10Hz Figure 4 shows the results of fab-host communications data sampling and for the first time enables the use of viable FDC tests where the new controller matched the performance of the models with these tools. It also allows the use of sophisticated factory Figure 2. Thickness and resistance performance results for three film types and four chambers demonstrate transparency between the original and HSMS-upgraded communication system on the customer tool. automation software such as Applied’s E3 environment. new controllers. Implementation was accomplished by simply connecting to the fab host to one of the four standard Ethernet ports, with no other Figure 2 provides film control-chart comparison data demonstrat- shows a subset of the electrical results, with excellent agreement PSBA U H CK ON OBSOLESCENCE modification or optimization required. ing recipe transparency, with excellent repeatability of performance on between the tool running with the new controller and five additional The original design of the SBC used in Applied’s Endura and the test tool before and after the installation of the new controller. tools running concurrent production on the same device. B Etter DATA, BETTER RESULTS Centura tools is more than 20 years old and is based on the 30 MHz The process transparency was assessed by processing thou- The serial communications rate for the original controller is Motorola 68000-type processor. As time marches on for legacy sands of production wafers and measuring more than 15 electrical up to 19.2 kHz. A small subset of the installed base, including our The new controller manages interaction within the system much tools, about 3% of parts become obsolete each year. Most of those structures covering all metal layers, and sampling the contact, via beta site, has been upgraded with additional hardware to enable faster and more efficiently than the original controller, eliminating are electrical parts. Manufacturers began discontinuing production and sheet resistance as well as wire and intermetal leakage. Figure 3 HSMS, which delivers up to 100MHz. The new controller upgrade bottlenecks that negatively impact throughput. Internal testing of the SBC’s key components in 2007; the remaining stock will soon demonstrated an Endura throughput increase of as much as 6% from be depleted. Virtually all of the SBC’s building blocks are impacted, the optimized interaction between the hard disk drive (HDD) and the including the CPU, memory/memory controllers, PLDs, FGPAs, and CPU (see figure 5). I/O controllers. In addition to the obsolescence problem, many of the critical components of the legacy controller for Applied’s Endura and Centura tools have design limitations. These present a major barrier to the use of modern monitoring and control techniques that are proven to increase yields and reduce costs. Extending the life of mature equipment is a very attractive way to minimize capital expenditures. Applied’s new controller for 200mm tools offers customers the opportunity to do just that. The new controller greatly improves Centura and Endura performance and uses new, readily available components. It offers a low risk, plug-and-play, process-transparent system enhancement on a modern platform with the processing power to add new applications or modules, and to enable effective fault detection and fab automation. By upgrading to the new controller, customers can bring their tried-and- Figure 5. Internal test data demonstrating the impact file volume has on true 200mm production tools into the modern age. the performance of legacy systems. With the original controller, as file load on the HDD increases throughput drops. With the new controller, For additional information, contact [email protected] this performance loss does not occur; throughput is optimized to full Figure 3. Electrical performance of the new controller (in blue) was in line with five tools running the original hardware. Contact resistance, sheet system entitlement. resistance, via resistance and leakage were comparable for all metal levels of the device.

16 Nanochip Nanochip 17 NEW CONTROLLER EXTENDS LIFE OF 200mm TOOLS As file load on the legacy HDD increases, throughput drops. With the new controller this performance loss does not occur; throughput is optimized to full system entitlement. The increase in system throughput depends on many variables, including product line, configuration, recipe time, and system maintenance practices. The tests at the customer site showed increases between 1.0% and 2.3%, depending on the application. Stable high-quality data and higher data transfer rates also enable customers to build viable FDC models that more effectively identify yield excursions, to initiate root cause analyses, and to provide feedback to APC systems to improve yield. To be most effective in capturing short-duration events of interest, these FDC models require data sampling rates of 10Hz or greater and at least 100 SVIDs (status variable identifier data). Figure 4. Communications rate matched performance of HSMS-enabled Until now FDC has had limited efficacy with legacy 200mm original controller. tools because the data sampling rate was too low. The priority had been placed on the stability of the controller interface with factory design already includes Ethernet HSMS, eliminating the need for automation software, rather than on data collection. this additional hardware. Now, however, the controller upgrade supports up to 10Hz Figure 4 shows the results of fab-host communications data sampling and for the first time enables the use of viable FDC tests where the new controller matched the performance of the models with these tools. It also allows the use of sophisticated factory Figure 2. Thickness and resistance performance results for three film types and four chambers demonstrate transparency between the original and HSMS-upgraded communication system on the customer tool. automation software such as Applied’s E3 environment. new controllers. Implementation was accomplished by simply connecting to the fab host to one of the four standard Ethernet ports, with no other Figure 2 provides film control-chart comparison data demonstrat- shows a subset of the electrical results, with excellent agreement PUSHBACK ON OBSOLESCENCE modification or optimization required. ing recipe transparency, with excellent repeatability of performance on between the tool running with the new controller and five additional The original design of the SBC used in Applied’s Endura and the test tool before and after the installation of the new controller. tools running concurrent production on the same device. BETTER DATA, BETTER RESULTS Centura tools is more than 20 years old and is based on the 30 MHz The process transparency was assessed by processing thou- The serial communications rate for the original controller is Motorola 68000-type processor. As time marches on for legacy sands of production wafers and measuring more than 15 electrical up to 19.2 kHz. A small subset of the installed base, including our The new controller manages interaction within the system much tools, about 3% of parts become obsolete each year. Most of those structures covering all metal layers, and sampling the contact, via beta site, has been upgraded with additional hardware to enable faster and more efficiently than the original controller, eliminating are electrical parts. Manufacturers began discontinuing production and sheet resistance as well as wire and intermetal leakage. Figure 3 HSMS, which delivers up to 100MHz. The new controller upgrade bottlenecks that negatively impact throughput. Internal testing of the SBC’s key components in 2007; the remaining stock will soon demonstrated an Endura throughput increase of as much as 6% from be depleted. Virtually all of the SBC’s building blocks are impacted, the optimized interaction between the hard disk drive (HDD) and the including the CPU, memory/memory controllers, PLDs, FGPAs, and CPU (see figure 5). I/O controllers. In addition to the obsolescence problem, many of the critical components of the legacy controller for Applied’s Endura and Centura tools have design limitations. These present a major barrier to the use of modern monitoring and control techniques that are proven to increase yields and reduce costs. Extending the life of mature equipment is a very attractive way to minimize capital expenditures. Applied’s new controller for 200mm tools offers customers the opportunity to do just that. The new controller greatly improves Centura and Endura performance and uses new, readily available components. It offers a low risk, plug-and-play, process-transparent system enhancement on a modern platform with the processing power to add new applications or modules, and to enable effective fault detection and fab automation. By upgrading to the new controller, customers can bring their tried-and- Figure 5. Internal test data demonstrating the impact file volume has on true 200mm production tools into the modern age. the performance of legacy systems. With the original controller, as file load on the HDD increases throughput drops. With the new controller, For additional information, contact [email protected] this performance loss does not occur; throughput is optimized to full Figure 3. Electrical performance of the new controller (in blue) was in line with five tools running the original hardware. Contact resistance, sheet system entitlement. resistance, via resistance and leakage were comparable for all metal levels of the device.

16 Nanochip Nanochip 17 When

Good ParUnfortunately,ts all the CoO reduction efforts in the Applied Materials offers a suite of parts repair and world can’t overcome wear and tear on parts. Like the refurbishment services that is one of the broadest in the engine in your car or the motor in your dishwasher, sooner industry. We handle repair and refurbishment for more or later, parts will break or wear out. When they do, what than 2,000 different parts, including chillers, robots, are your choices? MFCs, RF generators and matches, and pumps. Our The decision to repair or replace a part often comes repair services deliver comprehensive assembly solutions Go Bad: and the results are parts that operate “as new.” Serving down to just a few factors: the age and overall condition of the part, replacement part availability, and of course, cost. customers from our network of repair centers and If it’s a low-cost or consumable part it’s an easy decision suppliers around the globe, Applied will repair more than Figure 1. Customers have realized significant savings by to pull one from inventory and replace it. But some parts, 10,000 customer parts in 2013, saving customers nearly having parts repaired instead of buying new ones, whether Repair or such as robots, pumps, and chillers, carry high price tags $75 million over new-part prices. Currently we have repair they need one part or many hundreds of parts. and may be too costly to have sitting in inventory until centers in Korea, Singapore, Europe, North America and Taiwan with plans to expand local capability. In addition to needed. In many cases, repair or refurbishment of these Upon completion of the project, this customer was Applied’s own repair centers we have many prequalified expensive parts is a good alternative to buying a new one able to upgrade their existing installed base, refresh Replace? if you can count on a trusted, reliable source to do the regional repair suppliers that can bring focused expertise the lifetime of these critical parts, and improve wafer to provide a high-quality, timely repair solution. work. A repaired part can provide a savings of as much performance—all at a savings of more than 50% over as 30–60% over the cost of a new part, and with the the much higher cost of buying new parts. right supplier, immediate replacement or parts exchange Flexible Repair Programs By In today’s fab environment, ■■ Parts Exchange Services: When time-to-repair is programs can result in very limited wait time and lower Applied’s parts repair services address the varied critical, parts exchange programs such as Applied many device makers run inventory-carrying costs. needs of customers, from straightforward transactional Denny Materials Express Exchange (ExE) and Express Repair Once you’ve decided to repair rather than replace repairs to quick turnaround services for both standard and production around the clock, (ExR) eliminate wait time by providing a fast exchange Huebner a part, it’s obviously important to select a repair service process-critical parts. service for repaired parts. These programs are usually provider who is experienced and delivers consistently high- 365 days a year, so tools are ■■ Recondition Parts Service (RPS): Applied RPS is a paired with our Total Parts Management (TPM) quality service at a competitive price. You want the part to perfect solution for customers looking for a simple way program, which consigns your inventory and manages pushed hard to keep cranking out perform to new-part standards with a price that represents to repair broken parts and save the most money. With your repair exchanges. a good savings over new-part pricing. RPS, your broken parts are repaired and returned to high-yield wafers at the lowest Applied ExE offers an exchange solution from a pool of You may also want a comprehensive assembly repair you within an agreed time frame. The closed-loop RPS Applied’s previously repaired parts. This is an excellent possible cost. Reducing cost solution that returns your part in “like new” condition covers both process-critical and non-process critical option for obtaining parts that are not considered rather than simply replacing a failed component within parts so you can monitor the part’s history and past of ownership (CoO) is always a process critical. For process critical parts the ExR the part itself. Component repair, while cheap, may not process exposure. You get your own parts back, fully program ensures that broken parts are quickly replaced be an optimal solution. It’s like replacing a single failed reconditioned to perform to new-part quality standards. high priority for fab managers, robot bearing without replacing the other bearings and with repaired ones drawn only from your own pool of especially as competitive market seals in the assembly. You’ve temporarily fixed your For example, one customer wanted to upgrade a key repaired parts held in inventory at our repair center. part on all their Applied tools in order to improve wafer problem but you’re risking another failure in the near Applied’s RPS, ExE and ExR programs are proven parts performance. Replacing all of the existing parts with pressures increase. future. That next breakdown will become another period repair solutions. By delivering potential savings of 30% to new ones would have been extremely costly. However, of tool downtime with more negative impact on your 60%, they offer you the opportunity to lower CoO through it was determined that the legacy parts could be costs, so a seemingly cheap repair becomes multiple price, wait time, and reliability. And they offer one thing refurbished into the new design and a spec was jointly repairs. Comprehensive assembly repair will return to more: peace of mind that your repair will be handled right developed with the customer. As the refurbishment got you a part that will perform as new: one incident, one by a supplier you can trust. refurbished part versus multiple incidents, more wait underway, Applied was able to make some additional time, and increased CoO. change recommendations to further improve the part. For additional information, contact [email protected]

18 Nanochip Nanochip 19 1,500

1,000

Applied Materials offers a suite of parts repair and refurbishment services that is one of the broadest in the 500 industry. We handle repair and refurbishment for more than 2,000 different parts, including chillers, robots,

MFCs, RF generators and matches, and pumps. Our ($ thousands) Realized Annual Savings 0 repair services deliver comprehensive assembly solutions Customer A Customer B Customer C Chillers, RF Products Chillers, and the results are parts that operate “as new.” Serving Heat Exchangers Heat Exchangers, Pumps customers from our network of repair centers and suppliers around the globe, Applied will repair more than Figure 1. Customers have realized significant savings by 10,000 customer parts in 2013, saving customers nearly having parts repaired instead of buying new ones, whether $75 million over new-part prices. Currently we have repair they need one part or many hundreds of parts. centers in Korea, Singapore, Europe, North America and Taiwan with plans to expand local capability. In addition to Upon completion of the project, this customer was Applied’s own repair centers we have many prequalified able to upgrade their existing installed base, refresh regional repair suppliers that can bring focused expertise the lifetime of these critical parts, and improve wafer to provide a high-quality, timely repair solution. performance—all at a savings of more than 50% over the much higher cost of buying new parts. Flexible Repair Programs ■■ Parts Exchange Services: When time-to-repair is Applied’s parts repair services address the varied critical, parts exchange programs such as Applied needs of customers, from straightforward transactional Materials Express Exchange (ExE) and Express Repair repairs to quick turnaround services for both standard and (ExR) eliminate wait time by providing a fast exchange process-critical parts. service for repaired parts. These programs are usually ■■ Recondition Parts Service (RPS): Applied RPS is a paired with our Total Parts Management (TPM) perfect solution for customers looking for a simple way program, which consigns your inventory and manages to repair broken parts and save the most money. With your repair exchanges. RPS, your broken parts are repaired and returned to Applied ExE offers an exchange solution from a pool of you within an agreed time frame. The closed-loop RPS Applied’s previously repaired parts. This is an excellent covers both process-critical and non-process critical option for obtaining parts that are not considered parts so you can monitor the part’s history and past process critical. For process critical parts the ExR process exposure. You get your own parts back, fully program ensures that broken parts are quickly replaced reconditioned to perform to new-part quality standards. with repaired ones drawn only from your own pool of For example, one customer wanted to upgrade a key repaired parts held in inventory at our repair center. part on all their Applied tools in order to improve wafer Applied’s RPS, ExE and ExR programs are proven parts performance. Replacing all of the existing parts with repair solutions. By delivering potential savings of 30% to new ones would have been extremely costly. However, 60%, they offer you the opportunity to lower CoO through it was determined that the legacy parts could be price, wait time, and reliability. And they offer one thing refurbished into the new design and a spec was jointly more: peace of mind that your repair will be handled right developed with the customer. As the refurbishment got by a supplier you can trust. underway, Applied was able to make some additional change recommendations to further improve the part. For additional information, contact [email protected]

Nanochip 19 FABS iN THE INTERNET OF THINGS ERA

As PCs start to show the next decade, larger than the proprietary. “When we talk of will be made into product X for revenue declines, the Internet combined number of PCs, phones smart cities, we have to get an customer Y.’ This unfinished of Things (IoT) is seen as the and tablets. awful lot of disparate organiza- material already knows for which semiconductor industry’s next big Many of these intelligent tions working together to make customer it is intended and wave, following PCs, networking, systems will be in factories, “ac- that happen. There are numerous carries with it all the information and mobile systems. With its curately monitoring conditions security and business reasons about where and when it will be cloud-dependent, “everything is in real time,” said Gareth Noyes, why you might not want to do processed.” connected” promise, the IoT has a chief strategy and technology that. Getting people to buy into it In the macro view, there game-changing, futuristic aspect. officer at Wind River. Noyes, is pretty challenging.” is debate over how quickly the While analysts agree security speaking at an IDC seminar, said Individual companies are worldwide IoT will mature, but concerns and the productive intelligent monitoring will support creating sophisticated networks the impact is almost certain to be management of data being two overarching capabilities: inside and among their factories, huge. Dean Freeman, semicon- generated need to be worked out predictive maintenance, and the but granting access beyond a ductor manufacturing analyst at before the IoT can develop fully, “adaptive analysis of historical firm’s boundaries is a different Gartner, Inc., noted the various there is little doubt the long-range data, providing nuanced under- story. “We are seeing a lot more predictions that—perhaps by the impact will be substantial. standing” of what is going on automation in the factories, an end of this decade—the world Jeremie Bouchaud, principal inside factories. increased use of sensors and may be home to a trillion sensors. MEMS and sensors analyst Bill Morelli, an IHS analyst machine vision. Machine-to- Eventually, a trillion sensors a year at market research firm IHS, who tracks the IoT trend, said machine connections are a lot could be consumed. Freeman estimates it will take about while some MEMS/sensors will more prevalent, but many of notes that about two-hundred seven years before smart be connected to the Internet, led those are not necessarily IP- ninety 200mm fabs would be sensors and wireless networks by the obvious example of smart- connected sensors. The factory required to process the 1.7 million begin to fully transform society phones, others won’t. A high-end itself is the main outpoint of wafers necessary to meet that into the connected cities and car, for example, has hundreds connectivity, and corporations trillion unit sensors figure. “It smart homes that hold so much of sensors monitoring its inner don’t want access to those exter- may not reach the full 290 fabs, As the wider society enters the Internet of Things era, promise. workings, but to avoid danger- nally” lest competitors engage in but the main point to keep in BY Mario Morales, director of ous mischief from hackers, few snooping, Morelli said. mind is that there is very healthy semiconductor fabs are also benefiting from the analysis David semiconductor research at IDC, of them will be connected to the Siegfried Dais, deputy chair- growth ahead for legacy silicon,” of data streaming from sensor-laden equipment. But the describes a class of “intelligent Internet. man of the board at Stuttgart, Freeman said. Lammers management of “big data,” and the attendant security concerns, systems”—defined as Internet- Morelli cautioned against Germany-based engineering For chipmakers, producing all connected devices that analyze irrational exuberance, noting that and electronics company Robert those wafers, while adding speed are among the biggest challenges facing chip makers and information collected in real smart cities will require multiple Bosch GmbH, predicts that “a and functionality to devices and vendors as they seek to reap the benefits of a connected fab. time—and estimates there will be businesses to agree on sharing piece of metal or raw mate- keeping a tight rein on costs, is a some 25 billion units out there in data, some of which may be rial will say, ‘I am the block that significant challenge. As sensors,

20 Nanochip Nanochip 21 FABS iN THE INTERNET OF THINGS ERA

20 Nanochip Nanochip 21 Fabs necessarily part of their daily but so far, solid automated tech- in the internet of things era work flow. Now they need access niques to achieve and maintain it to the data so they can more have been lacking. “Now, as tools quickly ramp and manufacture move and are repurposed from the process,” he said. product to product and factory processors, and wireless links WHAT DOES Read noted that sensors and to factory, chamber matching is become faster and less costly, THE DATA MEAN? other data-gathering tools are more important than ever. It’s the the connected fab will transform “There will be a lot more propelling the industry to move quickest way to ramp production. fab productivity. Increasingly data coming in as we instrument toward a more efficient, predict- A tool may be working perfectly connected tools will help the chip our tools to much greater levels able manufacturing model. “Big well in this factory or on this industry reduce variability by and take subcomponent tracking data is allowing customers to get device design, but how can I get monitoring each tool’s “health.” much further. The challenge is: beyond reactive, beyond even it working in the next fab or the Semiconductor companies will what does the data mean?” said proactive, to predictive. We can next production batch? This isn’t be able to optimize a fab line for Jeremy Read, vice president of take a more holistic view of the a new concept, but the data will chip performance, yields or high automation products at Applied tool and its behavior,” he said. help us achieve that,” he said. throughput, said Alex Schwarm, Materials. “We will see a lot more senior product manager in the Data analysis is moving equipment monitors providing PARTNER, OR GO IT ALONE Applied Global Services (AGS) beyond fault detection and data that give a general indication group. For leading-edge classification (FDC) and other of the health of the tool: parts companies, the need to move techniques aimed at figuring that are beginning to wear, erratic BIG DATA, BIG CHALLENGE faster to the 20nm node and out what might have gone awry. performance indicators, and so beyond coincides with the new Consultant Tom Sonderman, “Now companies are pushing forth. We will be able to catch the emphasis on the predictive who pioneered the adoption of data analysis down to the manu- vast majority of general efficien- analysis techniques that advanced process control (APC) facturing technician level,” Read cies as the tool is in use, and will rely on production tool data. techniques while at AMD, said said. Data analysis techniques know, ‘Will the tool be working Read was asked if the largest the IoT in the semiconductor previously used by test and yield at its best?’ And if it not, we’ll semiconductor companies prefer industry brings both challenges engineering groups are now be- know that now we have to fix to develop data analysis and and opportunities. Key among ing employed by the technicians something.” predictive techniques in-house. them is dealing with the big data engaged in daily manufacturing. The industry also will move “There certainly is no barrier that sensors and other automa- “A module manufacturing group to tackle chamber matching on to the customer doing it them- tion technologies gather (see may not have had access to a broad scale. Read said this has selves,” Read said. “However, if www.appliedmaterials.com/ analysis systems before; it wasn’t always been a topic of interest, intelligence-connected-fab). “All of this information is like a sunken treasure,” Sonderman said. “You have to figure out how INTERNET OF THINGS, WORLD, 2011–2025 to get it into the boat.” 60,000 16,000

A leading-edge fab might 14,000 contain >1,000 tools, with several 50,000 dozen key sensors on each tool, 12,000 40,000 and each wafer may see as many 10,000 as ~1,400 process steps. Huge 30,000 8,000 streams of information are com- 6,000 ing from fab tools, wafers, GDS 20,000

(design) files, and facility systems 4,000 such as chillers. 10,000 2,000 A fab will generate 140 TB per year at 20nm design rules, 0 0 2011 2012 2013 2016 2019 2022 2025 three times as much as at the Automotive Fixed Communications Mobile Communications 45nm node, according to John Computers Consumer Industrial Scoville, senior director of ap- Medical Military & Aerospace New Device Shipments Source: IHS 2013 plication engineering at AGS.

22 Nanochip Fabs necessarily part of their daily but so far, solid automated tech- Sonderman said the in the internet of things era work flow. Now they need access niques to achieve and maintain it connected fab, including big data to the data so they can more have been lacking. “Now, as tools analysis, is a fast-moving field. quickly ramp and manufacture move and are repurposed from Fabs must become more efficient the process,” he said. product to product and factory to supply the world with low-cost processors, and wireless links WAS H T DOE Read noted that sensors and to factory, chamber matching is processors and sensors, and become faster and less costly, THE DATA MEAN? other data-gathering tools are more important than ever. It’s the foundries must be able to protect the connected fab will transform “There will be a lot more propelling the industry to move quickest way to ramp production. the IP of multiple customers, who fab productivity. Increasingly data coming in as we instrument toward a more efficient, predict- A tool may be working perfectly guard their design- and yield data connected tools will help the chip our tools to much greater levels able manufacturing model. “Big well in this factory or on this closely. industry reduce variability by and take subcomponent tracking data is allowing customers to get device design, but how can I get Data analysis is bringing monitoring each tool’s “health.” much further. The challenge is: beyond reactive, beyond even it working in the next fab or the huge returns to forward-thinking Semiconductor companies will what does the data mean?” said proactive, to predictive. We can next production batch? This isn’t companies with the resources to be able to optimize a fab line for Jeremy Read, vice president of take a more holistic view of the a new concept, but the data will embark on the journey. Schwarm chip performance, yields or high automation products at Applied tool and its behavior,” he said. help us achieve that,” he said. said some are already figuring throughput, said Alex Schwarm, Materials. “We will see a lot more out how to “dial in their factory” senior product manager in the Data analysis is moving equipment monitors providing PA Rtner, OR GO IT ALONE to align it with production Applied Global Services (AGS) beyond fault detection and data that give a general indication goals such as optimized device group. For leading-edge classification (FDC) and other of the health of the tool: parts performance, higher yields, faster companies, the need to move Applied already has the models already collaborating with the concerns in the hypersensitive techniques aimed at figuring that are beginning to wear, erratic throughputs and lower costs. B IG DATA, BIG CHALLENGE faster to the 20nm node and and algorithms, and is prepared company on data-driven analysis semiconductor industry is a out what might have gone awry. performance indicators, and so “Now that we have less beyond coincides with the new to engage with the customer in projects, drawing upon Applied’s major challenge. “Without a Consultant Tom Sonderman, “Now companies are pushing forth. We will be able to catch the expensive compute power emphasis on the predictive a performance-level contract E3 performance-tracking and doubt, security and IP-related who pioneered the adoption of data analysis down to the manu- vast majority of general efficien- and storage, there are systems analysis techniques that based on our capabilities, then the data-mining software, as well as issues are the biggest obstacles advanced process control (APC) facturing technician level,” Read cies as the tool is in use, and will that allow you to do this kind of rely on production tool data. customer has to ask, ‘Why am I libraries and models. to effective collaboration techniques while at AMD, said said. Data analysis techniques know, ‘Will the tool be working analysis. For example, we can Read was asked if the largest reinventing the wheel? Is that truly Applied engineers record between vendors and manu- the IoT in the semiconductor previously used by test and yield at its best?’ And if it not, we’ll take a process tool data set and semiconductor companies prefer core to my value?’” vibration data, wafer placement facturers,” Schwarm noted. industry brings both challenges engineering groups are now be- know that now we have to fix extract from it an understanding to develop data analysis and Given the time pressures images, optical emissions, and One approach Applied takes and opportunities. Key among ing employed by the technicians something.” of what is driving variation. Some predictive techniques in-house. involved in getting to advanced other sets of information to is using servers within the fab’s them is dealing with the big data engaged in daily manufacturing. The industry also will move companies are doing that, but “There certainly is no barrier nodes, device makers are help enrich analysis models. For firewall that are connected to that sensors and other automa- “A module manufacturing group to tackle chamber matching on many are not,” Schwarm said, to the customer doing it them- increasingly likely to depend instance, the company has done the process tools only and with tion technologies gather (see may not have had access to a broad scale. Read said this has citing a lack of resources as a selves,” Read said. “However, if on suppliers for modeling, some very high speed analysis, tightly controlled access to data. www.appliedmaterials.com/ analysis systems before; it wasn’t always been a topic of interest, sensor prioritization, predictive collecting data at 1000 Hz, to “Applied has many layers of major reason. intelligence-connected-fab). maintenance algorithms, and other detect potentially damaging arcs security, and we have to adapt To achieve that heightened “All of this information is like analytics. That being the case, “if in a plasma system. “We want to varying customer needs,” level of “nuanced understanding” a sunken treasure,” Sonderman Applied Materials has a solution, to take the data we have now, Schwarm said. “Some customers that Wind Rivers’ Noyes predicts, said. “You have to figure out how why spend six months or more along with the new sources of use our remote service access chipmakers will need to deal to get it into the boat.” trying to do it on my own, at a risk data, and combine them to create via secure VPN to allow Applied with security concerns and lack A leading-edge fab might of not getting there in time?” Read specialized analysis techniques,” Materials engineers anywhere in of in-house resources, which contain >1,000 tools, with several said. Applied also has sought to Schwarm said. “These tech- the world to help diagnose issues. may hinder progress toward the dozen key sensors on each tool, understand “the broader context” nology service relationships Others are more conservative connected fab. Read summed and each wafer may see as many of the data coming from individual are much more interactive and invest in having us install a up the challenge as tools begin as ~1,400 process steps. Huge tools, he added. “We work with and integrated than a typical server behind their firewall with to provide more data: “We streams of information are com- the customer to address process maintenance service relationship. access that they define.” need to get better at providing ing from fab tools, wafers, GDS challenges on tools and we also You are now an extension of the Schwarm noted that the context to the information (design) files, and facility systems look at data holistically, from the customer’s team for these device- Applied’s analysis systems and coming off of the tool. What’s such as chillers. viewpoint of the entire fab.” and film-oriented problems.” procedures are designed with needed are more personnel A fab will generate 140 TB Schwarm said Applied’s the protection of the customer’s resources and analysis systems per year at 20nm design rules, technology-enabled services HA Ndle WITH CARE IP in mind. “Our customers are to be able to figure out ‘what is three times as much as at the go beyond the maintenance- investing to develop the most that data telling me?’” 45nm node, according to John While the benefits of driven relationships Applied has advanced processes, and we For information contact Scoville, senior director of ap- cooperative data analysis with chipmakers. Most large understand and respect that,” alexander_schwarm @amat.com plication engineering at AGS. can provide a competitive manufacturers, he said, are he added. edge, overcoming security

22 Nanochip Nanochip 23 • Mainframe, Chamber Variant 1. Hardware Configuration • Upgrades • Facilities

TKNA I G THE NEXT STEP: • Software Revision 2. Software Configuration • System Constants CHAMBER VARIANCE CORRECTION

DURING PRODUCTION • FDC Traces for P1 Sensors 3. Tool Sensors • Sampling Frequency The capabilities identified above are critical to the chamber-matching process • Recipes and yield a number of benefits. However 4. Process • Process Window they are generally applied offline and • Target don’t address chamber matching during 5. Metrology • Uniformity production (see the dark blue steps in • Defect figure 1). In examining how to improve this • PM/CM Practice, Calibration technology and provide chamber variance 6. Maintenance • Parts & Cleans • Maintenance History correction during production, we realized that current approaches do not provide • Parametric 7. End-of-Line Electrical • Yield the control recommendations or actions required to bring operating chambers closer to a matched state; rather they provide Figure 1. Chamber-matching dimensions. insight into what is “wrong” and leave it Im proving Yield to experts to determine what should be Variance Correction Systems….” [1] “matched outputs” as measured by post- modified. While this approach is appropriate Fortunately, the same software tool used for process metrology. Using this definition, for certain dimensions of the chamber- chamber variance investigation, E3, is being chamber matching can be achieved by with Fleet Chamber Matching matching problem, such as hardware, enhanced by Applied engineers to provide setting the E3 run-to-run (R2R) control software and sensor matching, it does these automatic correction capabilities. targets (e.g., thickness and uniformity) not work as well during production where The challenge is determining an algorithmic to be equal across the fleet. Using this CHAMBER MATCHING REQUIRES MULTI-DIMENSIONAL SOLUTIONS matching decisions are often made lot-by- approach to chamber variance correction. approach (which we do with E3 today) Matching tools running identical processes is particularly critical for users migrating to more advanced lot or even wafer-by-wafer. As is noted in As Applied experts looked into this the chamber outputs can be “matched”; the ITRS, what is needed is “migration of problem, we first noted that a common however the chambers can be operating nodes (<28nm). Sustaining a fleet of tools to a matched state can reduce yield losses and yield Chamber Variance Reporting to Chamber definition applied to chamber matching is very differently (e.g., high temperature with variability, allow for greater routing flexibility in the fab, identify and control process inefficiencies, and reduce time for root cause analysis of yield issues. Applied Materials understands the criticality and The top graph complexity of chamber matching, and is leveraging its algorithmic, equipment- and process expertise summarizes chamber variance per chamber to develop a comprehensive solution that enables matching across many dimensions. across the fleet and indicates an unmatched Ideally, the matching process would collection and analysis configurations are chamber. Root cause extend to every available dimension, from matched and E3 analysis capabilities such BY investigation: On the configuration through process setup and as “chamber variance reporting” are used Stia at st c lly significant lower left a data mining execution, and yield analysis, as shown to determine the level of chamber match- result Manjunath Yedatore, score indicates which in figure 1. The first step in the matching ing and to investigate sources of mismatch, parameters are important James Moyne, process is to perform a hardware and as shown in figure 2. Often the remedies D ata Mining to the chamber mismatch; software audit. In many cases a “golden tool” involve identifying underperforming cham- Score Jimmy Iskandar in the middle graph is identified as part of a collaborative effort bers and then matching input and output Runi Stat stics vs. time summary data on these and Parris Hawkins between the customer and Applied experts. parameters to “golden” chambers. For important variables can Baselines for the hardware and software example, in a poly etch matching process, be compared over the parameters are established using Applied’s drive current (I ) matching was improved on course of many runs; on tool- and process expertise. For example, from a difference of 7% to 0%. Ion standard the bottom graph the we can help determine what parameters are deviation within wafer was reduced by 30%. sensor raw data can be important to the matching process and what This was achieved by matching gas flows, analyzed and compared. level of matching needs to be obtained. equipment constants, RF parameters, and Smpda le sensors vs. time After the hardware and software con- recipe optimization. As a result, chambers figurations are matched, tool sensors and that were previously performing poorly were data collection come next. Applied E3 data returned to production. Figure 2. Chamber variance reporting with E3. 24 Nanochip Nanochip 25 • Mainframe, Chamber Variant 1. Hardware Configuration • Upgrades • Facilities

TKNA I G THE NEXT STEP: • Software Revision 2. Software Configuration • System Constants CHAMBER VARIANCE CORRECTION

DURING PRODUCTION •FDC Traces for P1 Sensors 3 . Tool Sensors •Sampling Frequency The capabilities identified above are critical to the chamber-matching process •Recipes and yield a number of benefits. However 4. Process •Process Window they are generally applied offline and • Target don’t address chamber matching during 5. Metrology • Uniformity production (see the dark blue steps in • Defect figure 1). In examining how to improve this •PM/CM Practice, Calibration technology and provide chamber variance 6. Maintenance •Parts & Cleans • Maintenance History correction during production, we realized that current approaches do not provide • Parametric 7. End-of-Line Electrical •Yield the control recommendations or actions required to bring operating chambers closer to a matched state; rather they provide Figure 1. Chamber-matching dimensions. insight into what is “wrong” and leave it Im proving Yield to experts to determine what should be Variance Correction Systems….” [1] “matched outputs” as measured by post- modified. While this approach is appropriate Fortunately, the same software tool used for process metrology. Using this definition, for certain dimensions of the chamber- chamber variance investigation, E3, is being chamber matching can be achieved by with Fleet Chamber Matching matching problem, such as hardware, enhanced by Applied engineers to provide setting the E3 run-to-run (R2R) control software and sensor matching, it does these automatic correction capabilities. targets (e.g., thickness and uniformity) not work as well during production where The challenge is determining an algorithmic to be equal across the fleet. Using this CHAMBER MATCHING REQUIRES MULTI-DIMENSIONAL SOLUTIONS matching decisions are often made lot-by- approach to chamber variance correction. approach (which we do with E3 today) Matching tools running identical processes is particularly critical for users migrating to more advanced lot or even wafer-by-wafer. As is noted in As Applied experts looked into this the chamber outputs can be “matched”; the ITRS, what is needed is “migration of problem, we first noted that a common however the chambers can be operating nodes (<28nm). Sustaining a fleet of tools to a matched state can reduce yield losses and yield Chamber Variance Reporting to Chamber definition applied to chamber matching is very differently (e.g., high temperature with variability, allow for greater routing flexibility in the fab, identify and control process inefficiencies, and reduce time for root cause analysis of yield issues. Applied Materials understands the criticality and The top graph complexity of chamber matching, and is leveraging its algorithmic, equipment- and process expertise summarizes chamber variance per chamber to develop a comprehensive solution that enables matching across many dimensions. across the fleet and indicates an unmatched Ideally, the matching process would collection and analysis configurations are chamber. Root cause extend to every available dimension, from matched and E3 analysis capabilities such BY investigation: On the configuration through process setup and as “chamber variance reporting” are used Stia at st c lly significant lower left a data mining execution, and yield analysis, as shown to determine the level of chamber match- result Manjunath Yedatore, score indicates which in figure 1. The first step in the matching ing and to investigate sources of mismatch, parameters are important James Moyne, process is to perform a hardware and as shown in figure 2. Often the remedies D ata Mining to the chamber mismatch; software audit. In many cases a “golden tool” involve identifying underperforming cham- Score Jimmy Iskandar in the middle graph is identified as part of a collaborative effort bers and then matching input and output Runi Stat stics vs. time summary data on these and Parris Hawkins between the customer and Applied experts. parameters to “golden” chambers. For important variables can Baselines for the hardware and software example, in a poly etch matching process, be compared over the parameters are established using Applied’s drive current (I ) matching was improved on course of many runs; on tool- and process expertise. For example, from a difference of 7% to 0%. Ion standard the bottom graph the we can help determine what parameters are deviation within wafer was reduced by 30%. sensor raw data can be important to the matching process and what This was achieved by matching gas flows, analyzed and compared. level of matching needs to be obtained. equipment constants, RF parameters, and Smpda le sensors vs. time After the hardware and software con- recipe optimization. As a result, chambers figurations are matched, tool sensors and that were previously performing poorly were data collection come next. Applied E3 data returned to production. Figure 2. Chamber variance reporting with E3. 24 Nanochip Nanochip 25 Im proving Yield with Fleet Chamber Matching

also leverages the fact that, in many R2R matching process toward variables that are control solutions, the control problem is determined to be more important to yield “underdetermined”; that is, there are more matching. With this approach R2R control tunable inputs (e.g., time and temperature) is used to match process-tunable inputs in than outputs to control (e.g., thickness) and addition to process outputs. Thus the states so there are technically an infinite number of the chambers are kept closer together, of control solutions. With this approach, leading to a better matched fleet. a fleet target R2R control recipe (i.e., a We are also developing a method lower time settings for chamber 1 and lower recipe consisting of R2R control adjustable for extending the improved matching temperature with higher timer settings for parameters) is determined utilizing R2R through the maintenance cycle, again using chamber 2 producing the same thickness control information across the fleet of tools the extensive powers of E3. A number Figure 4. Utilizing Applied E3 capabilities for improved matching through the maintenance cycle. output). This can cause yield variability and to be matched. Depending on the matching of E3 advanced process control (APC) ultimately yield loss. goals, this target R2R control recipe can tools are leveraged throughout the entire The collective use of these tools to maintenance to scheduled maintenance. A utilities management incorporation An improved definition is: “chambers take many forms, including (1) a baseline maintenance cycle as shown in figure 4. provide maintenance cycle benefits is best confidence factor provided with the prediction into fab objectives, requires intimate are matched if their states of operation are recipe for a golden tool, (2) the latest R2R Equipment health monitoring (EHM) is illustrated through an example. In a thermal can help determine the “best” future state knowledge of the fab objectives, matched.” This requires that, in addition to control recipe for that golden tool, and (3) a used during production to monitor tool process, the lamp maintenance effort at which to bring the chamber down, based process, equipment and the capabili- matching process outputs, we should also weighted “average” control recipe across the health and during the maintenance recovery can be costly and time-consuming. In a on an evaluation of the customer’s relative ties themselves. Thus it has become try to match process conditions such as fleet of tools. The latter can be determined process to assess “fingerprints” indicating typical system lamps can fail unexpectedly costs for scheduled and unscheduled clear that cost-effective development process inputs and process variables. Thus, from an averaging of R2R recipe advices successful maintenance procedures.[3,4] causing unscheduled downtime and downtime. This “best” state will be matched and maintenance of these capabilities in the above example, temperature and time or an inversion of an average model across Predictive maintenance (PdM) is used to scrap. The maintenance recovery can across chambers. During the maintenance will require increased and continuous setting inputs should be matched in addition the fleet of chambers. When recipe advice predict a consistent downtime state.[3] be time-consuming because there are procedure, models relating the lamp-tunable cooperation of users, OEMs and 3rd to thickness output. is requested from a particular chamber, Virtual metrology (VM) and R2R control usually multiple post-maintenance (i.e., settings to metrology data associated with the party FI capability suppliers.[5] In order to provide improved matching the E3 R2R controller picks a recipe that can be used to determine settings during after lamp kit replacement) iterations post-maintenance characterization runs will during production with this amended is closer to the target R2R control recipe maintenance recovery. Collectively these Applied Materials recognizes this need of lamp parameter “tuning” that include utilize multivariate R2R control and reverse matching definition, we are working to (among an infinite set of choices), as shown capabilities result in improved mean time and, through its Applied Global Services running a number of test wafers with virtual metrology to determine necessary develop a fleet-wide matched R2R control in figure 3. The target R2R control recipe is between interrupt (MTBI) and mean time business, is developing advanced services for specific characterization recipes, analyzing lamp adjustments. This reduces the number approach.[2] The approach leverages updated as necessary. Relative weighting to repair (MTTR), and an opportunity multi-dimensional chamber matching. We metrology data, and making hardware of post-maintenance tuning iterations from Applied’s E3 capability for fleet-wide of variables (among inputs, and between to provide improved chamber matching will work closely with customers to deliver and software adjustments. Four to ten 4–10 down to 2 or 3. Note that R2R controller monitoring and coordinated control. It inputs and outputs) can be used to skew the through the maintenance process. fleet chamber-matching solutions that (1) iterations of this type are not uncommon, matching can be employed here as well to address all aspects of the chamber-matching leading to MTTR on the order of two days better match the chambers as they return to problem and (2) are tailored to customer- or more. In addition to all of these cost- production. Finally EHM can be used to verify specific needs. of-ownership issues, there generally is no a “fingerprint” of a healthy and matched tool clear methodology for matching chambers that is ready for production. For additional information, contact manjunath_ through the maintenance process. [email protected] Applied engineers are enhancing E3 MKNA I G IT WORK: [1] 2012 International Technology Roadmap for and E3 services so that these issues can A PARTNERING OF EXPERTISE Semiconductors (ITRS): Factory Integration Chapter, be addressed to reduce unscheduled 2012 (available at www.itrs.net). Effective chamber matching requires downtime and scrap, improve MTBI, reduce [2] J. Moyne, J. Iskandar, “Matching process controllers the leveraging of equipment, process, sensor for improved matching of processes,” United States MTTR, and match chambers throughout and statistical knowledge. This can only patent pending the entire maintenance cycle. First E3 be achieved if Applied works closely with [3] J. Moyne, J. Iskandar, P. Hawkins, T. Walker, A. EHM will be used during production to customers to design, develop, implement and Furest and B. Pollard, D. Stark and G. Crispieri, monitor equipment health and point to any maintain chamber-matching solutions that “Deploying an Equipment Health Monitoring unforeseen lamp (or other) issues as they Dashboard and Assessing Predictive Maintenance,” are customized to be most effective for each appear. As the lamp begins to degrade, Proceedings of the 24th Annual Advanced unique situation. This advanced services- Semiconductor Manufacturing Conference (ASMC E3 R2R control can be used to keep the In this example we are controlling a single output, e.g., thickness, by tuning two input variables: power and pressure. We have a simple linear oriented approach to delivering solutions 2013), Saratoga Springs, New York, May 2013. process tuned so Cpk remains high. The model of the chamber and a current operating point (left graph, red line and dot). With traditional R2R control, after a run, the R2R controller represents the new paradigm in APC. Indeed, [4] J. Moyne, J. Iskandar, B. Schulze, “Portable identifies a difference between the predicted output and actual output, adjusts the model accordingly, and selects a new operating point that is R2R matching mechanism described the upcoming 2013 ITRS Roadmap, Factory adaptable equipment health user interface,” closest to the previous one (orange line and dot). In chamber-matched control with a fleet of two chambers (right graph), we are aware of the above will be employed to keep chambers United States patent pending Integration (FI) Chapter states: model and operating point for chamber 2 (blue line and dot). In this case, after updating the model for chamber 1, we choose an operation point matched as much as possible during this [5] 2013 International Technology Roadmap for (among an infinite set of choices on the line) that is closer to the operating point of chamber 2 (orange line and green dot). Development and maintenance lamp-degradation phase. E3 PdM models Semiconductors (ITRS): Factory Integration of emerging capabilities such as will predict a time horizon for lamp failure, Chapter DRAFT, 2013 (final version to be available Figure 3. Illustration of fleet-coordinated R2R control. PdM, VM, waste management, and at www.itrs.net in early 2014). allowing for the conversion of unscheduled 26 Nanochip Nanochip 27 C HARlie PAPPIS: Success in today’s semiconductor industry goes beyond just keeping the fab running—it takes faster ramps and higher yields at lower costs. Charlie Pappis, group vice president and general SE RVing manager of Applied Global Services (AGS), contends that the service model has evolved as well, from providing traditional maintenance, UP A parts and repair services to an expanded role as a strategic customer partner. NF S: What does that mean for your organization on a practical, Finally, what really drives our responsiveness when it comes day-to-day level? to difficult problems such as defects and particles is AGS’s In a recent interview with Nanochip Fab Solutions Pappis: Cost savings extend beyond parts, of course. Our new iSYS 3000-strong customer engineering (CE) team. Today’s fabs BETTER (NFS), Pappis, a 27-year veteran of Applied controller for the subfab is designed to give customers a very fast generate a flood of process- and equipment-related data that Materials and head of AGS for the last four years, payback via electricity and fuel savings for abatement. In many can be used to optimize processes and increase yields. Our cases the payback period is two years, and for those located CEs are receiving extensive training in IT functionality and data discussed customers’ increasingly sophisticated in areas of the world where electricity is incredibly expensive, manipulation so they can effectively interpret the trove of data support needs and what that means for his large payback is one year or even less. coming from software-based monitoring and control systems, sensors, and other computer-driven equipment. OUTCOME There are also things we can do to help customers improve their service organization. technical performance—in process capability, in defect performance, which can also improve uptime and lower cost. Our Lava NF S: Can you give us an example of how better data analysis is Coat II technology is a good example. We developed it for our paying off for customers? NF S: You’ve said that a changing semiconductor industry requires Now, it certainly isn’t easy to address these issues, so what that PVD chambers to reduce the frequency of service intervals and Pappis: Data analysis and the use of appropriate sensors and control service providers to provide different types of support than means for service providers like AGS is that we must be able to lower the defect densities in the chamber, which can have a sig- systems are key to helping customers understand the health of before. Can you elaborate? support customers as a high-level, trusted partner. We need to be nificant impact on yield. This coating can reduce defect levels by the tool and provide clues that make it possible to predict and able to help them solve their highest-value problems—the ones Pappis: The service business used to be driven by the need to keep 25% and boost mean time between cleans by up to 1.5x. While prevent problems. One example that comes to mind has to do with the greatest impact on the performance and yield of the de- systems up and running: identifying mechanical problems, that may not sound like much, consider that whenever you take a with an etch chamber. One of the things we typically look at vices they make—so that, for example, they can successfully ramp adjusting hardware, replacing parts and so forth. Equipment PVD chamber out of production, you have to vent it to do any kind is backside helium pressure. But what does that really tell us? a megafab to run the most aggressive nodes at the right yield, the reliability isn’t our customers’ main service need anymore—the of a clean or a kit change. Then you have to recover it to the same Often when there’s a spike in pressure it is in fact a backside right cost, the right quality and with the right cycle times. It’s criti- reliability of electromechanical systems is much greater than it performance levels, so it becomes a 24- to 72-hour service event. helium fault, so before we were able to characterize these cal for the customer’s success to be able to do that, and when you used to be. What’s driving everything now is vastly increasing If you can increase the time you’re running product by 1.5x before chambers the way we can now, we always assumed that was come down to it, that’s really what a modern service organization process complexity and the high costs that come with not you have to do a clean, and if you can also reduce the overall the problem and we would routinely vent the chamber and start like AGS has to focus on: enabling the customer’s success, helping getting it done right or not doing it fast enough. Service today defect level during that run by 25%, there’s a huge productivity maintenance. them achieve dramatically better results with our equipment. So is about fine-tuning processes for optimum performance and gain. These are the kinds of services that are true value adds for we’re evolving in order to do that more effectively. However, at one customer site, when we tied these chambers managing on-board technology so customers can predict and our customers, and they keep asking for more of them. prevent problems before they impact device performance and into Applied’s E3 factory automation software environment, yield. And that takes a much more advanced service model Our goal is to have customers always be willing to give us a “first we found that not all backside helium pressure events are NF S: That’s a huge challenge. How are you going about it? that integrates state-of-the-art technologies, expanded service look and a last chance.” That’s really critical for us, and what’s created equal! Some of them can be handled without actually staff expertise, and an unprecedented level of collaboration Pappis: It’s really a three-part strategy. Trust is bedrock. It underpins all key to making it happen is our willingness to listen openly to what having to vent the chamber. Others just amount to the normal between the customer and the OEM. our relationships with customers. The complexity and sensitivity a customer is saying, and then provide the relevant technologies, wear pattern of the e-chuck. Sometimes they mean there’s of issues impacting device performance and yield mean we have tools, people and whatever other resources are required—on a backside particle or a placement error we can handle just There will be more radical technological change in our industry to stay more closely connected to the customer than ever. You whatever basis makes the most sense—given a customer’s by calibrating the robot. This is a case where we can help the in the next five years than over the past 15, because scaling can’t do that without a solid foundation of trust. It’s something we specific situation. customer manage a tool in production much more efficiently by alone can no longer keep us on pace with Moore’s Law. You can always work to build on, because while it’s one thing to say we are characterizing things better and putting FDC models in place. see it starting to happen already—new architectures like Fin- willing to collaborate with customers to solve their highest-stakes With 30,000 machines installed, we are learning faster FETS and 3D structures, an explosion of new materials into what problems, it’s another to actually deliver on the promise. NFS: But what gives you the ability to handle customers’ were relatively stable gate and interconnect stacks—all of this highest-level problems? How are you different from than anyone how important accurate data analysis is, and requires more process steps, much narrower process windows, Trust gets us an invitation to the table. Once we’re there, being other service providers? we’re taking this capability across the installed base. For competitive on cost and quality are absolute prerequisites. Our many more interacting variables, and higher capital costs. Pappis: We’re different in almost every way that counts! First of all example, when our FabVantage consultants begin a customer customers have choices, so we need to define competitiveness we have unparalleled tool knowledge across a broad portfolio engagement, they do a deep discovery to determine the the same way they do. In a way, it’s like running a race where of process technologies. Second, AGS is at work every day in critical issues holding the customer back in terms of cycle there’s no finish line. The job is never done because we’re always production environments in the semiconductor, solar and display time, productivity, yield, and so forth. No two customers have “While it’s one thing to say we are willing to trying to make further improvements in what we offer. areas supporting an installed base of about 30,000 Applied the same needs, and even the same customer may have very collaborate with customers to solve their If we’ve proven we can be trusted to deliver on the basics of Materials tools. Customers typically run these machines for 20 different needs and priorities at different times and locations. Therefore, what we do is never ‘one-size-fits-all.’ What we highest-stakes problems, it’s another to cost and quality, the door opens for us to work at higher levels to 25 years, and so every time Applied has shipped a tool, for the to meet a customer’s most important device-performance and following two decades we have had recurring opportunities to really consider business as usual is to customize cost- and actually deliver on the promise." yield challenges. It’s there that I think AGS can demonstrate real help the customer get the best possible result out of their capital quality-competitive solutions to meet the exact needs of a innovation and leadership to help customers reach their goals. asset, and to learn a great deal from that experience. particular fab at a given time.

28 Nanochip Nanochip 29 C HARlie PAPPIS: Success in today’s semiconductor industry goes beyond just keeping the fab running—it takes faster ramps and higher yields at lower costs. Charlie Pappis, group vice president and general SE RVing manager of Applied Global Services (AGS), contends that the service model has evolved as well, from providing traditional maintenance, UP A parts and repair services to an expanded role as a strategic customer partner. NF S: What does that mean for your organization on a practical, Finally, what really drives our responsiveness when it comes day-to-day level? to difficult problems such as defects and particles is AGS’s In a recent interview with Nanochip Fab Solutions Pappis: Cost savings extend beyond parts, of course. Our new iSYS 3000-strong customer engineering (CE) team. Today’s fabs BETTER (NFS), Pappis, a 27-year veteran of Applied controller for the subfab is designed to give customers a very fast generate a flood of process- and equipment-related data that Materials and head of AGS for the last four years, payback via electricity and fuel savings for abatement. In many can be used to optimize processes and increase yields. Our cases the payback period is two years, and for those located CEs are receiving extensive training in IT functionality and data discussed customers’ increasingly sophisticated in areas of the world where electricity is incredibly expensive, manipulation so they can effectively interpret the trove of data support needs and what that means for his large payback is one year or even less. coming from software-based monitoring and control systems, sensors, and other computer-driven equipment. OUTCOME There are also things we can do to help customers improve their service organization. technical performance—in process capability, in defect performance, which can also improve uptime and lower cost. Our Lava NF S: Can you give us an example of how better data analysis is Coat II technology is a good example. We developed it for our paying off for customers? NF S: You’ve said that a changing semiconductor industry requires Now, it certainly isn’t easy to address these issues, so what that PVD chambers to reduce the frequency of service intervals and Pappis: Data analysis and the use of appropriate sensors and control service providers to provide different types of support than means for service providers like AGS is that we must be able to lower the defect densities in the chamber, which can have a sig- systems are key to helping customers understand the health of before. Can you elaborate? support customers as a high-level, trusted partner. We need to be nificant impact on yield. This coating can reduce defect levels by the tool and provide clues that make it possible to predict and able to help them solve their highest-value problems—the ones Pappis: The service business used to be driven by the need to keep 25% and boost mean time between cleans by up to 1.5x. While prevent problems. One example that comes to mind has to do with the greatest impact on the performance and yield of the de- systems up and running: identifying mechanical problems, that may not sound like much, consider that whenever you take a with an etch chamber. One of the things we typically look at vices they make—so that, for example, they can successfully ramp adjusting hardware, replacing parts and so forth. Equipment PVD chamber out of production, you have to vent it to do any kind is backside helium pressure. But what does that really tell us? a megafab to run the most aggressive nodes at the right yield, the reliability isn’t our customers’ main service need anymore—the of a clean or a kit change. Then you have to recover it to the same Often when there’s a spike in pressure it is in fact a backside right cost, the right quality and with the right cycle times. It’s criti- reliability of electromechanical systems is much greater than it performance levels, so it becomes a 24- to 72-hour service event. helium fault, so before we were able to characterize these cal for the customer’s success to be able to do that, and when you used to be. What’s driving everything now is vastly increasing If you can increase the time you’re running product by 1.5x before chambers the way we can now, we always assumed that was come down to it, that’s really what a modern service organization process complexity and the high costs that come with not you have to do a clean, and if you can also reduce the overall the problem and we would routinely vent the chamber and start like AGS has to focus on: enabling the customer’s success, helping getting it done right or not doing it fast enough. Service today defect level during that run by 25%, there’s a huge productivity maintenance. them achieve dramatically better results with our equipment. So is about fine-tuning processes for optimum performance and gain. These are the kinds of services that are true value adds for we’re evolving in order to do that more effectively. However, at one customer site, when we tied these chambers managing on-board technology so customers can predict and our customers, and they keep asking for more of them. prevent problems before they impact device performance and into Applied’s E3 factory automation software environment, yield. And that takes a much more advanced service model Our goal is to have customers always be willing to give us a “first we found that not all backside helium pressure events are NF S: That’s a huge challenge. How are you going about it? that integrates state-of-the-art technologies, expanded service look and a last chance.” That’s really critical for us, and what’s created equal! Some of them can be handled without actually staff expertise, and an unprecedented level of collaboration Pappis: It’s really a three-part strategy. Trust is bedrock. It underpins all key to making it happen is our willingness to listen openly to what having to vent the chamber. Others just amount to the normal between the customer and the OEM. our relationships with customers. The complexity and sensitivity a customer is saying, and then provide the relevant technologies, wear pattern of the e-chuck. Sometimes they mean there’s of issues impacting device performance and yield mean we have tools, people and whatever other resources are required—on a backside particle or a placement error we can handle just There will be more radical technological change in our industry to stay more closely connected to the customer than ever. You whatever basis makes the most sense—given a customer’s by calibrating the robot. This is a case where we can help the in the next five years than over the past 15, because scaling can’t do that without a solid foundation of trust. It’s something we specific situation. customer manage a tool in production much more efficiently by alone can no longer keep us on pace with Moore’s Law. You can always work to build on, because while it’s one thing to say we are characterizing things better and putting FDC models in place. see it starting to happen already—new architectures like Fin- willing to collaborate with customers to solve their highest-stakes With 30,000 machines installed, we are learning faster FETS and 3D structures, an explosion of new materials into what problems, it’s another to actually deliver on the promise. NFS: But what gives you the ability to handle customers’ were relatively stable gate and interconnect stacks—all of this highest-level problems? How are you different from than anyone how important accurate data analysis is, and requires more process steps, much narrower process windows, Trust gets us an invitation to the table. Once we’re there, being other service providers? we’re taking this capability across the installed base. For competitive on cost and quality are absolute prerequisites. Our many more interacting variables, and higher capital costs. Pappis: We’re different in almost every way that counts! First of all example, when our FabVantage consultants begin a customer customers have choices, so we need to define competitiveness we have unparalleled tool knowledge across a broad portfolio engagement, they do a deep discovery to determine the the same way they do. In a way, it’s like running a race where of process technologies. Second, AGS is at work every day in critical issues holding the customer back in terms of cycle there’s no finish line. The job is never done because we’re always production environments in the semiconductor, solar and display time, productivity, yield, and so forth. No two customers have “While it’s one thing to say we are willing to trying to make further improvements in what we offer. areas supporting an installed base of about 30,000 Applied the same needs, and even the same customer may have very collaborate with customers to solve their If we’ve proven we can be trusted to deliver on the basics of Materials tools. Customers typically run these machines for 20 different needs and priorities at different times and locations. Therefore, what we do is never ‘one-size-fits-all.’ What we highest-stakes problems, it’s another to cost and quality, the door opens for us to work at higher levels to 25 years, and so every time Applied has shipped a tool, for the to meet a customer’s most important device-performance and following two decades we have had recurring opportunities to really consider business as usual is to customize cost- and actually deliver on the promise." yield challenges. It’s there that I think AGS can demonstrate real help the customer get the best possible result out of their capital quality-competitive solutions to meet the exact needs of a innovation and leadership to help customers reach their goals. asset, and to learn a great deal from that experience. particular fab at a given time.

28 Nanochip Nanochip 29 CHARLIE PAPPIS:

SERVING “It’s ironic that the products our tools help UP A to create are in turn enabling some of the most exciting service solutions of the last Helping Customers BETTER decade or more. " deliver competitive products with engineering and preventive OUTCOME Improve higher yield and output. The maintenance services to service products from Applied advanced consultative services Equipment Global Services are designed for highly dynamic production NFS: What do you consider to be among the most difficult things NFS: Okay, but don’t customers have concerns about letting customers are trying to do today? an outside organization such as AGS become so deeply to address critical needs like environments. immersed in their proprietary data? maintenance efficiency and Pappis: A number of our customers are grappling with the myriad and Fab With more than 3,000 field issues involved with ramping these huge fabs: fabs designed for Pappis: Sharing of customer data and intellectual property is a huge cost reduction, while also engineers and nearly 33,000 60,000, 80,000 or even 100,000 wafer starts per month at concern for all of us in this industry, customers and suppliers providing advanced service 28 nanometers or other advanced nodes. Sure, they may have alike. It’s the lifeblood of our businesses. At a time when there Productivity Applied Materials systems technologies to help customers yield on pilot lots, they may have yield when they’re running a is greater collaboration than ever, protecting the data we At Applied Materials, we installed globally—across couple thousand wafers a month, but now they have to take that exchange is a critical priority. In addition to our stringent IP optimize equipment and factory understand that our success is many technologies and running production to a level ten times higher! And what we’re finding handling practices and employee certification processes, the productivity. is, they haven’t solved all of the problems that come with 7x24 simplest way to secure customer data is to ensure that it stays tied to that of our customers. thousands of processes—we operation at 60,000 wafers a month. on the customer site. By listening first, then attacking We offer a broad portfolio of are uniquely equipped to help We have a number of FabVantage consulting agreements AGS installs dedicated computers at customer facilities that challenges that are meaningful customizable solutions for identify, resolve, and predict where we’re actually helping customers deal with some of these have no external connections. Only the data the customer to customers, we can help them customers in the semiconductor, or prevent customer’s most challenges. Consultants use a disciplined discovery process and defines and allows AGS to access is drawn. We tell the solar and display industries. difficult problems, at both the tap into the Applied knowledge base, then combine it with the customer beforehand what we need and the customer either customer’s own data to give a more complete picture of what’s allows it or disallows it. At the tool level, we use a parallel port Options range from basic hourly tool- and fab operations levels. happening with the customer’s tool or line. Our customers to access the very same data the customer is accessing and Applied Materials certainly have the ability to solve these problems on their own. nothing else. Service Portfolio But with help from the FabVantage team they can identify the Fundamentally, it comes down to forging relationships with problem—and the solution—faster. And in the process, they customers that are built on mutual trust. It’s in the best Collaborating with Customers The AGS service portfolio offers many Applied services target key often uncover opportunities for additional improvements as well. manufacturing challenges to: interests of both of us to carefully handle the confidential to Predict and Solve Problems flexible options—from basic hourly information we share. engineering and maintenance services to • Increase maintenance efficiency more advanced, integrated services. • Improve output NFS: You talk about the blend of technology and the know-how of • Reduce costs the service team. Where does the technology come in? NFS: Charlie, any final thoughts? Pappis: Events like arcing and process excursions can have a huge Pappis: It’s ironic that the products our tools help to create are in detrimental effect on device performance and yields, and so turn enabling some of the most exciting service solutions of CERTIFIED TECHNOLOGY-ENABLED FAB CONSULTING the ability to predict and prevent them before they happen the last decade or more. Sensors and controllers, combined SERVICES SERVICES SERVICES gives customers a major competitive advantage. Our software with software, networks, and modeling and simulation Choose from our flexible Move from reactive to predict/ Available on an as-needed, project packages and new TechEdge service offerings combine methods, are opening the door to an amazing array of service solutions to optimize prevent operations. TechEdge basis, FabVantage consultants advanced software and analytics tools with experts who have service offerings that go well beyond traditional equipment system and factory efficiency. services can take your fab bring deep expertise and advanced special training in yield management, data analysis and factory- maintenance practices. operations to the next level. analytical tools to help solve tough floor dynamics. The result is a map of what’s happening with the Our attitude is that AGS exists solely to enable customer production problems that have the tool that helps pinpoint potential problems. This is a capability all success, and as the complexity of fab operations increases, Applied Performance Services greatest impact on your business. TechEdge our customers can benefit from, whether they are producing at AGS will evolve in lockstep with customers. We are, and ■■ Combine traditional support with the latest technology node on 300mm wafers or making analog, always will be, a trustworthy and capable partner dedicated to advanced software control FabVantage power, sensor, MEMS and other products on 200mm wafers. ■■ helping customers uncover and solve even their most difficult Applied Managed Service Provide greater predictability and ■■ Uncover hidden productivity prevention For example, TechEdge Prizm, for use with Applied CD-SEM production challenges. ■■ Drive predictability of yield and output ■■ Identify productivity loss tools in 300mm environments, is very helpful in chamber- and ■■ Process optimization fleet matching. We often find customers have tied their critical- NFS: Thank you for your time. Engineer On-Site Service ■■ Cost containment dimension data to just one lithography tool, but this enables all the customer’s CD-SEMs to be precisely matched so they can TechEdge Excursion Control get an entire tool fleet running in such a way that an expensive Preventive Maintenance Tool Output and Cost “Our attitude is that AGS exists solely Service lithography tool wouldn’t ever become a bottleneck. TechEdge Prizm Data Mining Yield and Predictability Another example is Applied E3 software. It brings high levels of to enable customer success, and as the predictability and performance by helping to pose and answer Transactional Service complexity of fab operations increases, Future Planned Fab Productivity questions like, which is the crucial data to be tracking? Is it one sensor or a combination? Are FDC data rates fast enough to cap- AGS will evolve in lockstep with customers." ture subtle but meaningful changes? Are control limits effective? Things may be running well, but could they run even better?

30 Nanochip Nanochip 31 CHARLIE PAPPIS:

30 Nanochip Nanochip 31 the problem is only partially P artnering fixed and is likely to reappear. In addition, successive Paretos will often exhibit variation in rankings or types of defects as the result of day-to-day in-line with variation caused by mismatched chambers, process variability or excursions, unanticipated process interactions, or random malfunctions. This instability Customers makes identifying the true root cause of a given defect more Figure 2. Numerous factors affect yield in the manufacturing of today’s devices. difficult and time-consuming. too Impr ve Yield The Applied Materials FabVantage consulting group Chip design and fabrication is becoming highly complex; potential sources of yield Chk ipma er’s Top-Down requirements for equipment and issues will require complete inves- implements a unique approach in Defect Resolution process to function precisely. tigation of hardware, process, complementing the chipmaker’s loss are multiplying and are often obscure. This makes rapid, problem-free production These in turn necessitate intricate FDC sensors, and integration. Chip manufacture at today’s top-down approach with a FDC sensor excursion control and The conventional Fail Pareto ramping increasingly challenging in a fast-changing market where time is at a premium. most advanced sub-40nm bottom-up approach to expedite chamber-performance matching approach to yield improvement nodes is significantly more yield ramping through optimal Fabs repurposing older systems find it especially difficult to achieve desired yields, as discussed later. implements failure analysis and demanding than at previous tool baselining and process- Conventional yield loss root cause determination for because the tools have not been optimized to meet the more stringent specifications of generations. The challenges specific optimization. analysis in the fab employs a top- each defect type appearing on stem from the introduction of the new technology node. Combining the top-down resolution process typically used in down analysis of defect issues the chart through an iterative new materials, new device and Eqi u pment based on Fail Pareto charts of approach that first examines fabs with the equipment manufacturer’s bottom-up optimization can streamline defect integration considerations, tighter Manufacturers’ finished wafer lots. Table 1 lists process integration, then the process margins, and process Bottom-Up resolution and shorten the time to ramp. key contributors to yield loss for unit process, and lastly hardware interactions, all of which affect Defect Resolution a typical 28nm logic process flow to determine and remedy the yield. Figure 3, illustrating high-k Shrinking feature dimen- in today’s fabs. Figure 1 illustrates In addition, matching that could appear in a Pareto source of the defect. This method The bottom-up approach metal gate technology, shows By sions; growing complexity of the typical ramp experience performance between chart. Many of these derive from is effective only if resolution of reverses the sequence of the many factors affecting yield. device architectures; interac- as compared to the smooth, qualification wafers and product multiple sources. Effective, the defect is permanent and investigation in resolving yield- Suketu Process interactions, arising tions among new materials; efficient progress that fab wafers poses a significant permanent resolution of each the Pareto remains stable over limiting defects. Once the top primarily from the greater and variabilities among lots, operators desire. Yet even as it challenge given such factors as issue requires understanding of successive process qualifications. issues, and module-level and Parikh And number of fabrication steps; chambers, and tools are among becomes more arduous to ramp, interactions from previous steps, all potential causes and holistic If the analysis has not considered process-related performance gap-fill, planarization, and Patrick the factors posing significant the imperative to accelerate it topography, pattern density, and remediation. The right side of the all the factors potentially targets are known for a specific patterning challenges; and film challenges in ramping advanced grows as shorter product lives edge defects. table shows that correcting some contributing to the defect issue, new technology introduction, interactions create more stringent Fernandez ICs to production-volume yield and narrower market windows Expediting the yield the bottom-up approach compress the time over which a ramp takes a partnership first identifies and eliminates new technology can generate top between the chipmaker and fundamental hardware and dollar for the producer. the equipment manufacturer. baseline-process deficiencies to The pressure to expedite This partnership combines the establish a “golden tool.” ramping is especially demanding chipmaker’s top-down approach It progresses from there to when systems are being to defect resolution with the unit process optimization, repurposed from an earlier manufacturer’s bottom-up and finally to integration technology generation to a more method of examining hardware, optimization. While these advanced one. Generally, fabs process, integration, and procedures are straightforward reuse approximately 80% of environment to streamline root when a new product is brought their older systems. Not only cause identification of specific online at the technology node must these tools be optimized to defects. In this way, the full for which it was designed, they meet the specific requirements spectrum of factors affecting can be more challenging when of a new process, they must be yield (see figure 2) can be working to enhance operation of Figure 1. Ramping to production is typically an arduous process. comprehensively rebaselined to a systematically and effectively repurposed tools. higher standard of operation. addressed. Figure 3. Complex process integrations, such as high-k metal gate, increase the potential for a wide array of yield-limiting defects. 32 Nanochip Nanochip 33 the problem is only partially Partnering fixed and is likely to reappear. In addition, successive Paretos will often exhibit variation in rankings or types of defects as the result of day-to-day in-line with variation caused by mismatched chambers, process variability or excursions, unanticipated process interactions, or random malfunctions. This instability Customers makes identifying the true root cause of a given defect more Figure 2. Numerous factors affect yield in the manufacturing of today’s devices. difficult and time-consuming. to Improve Yield The Applied Materials FabVantage consulting group Chip design and fabrication is becoming highly complex; potential sources of yield Chipmaker’s Top-Down requirements for equipment and issues will require complete inves- implements a unique approach in Defect Resolution process to function precisely. tigation of hardware, process, complementing the chipmaker’s loss are multiplying and are often obscure. This makes rapid, problem-free production These in turn necessitate intricate FDC sensors, and integration. Chip manufacture at today’s top-down approach with a FDC sensor excursion control and The conventional Fail Pareto ramping increasingly challenging in a fast-changing market where time is at a premium. most advanced sub-40nm bottom-up approach to expedite chamber-performance matching approach to yield improvement nodes is significantly more yield ramping through optimal Fabs repurposing older systems find it especially difficult to achieve desired yields, as discussed later. implements failure analysis and demanding than at previous tool baselining and process- Conventional yield loss root cause determination for because the tools have not been optimized to meet the more stringent specifications of generations. The challenges specific optimization. analysis in the fab employs a top- each defect type appearing on stem from the introduction of the new technology node. Combining the top-down resolution process typically used in down analysis of defect issues the chart through an iterative new materials, new device and Equipment based on Fail Pareto charts of approach that first examines fabs with the equipment manufacturer’s bottom-up optimization can streamline defect integration considerations, tighter Manufacturers’ finished wafer lots. Table 1 lists process integration, then the process margins, and process Bottom-Up resolution and shorten the time to ramp. key contributors to yield loss for unit process, and lastly hardware interactions, all of which affect Defect Resolution a typical 28nm logic process flow to determine and remedy the yield. Figure 3, illustrating high-k Shrinking feature dimen- in today’s fabs. Figure 1 illustrates In addition, matching that could appear in a Pareto source of the defect. This method The bottom-up approach metal gate technology, shows By sions; growing complexity of the typical ramp experience performance between chart. Many of these derive from is effective only if resolution of reverses the sequence of the many factors affecting yield. device architectures; interac- as compared to the smooth, qualification wafers and product multiple sources. Effective, the defect is permanent and investigation in resolving yield- Suketu Process interactions, arising tions among new materials; efficient progress that fab wafers poses a significant permanent resolution of each the Pareto remains stable over limiting defects. Once the top primarily from the greater and variabilities among lots, operators desire. Yet even as it challenge given such factors as issue requires understanding of successive process qualifications. issues, and module-level and Parikh And number of fabrication steps; chambers, and tools are among becomes more arduous to ramp, interactions from previous steps, all potential causes and holistic If the analysis has not considered process-related performance gap-fill, planarization, and Patrick the factors posing significant the imperative to accelerate it topography, pattern density, and remediation. The right side of the all the factors potentially targets are known for a specific patterning challenges; and film challenges in ramping advanced grows as shorter product lives edge defects. table shows that correcting some contributing to the defect issue, new technology introduction, interactions create more stringent Fernandez ICs to production-volume yield and narrower market windows Expediting the yield the bottom-up approach compress the time over which a ramp takes a partnership first identifies and eliminates new technology can generate top between the chipmaker and fundamental hardware and dollar for the producer. the equipment manufacturer. baseline-process deficiencies to The pressure to expedite This partnership combines the establish a “golden tool.” ramping is especially demanding chipmaker’s top-down approach It progresses from there to when systems are being to defect resolution with the unit process optimization, repurposed from an earlier manufacturer’s bottom-up and finally to integration technology generation to a more method of examining hardware, optimization. While these advanced one. Generally, fabs process, integration, and procedures are straightforward reuse approximately 80% of environment to streamline root when a new product is brought their older systems. Not only cause identification of specific online at the technology node must these tools be optimized to defects. In this way, the full for which it was designed, they meet the specific requirements spectrum of factors affecting can be more challenging when of a new process, they must be yield (see figure 2) can be working to enhance operation of Figure 1. Ramping to production is typically an arduous process. comprehensively rebaselined to a systematically and effectively repurposed tools. higher standard of operation. addressed. Figure 3. Complex process integrations, such as high-k metal gate, increase the potential for a wide array of yield-limiting defects. 32 Nanochip Nanochip 33 Partnering with customers To improve yield

yield improvement becomes an HW PROCESS fDC fDC-In-line Integrated Parametric Conventional FabVantage-Chipmaker Top Loss Types P1 Tools/Process Improvements Stability Capability Excursion Metrology DEfects Performance tOP-Down Approach Partnership efficient, systematic process.

M2–M4 Damascene (Opens, Etch Flakes) ULK, BLOk, TiN, Litho, Etch X X X X Once golden tools have • Identify top Pareto of yield losses, Extreme Edge Yield Loss (Planarity, EBR, DOF) ULK, Etch, ECP, CMP, Litho X X X X Top Issue Pareto Top Pareto of Yield Issues variations, zone-based losses. been set up, ensuring consistent M2–M4 Wiring (Residue, Missing Cu, Defect Analysis Defect Analysis • Develop hypothesis on each top loss performance across the fab Scratches, Cu Voids) Etch, B/S, ECP, CMP X X X X type and action plan to address. when fanning out the process Gate Pattern Defect (Over STI) HARP, CMP, Litho X X X • Define KPI at process level by or module can present a further Replacement Gate Polish Defects (Scratches, Module-Level Priority Tool List top issues. Pits, Dishing) HDP, CMP X X X Improvements Based On Each Loss • Incrementally tighten the challenge. Process results may specification as necessary. FEOL Device Parametric Loss (Vt, I Drive) Gate, High-k, SiGe, Junction X X X match on blanket wafers but vary M1 Contact W Plug (Missing Cu, Opens, • HW audit – Parts, chamber/tool on product wafers. Here again, Post-polish Residue) W CMP, Etch Open, ECP X X X X conditions, facilities, system Unit Process Process Hardware constants, PM procedure. FabVantage team knowledge can High-k Metal Gate Polish (Residue, Scratches) HK CMP, MG Fill, RG Module X X X X X Optimization Assessment/Improvements • Implement essential and high facilitate a resolution. Compre- STI Pattern Defect Litho, Etch X priority findings during PM/tool down. Implant Particles (Blocked Implant) Implant, Litho, Cleans X X hensive understanding of system Gate Replacement (Stringers, Pitting) CMP, Etch X X constants, calibration targets, Hardware Solution Golden/Backup Tool Set • Identify golden/backup tool for High-k EOT Control, Chem Oxide Cleans, RTA, ALD X X X each critical step. system sensors, and which of (If Issue Not Resolved By (Defects, In-line Targets) • Identify trace gallery analysis. Contact Mask/Etch (Missing Contact, Module And Process) E3/FDC Excursion/Unif Models • Monitor FDC and model excursions. them can modulate process drift Alignment, Block Etch) Litho, Etch, Wafer Warp and excursion or specific on- Gate Pattern Etch (Incomplete Pattern, Residue, • Partition/repeat cycling tests wafer parameters can effectively Stringers) Litho, Etch, Planarization X X Process/Cleans/Consumables/ to identify issues and address. complement the chipmaker’s STI CMP (Scratches, Residue) Polish, Cleans X X X Interaction Optimization • Systematic analysis to identify and BEOL (Rs, Leakage) ECP, CMP, Etch, ULK X X X X address issues, excursions. familiarity with process behavior NiSI (Rs, Leakage, Agglomeration, Missing) PVD, RTA, Cleans X X X to pinpoint the most appropriate Module • Develop fishbone and address Metal Gate Work Function, Diffusion Barrier X X X issues to create robust module-level path of investigation. (Integration Improvements) solution. Contact R, Opens (Missing Plug, FabVantage consulting Poor Contact/Liner Interface) PVD, Etch Clean, W Dep X X X Partial Reduction In Complete Reduction In engagements have achieved suc- SiGe Particles, Selectivity Residue Wet Etch, Cleans, EPI X X X X Overall Defectivity, Overall Defectivity, High Variability Reduced Variability cessful results at several major Table 1. Type and potential origin(s) of top yield losses in high-k metal gate fabrication. advanced technology custom- Table 2. Comparison of conventional top-down and FabVantage team approaches to yield improvement. ers, expediting yield improve- Establishing the golden tool defect count and tighten process models are developed based on examination of each unit system causes of yield-limiting defects. maker data on tool performance and bottom-up approach (see ment by reducing variation in involves detailed audits of the performance. individual tool performance and and process. Capabilities of This knowledge complements the provides a critically more table 2) minimizes repeated “fire process performance and defect hardware, process, facility, and A key step in the bottom-up overall in-line defects; these are the integrated tool set must be chipmaker’s expertise in the unique comprehensive data set that drills” that can cause significant excursions through systematic procedures used in periodic approach is to establish stable, then used for ongoing monitoring verified and results from blanket aspects of his process and can am- enables efficient root cause delay in ramping when root hardware, process, and integra- maintenance. Hardware audits optimal baseline process perfor- of the optimized tool/process wafers must be seen to translate plify top-down yield improvement. analysis and correction of the causes of defects are obscured tion audits and remediation. include chamber inspections mance. This is done through a and detection of subsequent correctly to product wafers on Second and more importantly, true root cause. by higher baseline defect levels These successes are founded on and system health checks process audit that investigates key excursions. which pattern densities and other the combination of customer data The clearer picture obtained and excursions that can vary ran- yield-improvement collabora- to identify issues, such as process steps, gas flow, plasma This detailed bottom- topographical challenges might on yield Pareto and equipment through the combined top-down domly from run to run. Instead, tions by FabVantage consultants mainframe particles, resulting terminations, plasma treatments, up analysis optimizes the alter performance. Also, electrical from inadequate cleaning, chamber cleaning, chamber “health” foundation of the tool, parameters of the completed back-side scratching, wafer conditioning, and interactions eliminating hardware and basic module must meet criteria across slippage, heater pad wearout, between a given process step and process-related factors as individual wafers, between and MFC bursts that create those immediately preceding and potential root causes of defects. wafers, and between chambers. particle excursions. With the following. In addition, process In other words, it reduces the equipment manufacturer’s signatures that cause within- “noise” level, making it easier Partnership Benefits perspective, the FabVantage wafer variation (e.g., center/edge to identify the “signal” that The FabVantage team’s team is also sensitive to or asymmetric) are examined and is the real culprit in a given approach of partnering with chip- defect-generating mechanisms remedied as are wafer-to-wafer situation. Once the golden makers in improving ramp yield that can arise over time (e.g., variations caused by differences tool is established, the same offers two major benefits. wear and tear on moving parts in the service lives of the chamber, improvements are fanned out to First, detailed knowledge of and process side effects on other hardware, or consumables. the rest of the fab for yield ramp. the hardware and its behavior chamber surfaces), and to E3/FDC sensor trace analysis In the case of process across multiple systems and the condition of moving parts follows for priority sensors and modules, stabilizing yield chemistry variations equips over successive maintenance critical steps to verify that tools distribution and narrowing FabVantage consultants with les- sessions. Further, the team can replicate a predefined golden variations from process sons learned and insights related initiate tool upgrades to reduce trace. Finally, sensor excursion excursions involves more than to possible sources and root Figure 4. Defectivity in successive layers, accumulated through the processes sequence, can obscure the true root cause of a defective top layer.

34 Nanochip Nanochip 35 Partnering with customers To improve yield

34 Nanochip Nanochip 35 David LammerS Partnering with customers To improve yield Technology Transitions and technologists at the Applied 5. Identify short-loop tests Materials Maydan Technology for undesirable process Shape 2014 Outlook Center (MTC). interactions and address The following example of this variability in defectivity of collaboration is characteristic of dielectric stack, patterning, Business should be good next year, but 2014 may be the FabVantage team’s approach and copper wiring. best remembered for the manufacturing challenges facing at customer sites. Figure 4 illus- 6. Systematically reduce logic and memory vendors. On the financial side, the trates issues related to BEOL excursions in defect count semiconductor market for 2014 looks better than in recent defectivity. In this case, post-CMP by eliminating unit process years, fueled largely by an expected shortage of DRAM patterning defectivity was causing excursions and setting up and NAND. Shortages equal stable or rising ASPs, and yield loss. The FabVantage/MTC sensor models to establish increases in capex budgets. team suspected that the defectiv- Jim Handy, Joanne Itow, Dean Freeman, process control limits for Objective Insights memory analyst Jim Handy Memory Analyst at Industry Analyst at Industry Analyst ity resulted not only from CMP, monitoring and reducing said he expects 2014 to be “a shortage year all year for Objective Insights Semico Research at Gartner but from multiple preceding pro- future excursions (see Figure 5. Representative sensor model for monitoring defect excursion. both NAND and DRAM. That should fuel some pretty

Handy recalled two previous transitions in DRAM rd cesses and the relative stability of figure 5). solid growth—more than 10%—for semiconductors each process (i.e., low-k dielectric Conclusion hancing baseline tool performance, overall.” Although no one is on allocation just yet, technology when companies struggled to ramp volume 7. Improve scumming, identify stack deposition, damascene and minimizing process variability Handy characterizes the current situation as a “budding production. “They were not able to immediately bring up o multiple causes of stack Ramping to production- patterning [lithography and etch]) and excursions. Working together, shortage,” the natural outcome of 2011, when capital a technology, so an existing shortage became a longer defects. volume yield in the shortest time interacting with incoming topog- they eliminate the “fire drills” and shortage.” But once 3D NAND production gets underway, possible is challenging for today’s investments in memory “just totally shut off.” raphy and defects. Besides overall By comparison, the conven- delays commonly experienced, Handy believes it will carry the industry further than some fabs, particularly when older Joanne Itow, an industry analyst at Semico Research, planarity, the cumulative effect tional top-down approach would replacing them with a smooth have predicted. Gartner’s Freeman noted that Samsung will tools are being repurposed for a said strong prices for memory chips this year and next year of defects from the most recent have started with the yield and progression from one golden tool employ a strategy similar to an earlier era, when IBM put more advanced technology node. are supporting overall growth by the chip industry. After layer and copper wiring defects lithography teams collaborating to fab-wide fan out and achieving its own DRAMs in IBM computers. Samsung will get a fast Fabs can save significant time 6–7% growth in revenues this year, Itow said that in 2014 from previous layers (i.e., miss- to improve planarization and sustained production-volume yield start on 3D NAND volumes by using them in its Samsung- and cost by implementing a ramp Semico predicts even stronger growth of approximately 10%. ing metal, scratches, and slurry the depth-of-field window. The with fewer preproduction runs. branded tablets, solid-state drives (SSDs) and PCs. yield-improvement partnership Gartner analyst Dean Freeman said next year is residue) could have a significant variability of the incoming dama- While individual differences in technology roadmaps with their equipment manufac- when the major logic foundries will prove their sub-20nm impact on patterning defects in scene stack and its underlayer Acknowledgements: The author are interesting, all manufacturers need to get a good turer. The chipmaker brings to processes with FinFETs as the major differentiator. “Intel the next layer to be processed. would further complicate overall thanks Patrick Fernandez, head of handle on these transitions. Going from planar to the partnership its top-down never missed a beat. But for the foundries, a slowdown The team’s failure analysis improvement as planarization FabVantage Yield Practice, for his FinFET transistors entails daunting lithography and etch analysis approach and in-depth took place at 20nm from a true Moore’s Law perspective,” proceeded as follows: process adjustments would guidance, and Jeannette Hoffman challenges, and moving from a planar NAND to stacking expertise in its processes. Freeman said. “The transition from 28nm to a true 20nm 1. Defect classified as metal impact the patterning window for editorial assistance; also Mehul 24 or more vertical bit cells appears to be an equally large The FabVantage team brings device was delayed, and it is taking the foundries an extra line lithography open without eliminating the root Naik (BEOL Integration MTC), Helen year. They should have introduced a FinFET at 20nm, but technology shift. cause of the defects. systematic bottom-up auditing Itow said the consolidation of the leading-edge chip

(having multiple potential Armer, and the FabVantage yield lasthe w of potential sources of yield- they stuck with planar, not quite realizing the impact on causes and exhibiting high Using the same kind of practice team for their support. power and performance.” industry into just a few players means that they cannot analytical sequence as detailed limiting defects; broad problem- afford to fail, and must invest the resources needed to variability from wafer to T resolution expertise; and proven Freeman was in Taiwan when I caught up with him wafer). above, the FabVantage team has For information contact by phone. He said the transition to FinFETs at TSMC “is succeed in any important technology transition. She noted helped numerous customers methodologies for yield loss that 6–7% revenue growth this year means the industry 2. Cause identified as resist [email protected] moving forward pretty well, with some decent yields, systematically address hardware analysis and remediation, en- has about $19 billion more coming in, and 10% growth scumming. and shuttle runs for customers with good results. But and process issues at the root of introducing FinFETs in 2014 is still a manufacturing next year will boost that to more than $30 billion in new 3. Root cause identified as defects in copper wiring layers challenge, so we expect to see the real launch of FinFETs revenues. topographical variation and the CVD stack. They have by the foundries in 2015, with significant capital spending “Our model would show a higher growth rate, but for (possibly local defects). also extended the lithography in that year.” the tentativeness of the overall world economy. Ultrabook 4. Solution path determined: depth of focus window by Handy said the NAND memory makers face important PCs haven’t gotten a lot of traction, which also has improving within-wafer dampened our forecast,” Itow said. identify critical hardware technology choices next year. Some, including Samsung, are David Lammers is planarization uniformity. This Remember those red brick walls that used to and processes; identify base expected to push a fast ramp of vertical 3D NAND, while an Austin-based methodical approach has resulted festoon the International Technology Roadmap for defectivity/excursion rate others have signaled that they will stick for the next year technology journalist. and reduce systematically in systematic reduction in each or two with a planar NAND architecture, but with a high-k Semiconductors (ITRS)? Next year may be notable by detailed hardware defect type observed by these dielectric. Either approach—3D or planar high-k—presents for companies blasting through the physical limits inspection; corrective customers, producing overall manufacturing challenges. Handy believes sub-20nm NAND presented by planar transistors and moving on to volume action/maintenance; and improvement in multi-layer BEOL production volumes ramps could be impacted, prolonging manufacturing of vertical structures. It won’t be easy, but resolution of apparent yield, such as that illustrated in the memory shortage. “Companies are adopting NAND once accomplished it should position the chip industry well process issues. figure 6 from the collaboration flash technology that they don’t yet know how to build.” for the rest of the decade. with MTC. Figure 6. Systematic reduction in BEOL module defectivity achieved on in-house wafers.

36 Nanochip Nanochip 37 David LammerS Partnering with customers To improve yield Technology Transitions and technologists at the Applied 5. Identify short-loop tests Materials Maydan Technology for undesirable process Shape 2014 Outlook Center (MTC). interactions and address The following example of this variability in defectivity of collaboration is characteristic of dielectric stack, patterning, Business should be good next year, but 2014 may be the FabVantage team’s approach and copper wiring. best remembered for the manufacturing challenges facing at customer sites. Figure 4 illus- 6. Systematically reduce logic and memory vendors. On the financial side, the trates issues related to BEOL excursions in defect count semiconductor market for 2014 looks better than in recent defectivity. In this case, post-CMP by eliminating unit process years, fueled largely by an expected shortage of DRAM patterning defectivity was causing excursions and setting up and NAND. Shortages equal stable or rising ASPs, and yield loss. The FabVantage/MTC sensor models to establish increases in capex budgets. team suspected that the defectiv- Jim Handy, Joanne Itow, Dean Freeman, process control limits for Objective Insights memory analyst Jim Handy Memory Analyst at Industry Analyst at Industry Analyst ity resulted not only from CMP, monitoring and reducing said he expects 2014 to be “a shortage year all year for Objective Insights Semico Research at Gartner but from multiple preceding pro- future excursions (see Figure 5. Representative sensor model for monitoring defect excursion. both NAND and DRAM. That should fuel some pretty

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