V10/Issue 2/2015 The Future 14 Automation Helps18 Mobility 24 of Displays Overcome Productivity Drives Thin Is Flexible Challenges in Wafer- Packaging Level Packaging

Solutions for Factory and Equipment Efficiency

Packing more into less SLIMMING DOWN AND SCALING UP: HOW THIN DEVICES

PUBLISHER ARE TRANSFORMING Peggy Marcucci CONTENTS [email protected] THE OSAT INDUSTRY EDITOR-IN-CHIEF Liz Baird A Letter from Ali Salehpour [email protected] Every so often it happens. Our industry reaches a major infl ection point and suddenly everything Human Factors TECHNOLOGY ADVISOR in Automation Helen Armer changes. We experienced it when the Internet became ubiquitous and PCs drove chip demand. We Systems 2 [email protected] experienced it again when smartphones and other mobile devices shifted chip demand. And as mobile ALI SALEHPOUR devices become thinner and thinner, we’ve reached a new infl ection point. The line between where CONTRIBUTING EDITORS SENIOR VICE PRESIDENT wafer processing ends and packaging begins is now blurred, and the result is nothing less than the Gary Dagastine AND GENERAL MANAGER, transformation of the outsourced semiconductor assembly and test (OSAT) industry. David Lammers Not so long ago, product packaging was a pretty straightforward proposition. The fi rst iPhone used Jill O’Nan NEW MARKETS AND SERVICE GROUP just 2 wafer-level packages. The latest iPhone 6 uses 26! Today’s consumers clearly want it all: thin, DESIGN mobile devices that provide complex functions in a convenient form factor. It’s a challenge our industry Jane Olson Graphic Design has to meet, but how? The Future 8 That’s the focus of this issue of Nanochip Fab Solutions. In these pages, you’ll learn why chip Qorvo Ramps of Displays in Richardson manufacturing can no longer be neatly divided between front-end and back-end processes. We Is Flexible 14 discuss how OSATs are implementing fab-like advanced control processes and wafer fab equipment NANOCHIP is published by to deliver on the demand for more complex packaging. And you’ll learn why fan-out wafer scale Mobility Drives Applied Materials, Inc. Thin Packaging 18 © Copyright Applied Materials, Inc., 2015 packaging, through-silicon vias (TSVs), and fab automation technologies are key enablers for this Automation industry transition. Helps Overcome www.appliedmaterials.com Productivity Automation technology has wider implications for both front-end and OSAT manufacturers, Challenges in and it’s another theme we explore in multiple articles. When it comes to fab productivity, increasing Wafer-Level 24 Packaging the yield and output side of the equation has a far greater impact than simply reducing costs. You’ll read how using automation software to optimize every production step—from planning to dispatching— Nanochip Fab Solutions is now delivered in an environmentally friendly online version. can overcome fab ine˜ ciencies and enable manufacturers to meet the demand of fast-changing Printed copies are available upon request. markets. For a free subscription, or to An outstanding example is RF supplier Qorvo in Richardson, Texas, which we profi le in this issue. Fan-Out Is a add colleagues to the mailing list, Game Changer 30 please send an email to By investing in fab automation software and hardware, Qorvo has empowered its workforce and [email protected] increased production of bulk acoustic wave (BAW) fi lters 10x over the last 5 years using refurbished with the following information: 150mm and 200mm tools. That growth will undoubtedly continue as demand for 4G smartphones • Name proliferates worldwide—and Applied’s commitment to supporting legacy tools will enable Qorvo • Title • Company to meet it. • Business address In addition, new Applied tools are being developed to help customers maximize the value of big 32 • Business email* Next-Generation data. One example, discussed in this issue, is our Next-Generation Fault Detection and Classifi cation Fault Detection *Sorry—no general accounts, e.g., Gmail, AOL, Yahoo (NG-FDC) solution. It includes enhancements that signifi cantly reduce setup times, improve fault Improves Quality and Reduces Cost detection with fewer false alarms, and leverage big data capabilities to decrease response times and PLUS: increase depth of analysis. All trademarks so designated or 38: Surface Textures of Chamber Parts No matter how this current infl ection point reshapes our industry, however, Applied’s essential goal Can Boost Tool Output and Availability otherwise indicated as product names or services are trademarks of remains the same: to solve problems for customers, enabling their success. Whether you’re an OSAT 40: Optimizing Productivity Analysis for Better Factory Performance Applied Materials, Inc. in the U.S. and who depends on highly reliable legacy tools, or a fab manager who needs state-of-the-art solutions, other countries. All other product and our product and service portfolio is designed for you. As mobile and wearable devices continue to slim 45: Global Customer Contact Center Now service marks contained herein are Available in More Regions trademarks of their respective owners. down, we will continue to scale up—with a pipeline of highly di£ erentiated o£ erings that allow you to 46: Subfab Exhaust Management Evolves incorporate the latest and most sophisticated technologies into your packaging and production. to Meet New Challenges Change can be daunting. But it’s inevitable. As the following articles will show, change is not 49: The Last Word: Chipmakers Remain something you have to face alone. Applied Materials will be there with you, through this infl ection point Wary of Data Sharing and the next. Looking ahead to see what’s around the corner is what we do.

NANOCHIP 1 When you consider the design of factory automation systems today, you have to ask yourself: Is the system an extension of its users or are the people who use it an extension of the system? The distinction is important, because we often adopt the principles and lessons of previous system deployments, and allow them to shape user behavior.

Often this means consolidating user experience into applied to fault detection and classifi cation (FDC) and an interface or into an integrated data set that allows contamination-free manufacturing (CFM). These factory meaningful decisions. But the results of these patchwork processes are also examples of complex multivariate e£ orts may be ine£ ective or ine˜ cient, particularly when scenarios that are di˜ cult to isolate. it comes to homegrown factory automation systems. A fundamental fl aw in the patchwork approach is BOTTOM-LINE IMPACTS lack of adherence to human factors in engineering. While There are two fundamental ways in which any general solutions are built on the premise that more system can negatively impact a company’s bottom information provides better insight and better problem line, either directly and indirectly. The fi rst is obvious: resolution, the all-too-real phenomenon of cognitive overt occurrences such as wafer breakage and particle saturation is given little regard in system design. contamination. This discussion is centered on the design of an The second is more subtle, but more impactful: integrated workfl ow management system to help interpretation of signals in the fab. How well this is with the disposition of inline statistical process control managed in automation system design has a direct (SPC) violations. But a similar line of thought can be

HUMAN ERRORS LEAD TO MORE EQUIPMENT AND FACILITIES CHALLENGES HUMAN Human Error Not Following Procedure Mean Time to Detect

Lack of Signal Not Acting Upon to Trigger On FACTORS the Right Signal Equipment and Facilities Maintenance Not Understanding Lack of Timely Symptoms Response Equipment Maintenance Failure Activities IN Not Doing AU TO M AT I O N the Right Thing Suboptimal SPC Consumables Facilities BY SELIM Management Change Problems NAHAS Too Many Signals SYSTEMS to Manage

Figure 1. 2 NANOCHIP NANOCHIP 3 HUMAN FACTORS IN Human beings, on the other hand, come with an An even better approach would be for users to have This raises the following question: how well adapted AUTOMATION entirely di£ erent set of characteristics. Two people the ability to modify the previous points on the SPC chart are people to interpreting which sources cause the SYSTEMS can interpret the same stimuli di£ erently, yielding once additional data arrives confi rming the actions of variability? Consider the inline SPC world. far di£ erent outcomes. People frequently try to fi x the fi rst violation. In e£ ect, the user would be able to Wafer measurement faults can be the product of production problems by modifying automation rules understand whether the results of the actions taken have a number of root causes; possibly more than one at a impact on profi t margins, because margin-eroding based on their individual observations and beliefs. met the success criteria, and thus confi rm that the proper time. The user, typically a process technician or process events, driven by scrap rates and excursions, are primarily Those individual di£ erences may clash with the decision was made. This would allow for a more accurate engineer, is required to identify the possible sources of products of human error. E˜ ciently identifying the intentions of the manufacturing team. fl agging of the SPC samples that shouldn’t be considered variability and adjust them accordingly. underlying causes of variability in wafer processing and E£ orts have been made to integrate the highly in the calculation. In order for this to be possible, a concise, The user has to overcome a number of hurdles being able to measure cause and e£ ect—not just action methodical rule-driven semiconductor production easily defi ned, and auditable action trail must exist that all at this point. There is the possibility that a violation and e£ ect—enable us to reduce the frequency of some of environment with the cognitively varied understandings users can see. occurred because of an incoming problem from an these problems. of the individuals who work within it. For example, the upstream process. This can stem from mismatched Automation systems can help reduce human error by: industry has adopted so-called Out-of-Control Action SOURCES OF VARIABILITY SPC, from tool matching at the process and metrology 1. Using proper detection screens to capture events. Plans (OCAPS) as the standard method to deal with levels, from mismatched specifi cations, or from a simple If you ask four di£ erent process experts what the 2. E£ ectively bridging communication gaps that exist these circumstances. But it’s not adequate. process adjustment such as a recipe modifi cation. violation rate (i.e., the variability) of a mature process within modules and across teams to facilitate the Is there a better way to bridge this gap between First, the user must consider the health of the should be, you will get four di£ erent answers. If you rapid and accurate communication of information to man and machine? For the inline SPC world, bridging current tool that processed the wafer by asking introduce a statistician into the mix you will add an those who need to act. the gap would require the ability to quickly make good questions such as: Is the tool matched? Was there a additional answer that will likely not match any of them. Being sensitive to signals that something is amiss. decisions according to the wafer measurements taken fault on the tool? Was an experiment run on the wafer 3. The reason for this is simple: sources of variability are not over the course of manufacturing a semiconductor previously? Once such measures are in place, identifying well understood nor are they well managed. opportunities to automate and streamline workfl ows more product. e£ ectively becomes possible. Several foundational elements are required for such a system. To begin with, it must adhere to POTENTIAL CAUSES OF VARIABILITY AMONG WAFERS HOW DID WE GET HERE? consistent and proper SPC practices. Without a consistent approach to SPC, additional variability Most automation systems used in semiconductor would be introduced, and if a cause isn’t attributed to Process Incoming Metro Tool Process Tool Recipe manufacturing are homegrown e£ orts or a composite of some source, then a falsifi cation could become part of 3 USL internal and specialized products from various suppliers. the dataset used to construct the control limits of an Some components may be state of the art while others are SPC chart. 2 far less sophisticated. Although the semiconductor fab has For example, say a wafer is measured at a existed for over four decades, most automation systems metrology tool in a fully automated facility. The are still designed as a patchwork of capabilities. metrology tool indicates a problem that points to 1 These capabilities typically include a material a process tool. Meanwhile, because of the delay in execution system (MES), a recipe management scheme, getting the wafer to the metrology tool, additional lots SPC, equipment interface, dispatching and material- have already moved through that same process tool. 0 handling systems, computer-controlled maintenance These lots are likely to exhibit the same problems as management system, routines for spec and quality the original measured wafer, if the problem really is management, and an enterprise resource planning associated with that process tool. -1 (ERP) system, to name just a few. But if the user could assign a cause to the fi rst All these systems, however, have a singular supporting wafer that points to the process tool, and also associate role: they are all used to manufacture wafers that are sold the additional lots that have run through the tool, -2 to customers. They are built on fi nite business rules. They then these additional points could be omitted for the tend to be predictive in some cases (with varying degrees purpose of control limit calculations. This would serve of success) but most are often little more than interrupt- as a fundamental step toward managing the process -3 LSL driven systems. control limits. Figure 2.

4 NANOCHIP NANOCHIP 5 HUMAN FACTORS IN AUTOMATION Ine˜ ciency also breeds a culture of “Verify that it’s not my tool and process, and then move on with life HUMAN VARIABILITY VISUALIZED SYSTEMS because it’s not my problem.” The result is a hesitancy to make decisions if there is a perceived risk in doing so. 100

Next, the metrology tool should always be looked HUMAN INTERPRETATION 90 at. And fi nally maintenance activities on any piece of OF SOURCES OF VARIABILITY equipment should be considered as a possible contributor 80 to additional variability. Recently, Applied Materials looked closely at ways to How does a user navigate all these potential sources? handle human variability. Let’s look at the ways a human 70 Typically the information required to evaluate the being interprets information, and also consider the overall 60 situation and make a proper decision resides in fi ve or e£ ects of making a decision for better or worse compared more databases. There is also a great deal of information to not making a decision at all. 50 duplication within the four walls of the fab. In semiconductor manufacturing there are many faults whose e£ ects on the overall quality of the There have been attempts to aggregate this 40 information and help visualize some of the sources, but product can’t be quantifi ed until much farther down never in a streamlined and e˜ cient manner. For example, the line. Often, there is little evidence to relate the data 30 if you audit corporate OCAPS, you will fi nd that none to performance. Out of 160 parameters, for example, of the plans consider all of the sources and information maybe only 15 have a known correlation to an electrical 20 actually required to answer the question presented. As a test parameter that a£ ects device power consumption or result of this decentralization, users frequently su£ er from reliability. 10 information overload or deprivation. Until someone raises a fl ag, you as a user will learn little from your persistent SPC violations. Most aren’t 0 THE PSYCHOLOGY OF SHIFTWORK correlated to electrical test parameters and there is little Process opportunity to sensitize a culture to them. Therefore, if Process Process Process Process Incoming Incoming Incoming Incoming Unknown Unknown Unknown Unknown Unknown Metrology Fab modules are sta£ ed 24x7. The majority of these Metrology Metrology Metrology Metrology you overload users with signals that have little discernable shifts are measured on the number of dispositions per PE1 PE2 PT1 PT2 PT3 e£ ect, they will begin to dismiss the meaning of the hour or shift. violation, because in this instance doing nothing is less There are multiple users with varying degrees ETC-RF-EP01 ETC-RF-EP01 ETC-SEM-EP01 ETC-SEM-EP02 risky than taking action. of expertise manning stations and tasked with the The interpretation of users is the most important disposition of SPC violations. Technicians and engineers Figure 3. variable there is. If it were simply a matter of evaluating are dedicated to modules that are usually vertically data thresholds, we would be able to automate The solution is to measure this variability as a standard 4% reduction in human variability across all modules in oriented. Metrology is often a department of its own and everything. But again, the biggest source of variability KPI and institute a mentoring program within the module less than 3 months. the upstream and downstream modules are not as closely comes from the inability of people to make proper to connect process experts with users who demonstrate This approach is closely coupled with user training tied as they should be. observations in a standardized manner. Unfortunately a bias. The interpretations of users will become more that focuses on problem-solving with a new dimension. In the absence of a robust communication network there are no timely and e£ ective ways to resolve this homogeneous in a very short period of time. Continuous It also integrates the failure and response-detection that is systematic and repeatable, a breakdown in through training. improvement programs (CIPs) will then allow shift methods, in this case inline SPC, with the equipment and communication generally allows issues to persist. A well-designed automation system would provide behavior to change in lockstep for a given process across process failure modes and e£ ects analyses (FMEAs). When you consider the length of the task list for any the ability to audit the interpretations of its users, who the entire module sta£ , providing measurable and more By reducing human error and variability, fabs can module, you can imagine how easy it becomes to tend to gravitate to one source or another depending on meaningful results. rapidly roll out methods of mitigating future scrap events. allow certain symptoms to linger, especially those their understanding of the violation. Applied Materials has invested in a number of Their automation systems become extensions of the with known workarounds. Figure 3 is an example of the variability in SPC solutions that target human-error and variability reduc- people who use them, bringing new levels of e˜ ciency to This dynamic makes it impossible to build a signatures by user for a given process. Process engineer 1 tion across inline SPC, including tool qualifi cation, fault the fab, while preserving the human factor. reliable manual system for the disposition of lots. (PE1) and process engineer 2 (PE2) appear to respond to detection, defect and contamination management, Symptoms of this ine˜ ciency include an excessive the same process di£ erently. The same can be seen for and electrical test. Field results have demonstrated a For additional information, contact [email protected]. number of re-measures and tool qualifi cations. process technician 1 (PT1) and so on.

6 NANOCHIP NANOCHIP 7 QORVO When RFMD and TriQuint 200mm silicon wafers for the BAW Semiconductor merged at the Estimated BAW Market Share fi lter line, and from 100mm (4-inch) beginning of 2015, it brought together to 150mm (6-inch) GaAs and GaN- RAMPS IN RICHARDSON 2015 two synergistic companies—each TDK-Epcos 4% Taiyo Yuden 1% on-SiC substrates. The compound with roughly a billion dollars in semiconductor line is largely used revenues—and created a merged to make high-power RF amplifi ers entity, Qorvo, Inc., which may for infrastructure (base station) and approach $3 billion in sales this year. defense customers. Qorvo Qorvo’s rapid growth is 33% “We are expecting a big pull in refl ected in expansions at all of its Avago 2016. As the fab gets fi lled out, how do 62% manufacturing operations. The you scale? We can look to a 200mm company’s Richardson, Texas, fab has line for the BAW fi lters, and are running increased production of bulk acoustic some 200mm now. Over the last 5 wave (BAW) fi lters by 10x in the last years, it has been mandatory that all of 5 years, and demand is expected to Figure 1. Avago and Qorvo share all our 150mm equipment be convertible continue to increase as smartphones but about 5% of the market for BAW to 200mm,” Witham said. using 4G wireless networks fi lters. (Source: Qorvo, Inc.) TriQuint bought the Texas proliferate around the world. Instruments defense electronics Brad Sha£ er, senior analyst for 2016 before it fully catches up to business in 1998, and soon after mobile electronics at IHS in Tempe, demand for its fi lters. moved its Texas operations into the Arizona, said BAW fi lters, already “BAW is growing signifi cantly Richardson fab, which had been one of the very high growth areas in and at a very fast pace, and that is making DRAMs for a Hitachi-Texas smartphone components, will gain where you are seeing some of these Instruments (TI) joint venture called further momentum as LTE wireless utilization issues,” Sha£ er said. TwinStar. Many of Qorvo’s current networks in China come on line. Howard Witham, the Richardson workers had previously worked at the The LTE networks operate at site manager, said Qorvo has invested TI gallium arsenide-based defense frequencies above 1.5–2 GHz where about $220 million over the last 2 electronics line. BAW fi lters have performance years in the Richardson fab. About “The people from the TI defense advantages over surface acoustic 400 employees were added to the group were outstanding. They had a wave (SAW) fi lters. “As LTE gets manufacturing sta£ , which raised healthy chip on their shoulders, and BY DAVID Driven by fast growth in smartphones, RF supplier Qorvo Inc. closer to where Wi-Fi fi ts into employment there to 1,200. The were very eager to show that they had LAMMERS the spectrum, there are possible Richardson team has brought in the capability to move into a high- has been expanding production of BAW fi lters at a rapid rate. interference issues,” Sha£ er noted. about 40 tools for a pilot 200mm volume manufacturing environment on Avago Technologies and Qorvo line, and expanded the 150mm line by a commercial product,” Witham said. Howard Witham, vice president of Texas operations, sat down share about 95% of the market for 3x in the last 2 years. When he moved from managing BAW fi lters (see fi gure 1), and are Qorvo’s Richardson fab has two fabs for STMicroelectronics to TriQuint with Nanochip Fab Solutions at the company’s Richardson, Texas, the only BAW suppliers capable quite di£ erent product lines: BAW in 2010, the company was in the of meeting the huge volumes that fi lters and power amplifi ers made on early stages of BAW production. The fab to talk about how fab automation tools have helped an smartphone vendors Apple and gallium arsenide (GaAs) and gallium Richardson fab’s GaAs and GaN-on- Samsung require. “Avago and Qorvo nitride on silicon carbide (GaN on SiC defense and infrastructure line experienced workforce deal with rapid capacity expansions. are both investing a lot of money to SiC) for infrastructure and defense used only about one-quarter of the meet demand,” Sha£ er said, noting customers. As the fab’s fl oor space 50,000-square-foot fab, processing that Avago has stated it may be late fi lls out, the next step is to move to about 200 wafers per week.

8 NANOCHIP NANOCHIP 9 QORVO RAMPS IN RICHARDSON

The company quickly began environment where every day our scrubbed its quality database and ramping BAW fi lter production MES was crashing.” found that about 8% of the scrapped as smartphone sales zoomed up. One challenge was to convince wafers were preventable. In those early days of 2009 and management to release the capital “We fi gured out how to do 2010, the challenge was to keep expenditures needed to modernize automated optical inline inspection in up with demand. “We had yield the fab with new factory automation a fab that was not looking at anything and reliability challenges, moving hardware and software. “We were inline. Nothing we did was novel, but I a young technology into a robust begging for APC and process control, can tell you that we got huge benefi ts manufacturing state,” Witham said. for improvements in our MES. Our very quickly,” Witham said, adding One answer was to invest in management said ‘OK, if you want a that “matching equipment becomes fab automation, including advanced new MES, you have got to commit to a possible when you have these tools.” process control (APC) and a new return on that investment. You have to manufacturing execution system put a dollar value on it,’” Witham said. RIGHT TOOLS FOR THE JOB (MES). The TriQuint senior managers Initially concerned that the were receptive because they had gone Richardson engineers’ experience through several “extremely painful” PAINFUL EXCURSIONS with defense ICs would prove a excursions that resulted in million- At last year’s Advanced Process handicap, Witham found the opposite dollar fi nancial losses. Problems— Control (APC 2014) meeting in Ann to be the case. “I thought I would have ranging from a helium leak in a Arbor, Michigan, Witham detailed a fi ght on my hands, but they were so cryogenic pump to fl uctuations in how he brought modern process ready. They tell me now that if I ever CMP carrier speeds to an irregular control techniques to Richardson. wanted to reverse directions on these argon supply—were slowing down the “My feeling at that time [2010] automation tools, that I had better yield ramps at Richardson. The connected life is enabled by advanced RF technologies from Qorvo. was that we were about 15 years watch it,” he said. “The engineering team started behind, and that we had about 2 years Process control is a big reason documenting things that they beyond the sheer boost in capacity power densities and heat dissipation that acts as an acoustic resonator, to show some progress,” Witham to move to 150mm wafers for the were guessing at before. The team with the larger wafers. Witham said with GaN. A U.S. power electronics fi ltering out unwanted frequencies. said. He recalled coming into “an compound semiconductor line, as Qorvo moves from “vintage” research consortium, based near The goal is to pass on 100% of the 100mm equipment to 150mm tools, Albany, New York, and led by General in-band frequency. it can support improved recipe Electric, is now getting underway. “This is not like GaAs or silicon downloading, easier operation for the “We see more GaN in the future,” where the active component is in the direct labor force, and data capture. Witham said, noting that there is a wafer. What we do is all up above the With the newer 150mm “lot of pull from our customer base. silicon. With these acoustic resonators, refurbished tools, “the engineers We have a very competitive GaN the piezoelectric layers are not easy can see what is happening with the amplifi er product line now and over to do,” Witham said. At the high equipment. Operators don’t have to the next two or three years we see frequencies in which BAW fi lters are make decisions with poor data; we that potentially really taking o£ in the e£ ective, the piezo layer must be only can set up algorithms to make the commercial space.” hundreds of nanometers thick, and decisions for them,” Witham said. the acoustic Bragg refl ector is created The 150mm compound BAW FILTER BOOM by stacking thin layers of alternating semiconductor line paves the way for sti£ ness and density. While Qorvo’s compound semi- what could be a boom in GaN-based Physical vapor deposition (PVD) conductor production line continues power amplifi ers, as customers is a key process step, and fi nding to thrive, much of its growth has come beyond the defense sector turn to used tools has been a challenge, from making BAW fi lters. They are GaN for improved power e˜ ciency. forcing Witham to buy some new made on a silicon wafer that acts as GaN is increasingly used in LEDs, PVD equipment at higher prices. (See a simple carrier, with nothing active led by Cree, Sumitomo Electric, and “Demand for 200mm Tools Outstrips in the wafer. Above the silicon, Qorvo others. And power transistors are Supply,” Nanochip Fab Solutions, Vol. 10, deposits aluminum nitride and other taking advantage of the increased Issue 1, 2015.) fi lms, which form a piezoelectric layer Howard Witham, vice president, Texas operations, at Qorvo.

10 NANOCHIP NANOCHIP 11 QORVO RAMPS IN RICHARDSON

Witham said that during the The equipment refurbishment capacity as one criterion in their recent 3x production expansion at team has worked with equipment component selection process. “If I the Richardson fab, the company’s OEMs, including Applied Materials. have manufacturing clout compared suppliers did not have a shortage Qorvo also relies on local refurbishers to competitors, that’s a big plus for of cores, although some of the who work hand-in-hand with the in- the smartphone manufacturers. tools were in “tough shape” before house equipment technicians. They have to believe you have put in refurbishment. Buying largely brand- By mixing large OEM and the necessary capacity. At Qorvo, new equipment is not an option given local refurbishment suppliers, and we have to bet early. We can still the company’s wafer cost targets. converting 150mm tools to 200mm, be under capacity, but then we are Witham believes he will be able to scrambling to put in new capacity FROM LEMONS add enough capacity while staying and scrambling to get every bit out of TO LITHOGRAPHY within his equipment cost targets. our existing tools as we work with our supply chain to put in new capacity.” “We did not feel the shortage The key to success is not being [for used cores], and maybe that’s FAST AND SLOW overloaded, which can put the fab because this RF market is now big YIELD RAMPS into overdrive mode. That can result enough that we get more attention One challenge Qorvo faces is in quality issues, while keeping from the suppliers. I felt the biggest how to meet the demands of the volumes high and wafer costs low. pinch on the steppers. We found fast-changing smartphone market, “Volumes are everything some lithography tools on the used where the RF modules are upgraded when it comes to the best fi nancial market, but we got some real lemons. regularly. A BAW fi lter might be in performance. Semiconductors are Fortunately, we have at least two production for only 12–14 months a very heavily capitalized industry, former litho vendor fi eld service before production switches to a new and we want to keep this fab full so reps working here at Qorvo, and if design, and profi tability depends we can contribute to a good P&L,” Qorvo products for automotive applications. you can give them a frame, they can on winning key sockets and then Witham said. build you a stepper. That’s the dice meeting demand with a fast yield At CS MANTECH, a recent specs, and more stringent limits on smartphone game where decisions hire people who used to work at you are rolling. That’s what can be ramp (see fi gure 2). compound semiconductor battery power. Every year you have are necessarily made late, with all the various semiconductor fabs the di£ erence [between success and Witham said smartphone manufacturing technology to win at all the big smartphone precious little spare time to add here,” Witham said. failure].” makers factor in manufacturing conference, Witham detailed the makers.” capacity. Qorvo’s management profi t di£ erence between slow “You tend to go late, and when and workforce have met some Yield Learning Curves and Resulting Margin Dierence and fast yield ramps, with a 4.45% A SIGNAL IS NEEDED you do, you have got to be fi ring on incredible challenges: quickly expanding production of high- 90.0% 10.00% di£ erence in margin impact over the Witham added that “if you think all cylinders. You cannot a£ ord any 9.00% signifi cant hiccups. You can’t hire volume RF components—BAW 85.0% product’s relatively short run. the company will win something big, people too soon, and you can’t buy fi lters—at a time of amazing 8.00% In his keynote speech at the you want to learn about your win 80.0% equipment too soon,” Witham said. growth in smartphone and wireless 7.00% conference, Witham said that “the within your capacity lead time. You 75.0% One plus has been the availability infrastructure shipments. Along the 6.00% fab must have excellent speed for have to get some signal in order to NPD [new product development] of a skilled workforce in the Dallas way, they have learned to use new 70.0% 5.00% make a $200 million investment, prototypes during development and area. Several IDMs have either closed productivity tools to get the most 4.45% 4.00% and our customers understand that. 65.0% their fabs there or reduced their out of a fl eet of mostly refurbished Yield and Margin Yield also for fast engineering learning The equipment manufacturers are 3.00% Dallas area manufacturing footprints tools, coping with steep ramps of a 60.0% cycles when working to improve not going to sit there with their own Fast Learning Curve 2.00% considerably. truly unique product. SlowLearning Curve yields.” 55.0% supply, waiting for us, and it is the Cumulative Margin Di erence 1.00% “We’ve heard of other locations (Volume Weighted) Witham explained the di˜ culty. same for all of us in the [production] 50.0% 0.00% For additional information about “You have to win [the BAW fi lter chain.” that are having trouble fi nding 0 2 4 6 8 10 12 14 16 18 20 experienced people, but we are Qorvo, Inc., visit www.qorvo.com. Month sockets] every year. The competition Suppliers must have a certain is fi erce to win sockets, with new size, and a willingness to play in a fortunate in Dallas, because we can Figure 2. A fast yield ramp is key to profi tability in the smartphone components business, where products can change in about a year. A fast yield ramp resulted in a signifi cant boost in margins. (Source: APC 2014 proceedings.)

12 NANOCHIP NANOCHIP 13 Bendable, foldable and curved displays for a variety of applications, enabled by advanced equipment and materials engineering, will bring new high-margin opportunities to manufacturers.

If you’ve ever thought how convenient it would be to For example, it’s very di˜cult to maintain the have a mobile device with a large display that you could required cell gap between the color filter and the TFT fold and put in your pocket, you’re not alone. A recent backplane when the display is flexed. In this regard Applied Materials survey[1] showed that as many as four active-matrix organic light-emitting diode (AMOLED) out of five people feel exactly the same way. display technology is promising, because the rigid glass That attitude is reflected in the strong growth encapsulation otherwise required to protect the organic anticipated in the markets for flexible and curved displays material from moisture and air can be replaced by layers over the next several years. Market analysts at Touch of thin films. Display Research, for example, forecast that flexible and But it’s important to note that this isn’t the only curved displays will achieve 16% of global display revenues challenge. For any OLED display to get to mass by 2023, compared with 1% in 2013.[2] IHS iSuppli, production, especially in large sizes, all these challenges meanwhile, projects that global shipments of flexible must be addressed whether it is a flexible display or not: displays will reach 792 million units in 2020, up from electroluminescence (EL) evaporation and its impact on 3.2 million in 2013.[3] the lifetime of organic materials; low deposition e˜ciency; Some curved displays, such as Samsung’s Galaxy low yield because of defects; and the scalability of Edge smartphone with its beautiful curved edges, are evaporation technology, which directly impacts the cost already available, But what technology will be required to of volume production. create flexible, bendable displays in new form factors, and Early adopters of flexible OLED displays have tended THE FUTURE with adequate resolution, display quality, and ruggedness? to use a delamination process to fabricate the transistor And most importantly, what technology will do that at backplane on a flexible thin film. First, the thin film is costs that enable display and end-device manufacturers to weakly bonded to a glass substrate and run through enjoy attractive margins? typical OLED processing steps to build the transistors. Then, once processing is complete, the thin film that OF DISPLAYS MATERIALS ARE A KEY ENABLER contains the transistor backplane is delaminated, or removed, from the glass substrate and used to build the Materials have a key role to play in the advance toward flexible display. flexible displays for mobile devices, televisions, advertising However, this delamination process is complex and signage and other uses. A major materials challenge is costly. Therefore, its use in high-volume manufacturing how to move away from rigid glass encapsulation without without further technological breakthroughs is IS compromising the operation or reliability of the display’s FLEXIBLE questionable. thin-film transistor (TFT) backplane when the device is BY KERRY CUNNINGHAM flexed, folded, or bent.

14 NANOCHIP NANOCHIP 15 THE FUTURE Applied Materials’ AKT TFE product line includes a multilayer solution (see fi gure 3) that extends the lifetime SiN Properties (80°C Process) 3 Layer (SiN/HMDSO) OF DISPLAYS of fl exible OLEDs. The multilayer concept reduces water permeation by decoupling defect sites in the barrier fi lms IS FLEXIBLE and increasing the permeation channel length. It also combines di£ usion barrier fi lms made from SiN WVTR : 1x10-3 g /m2·day range SiN that have very low water and oxygen penetration at 1µm single layer SiN (see fi gure 4) with HMDSO bu£ er layers (for OLED @ 85°C/85%RH mobile applications) that release stresses in the fi lm stack (by MOCON and Ca-test method) and isolate any particle contamination from upstream THIN-FILM ENCAPSULATION (TFE) processes (see fi gure 5). Particles lead to dark spots and The primary goal of many display manufacturing delamination issues. technologies is to achieve uniformity and performance These high-performance fi lms, deposited at <100°C, DR UNIFORMITY %T STRESS DR UNIFORMITY %T STRESS stability for both the TFT backplane and the OLED address the tendency of OLED materials to degrade when FILM RI @400nm MPa FILM RI @400nm MPa A/min % A/min % emission layers. E£ ective encapsulation with layers of thin exposed to the outside environment. In addition, the TFE SiN 1.85 > 2500 < 10% > 90% < 100 pp-HMDSO 1.45 > 5000 < 10% > 95% ~0 fi lms is critical to prevent the degradation of AMOLED AKT TFE systems’ unique vision-alignment technology displays caused by moisture and particles (see fi gure 1). ensures accurate and precise mask positioning and Figure 4. PECVD SiN barrier fi lm performance. Figure 5. PECVD HMDSO bu¤ er fi lm performance. The encapsulation directly a£ ects the life span and lighting deposition. This allows display manufacturers to eliminate performance of the AMOLED device. photolithography and etch process steps and reduce Applied Materials o£ ers thin fi lm encapsulation (TFE) production costs. device lifetime test (SiN/HMDSO 3 layers) and passed processes that support the manufacturing requirements Samples of HMDSO bu£ er layers typically 100,000 test cycles with 1” diameter bending. Further, UV-Vis Transmittance without any high-stress points, this bu£ er layer provides 110 for fl exible OLED displays (see fi gure 2) while providing demonstrate high optical transmittance (>95% at 300nm 100 key barrier protection. and above) and low stress. The samples passed the excellent particle coverage and leaves no voids or di£ usion 90 channels. 80 Applied Materials’ TFE tool architecture will be based 70 60 on a cluster tool design to facilitate high-throughput H20 50 O2 multilayer deposition without breaking vacuum (see 40

Transmittance (%) Transmittance 30 H20 fi gure 6). Defects 20 O2 10 Barrier COLLABORATION IS A MUST 0 Coating 250 350 450 550 650 750 850 950 H20 Hundreds The development of fl exible, bendable displays Wavelength (nm) O 2 Buer of nm brings many technical challenges that require advances Coating in manufacturing processes and materials. To implement Stress vs. Various Process Conditions these new technologies as rapidly as possible and at a cost 2.0 “Edge growth” “Dark spots” that can drive mass consumer adoption, tight collaboration 1.5 due to lateral due to moisture

Tens )

2 1.0 moisture ingress through of nm between equipment and materials suppliers, and panel defects in barriers ~0 Stress and device makers, is a must. 0.5 Figure 1. OLED device failure mechanisms. Figure 3. Thin-fi lm encapsulation: multilayer concept. By leveraging its expertise in precision materials 0.0 engineering, Applied Materials is helping to solve these -0.5

technology hurdles so that customers can make fl exible (E9 dynes/cm Stress -1.0 PROCESS REQUIREMENTS PURPOSE displays a reality. -1.5

Depo temperature < 100°C Device protection -2.0 0 5 10 15 20 25 Mask depo Mask deposition Bonding pad For additional information, contact kerry_cunningham@ Various Process Conditions Water vapor transmission rate (WVTR) < 1E-6 g/m2.day Long lifetime amat.com. High deposition rate > 2500 A/min High throughput [1] http://blog.appliedmaterials.com/sites/default/fi les/ Figure 6. HMDSO transmission and stress results. Low stress ~ 0 Avoid cracking of metal electrodes or fi lm itself Applied%20Materials%20Display%20Survey%20 High visible light transmittance > 90% at wavelength ≥ 400nm Increase brightness Factsheet_120414.pdf Good adhesion No fi lm peeling Device integrity [2] http://touchdisplayresearch.com/?page_id=551 High fl exibility Mechanical duration Tolerate mechanical bending through lifetime [3] https://technology.ihs.com/436047/fl exible-display-market-to- Conformal particle coverage No voids or di£ usion channels Eliminate water and oxygen permeation reach-nearly-800-million-unit-shipments-by-2020 Figure 2. Thin-fi lm encapsulation manufacturing requirements.

16 NANOCHIP NANOCHIP 17 AUTOMATION Return on investment can be fast, too. HELPS OVERCOME One user realized a payback in just a few months from improved throughput PRODUCTIVITY and MES transaction automation. CHALLENGES BY SHEKAR KRISHNASWAMY IN WAFER-LEVEL PACKAGING Manufacturing complexity On the technology front, This means traditional in the outsourced assembly OSAT factories are moving packaging methods are no and test (OSAT) industry into more complex packaging longer necessarily relevant, is exploding, driven both technologies that blur the line and that fab-like characteris- by demands for higher between where wafer processing tics, life cycles, and activities functionality, thinner form ends and packaging begins. In will have to be learned factors, and longer battery life order to meet the challenges and deployed in the OSAT in handheld devices, and by of 2.5D and 3D wafer-level environment. Fab automation competitive dynamics (see architectures, they are becoming technologies are a key enabler fi gure 1). more like modern wafer fabs. for this transition.

Figure 1. Packaging technology is rapidly changing to accommodate demand for improvements in battery life, performance, and functionality in thinner form factors.

18 NANOCHIP Image Courtesy Innovative Micro Technology NANOCHIP 19 AUTOMATION HELPS OVERCOME PRODUCTIVITY CHALLENGES IN WAFER-LEVEL PACKAGING

AUTOMATION Monitoring and controlling At the process level, STRATEGIES FOR WLP such complex production statistical process control operations is orders of (SPC) is needed for faster WLP factories at all wafer Via Etch Isolation Metal Fill BEOL/RDL magnitude beyond what OSAT data analysis and better sizes face the challenges of Front-End companies have had to do in quality. Advanced process (FEOL) delivering multiple products DRIE Dielectrics/Seed Cu Plating/CMP/ BEOL/RDL the past. Before, they could control (APC) solutions can Deposition Planarization at acceptable yield levels operate their factories with lead to higher yields and while managing varying levels spreadsheet-based applications. reduced scrap. of complexity, multiple test Now, WLP requires much higher At the factory level, methodologies, and a range of levels of statistical data analysis automated real-time product time commitments. Thus, they Temporary Via Expose and precise, automated control dispatching is a key enabler Cu Column Debond must more closely resemble Mid-End Bond (VBR), UBM of equipment, processes and for high-volume production wafer fabs in structure, (MEOL) factory operations, similar to (see fi gure 4). The need for Cu Column Bond to Carrier Thin, CMP, Debond operations, and performance wafer fabs. real-time dispatching occurs Bumping Insulate, UBM than traditional test and Realistically, meeting when a tool is available and assembly factories. these much more complex lots are in a queue waiting to WLP factories require tools requirements can only be be processed. for photolithography, etch, achieved by implementing Software such as Back-End CMP, dielectric deposition, (BEOL) Dicing FC Attach 1 FC Attach 2 BGA modern automation and control Applied’s APF Real-Time Processes sputter, plating, cleaning, strategies (see fi gure 3). Dispatcher (RTD) can deter- inspection, measurement At the equipment level, the mine which lot to process fi rst and test, and each of these essential capabilities needed to achieve the overall highest equipment-types may be used for WLP competitiveness are throughput. It takes into ac- for single-wafer, lot-by-lot or Figure 2. TSV-MEOL/BEOL process in overall TSV process fl ow. (Source: ICEP-IAAC 2012 Proceedings; STATS ChipPAC- automated recipe management count factors such as equip- [1] batch operations as production SW Yoon et al ) (RM) to reduce human errors ment capability, lot due dates requirements dictate. In and achieve better yields, and and priorities, desired cycle In fact, it’s no longer vias (TSVs) and bumps, must carry relatively high margins. So addition to production tools, integrated fault detection and time, equipment setup and possible to neatly divide the be built using FEOL tools and new, formidable competitors automated material handling classifi cation (FDC) to improve maintenance requirements, manufacturing of handheld processes. are now encroaching on OSAT systems are required, equipment availability and and ancillary resources such devices such as smartphones Companies in the OSAT turf.[2] Several leading wafer especially for high-volume reduce scrap. as masks or reticles. and tablets into the traditional industry, however, have foundries and integrated device 300mm operations. categories of front-end-of-the traditionally provided relatively manufacturers (IDMs)—seeing line (FEOL), where transistors low-margin, commoditized MEOL as a profi table extension are fabricated, and back-end- test and packaging services in of their existing capabilities— ESSENTIAL AUTOMATION STRATEGIES APPLIED MATERIALS CAPABILITIES of-the-line (BEOL) where support of BEOL requirements. either already have, or are interconnections, packaging, To remain competitive in the building, wafer fab-like Recipe Management System E3 Equipment Engineering Platform and assembly take place. wafer-level packaging (WLP) packaging facilities to address it. Fault Detection & Classifi cation E3 FD A so-called mid-end-of- era, they must now provide their One way OSAT companies Advanced Process Control E3 R2R the-line (MEOL) approach customers with higher-level can overcome these technologi- Statistical Process Control E3 SPC (fi gure 2) is evolving that engineering resources and fab- cal and competitive challenges is Real-Time Dispatching & Scheduling Applied Advanced Productivity Family (APF) has both FEOL and BEOL like manufacturing capabilities. through greater use of automa- characteristics. It came about In addition, advanced tion to reduce errors and waste, Figure 3. Automation strategies implemented using Applied Materials solutions can help OSAT factories manage complexity because in vertical architectures packaging applications are provide increased fl exibility and and meet production goals and timetables. the interconnections between growing faster than the responsiveness, and drive higher layers, such as through-silicon semiconductor industry and levels of output.

20 NANOCHIP NANOCHIP 21 AUTOMATION HELPS OVERCOME PRODUCTIVITY CHALLENGES IN WAFER-LEVEL PACKAGING

into WLP factories to enhance qualifi ed on any particular manufacturing productivity and machine. Using an incorrect Uses of Real-Time Dispatching Results quality. One Applied Materials recipe invariably caused ■ Process repeatability ■ Increased fulfillment of customer, a global leader in product scrap, leading to higher orders ■ Automation of best fl ash memory storage solutions manufacturing costs and practices ■ Reduced overall lot cycle for a wide range of applications potential customer satisfaction time and devices, implemented issues. ■ Optimization of manu- mobility-based solutions to A key opportunity for facturing batch size, ■ Reduced cycle time minimizing of setups, variability increase productivity, quality, scrap reduction and quality lot sequencing and reliability in one of its Asian improvement came from the ■ Manpower redirection assembly and test facilities. deployment of an automated ■ Load balancing ■ Improved linearity, WIP A large proportion of recipe management system ■ Variability reduction balance and tool utilization that company’s products (RMS) that extended to mobile ■ Reduction of WIP bubbles ■ Increased product were manufactured using devices. This eliminated human throughput ■ Management of plan 2.5D and 3D packaging processing errors caused changes ■ Increased operator technologies, applying factory by using incorrect process conformance automation techniques such recipes. The application was as manufacturing execution installed on both tablets and High-Volume Manufacturing systems (MES), statistical and smartphones. Some of the key results advanced process controls, A user interface was CONCLUSION seen from the fi rst phase of the equipment automation, and provided to capture the The need for WLP is project were: Figure 4. Uses and benefi ts of real-time dispatching. advanced scheduling solutions. sequence of automated and growing strongly, and is ■ However, the e£ ective use of manual events. Initially this was Product cycle time reduction introducing great complexity and fab throughput Short-interval scheduling mathematical modeling of these techniques was hindered meant only for confi guration into the operations of OSATs. improvement automation strategies can factory operations, and the by reliance on manual methods and diagnostics, but it provided Successfully addressing this help OSAT companies further assumption that tasks will and procedures. In such a enough value that it eventually ■ Streamlined equipment complexity requires the use of increase overall productivity be executed according to complex environment, this can became the universal operator monitoring and alert innovative automation strategies by eliminating process and prescribed schedules. lead to procedural errors in the interface, enabling rapid user management to increase manufacturing execution of the manufacturing training. fl exibility, e˜ ciency, and quality equipment ine˜ ciencies known ■ Dramatic reduction in process, resulting in product Alarm management to meet customer demands and as “white space.” White space A FOUNDATION product quality incidents scrap and quality issues. was a key component of remain competitive. is the term for small gaps in FOR THE FUTURE related to equipment unit processing that, in aggregate, In this particular factory, the application. Until the Automated solutions issues sap factory productivity. the customer’s manufacturing deployment of the RMS, For additional information, provide OSAT companies ■ To eliminate white operation involved processing operators were performing Increased operator e˜ ciency contact shekar_krishnaswamy not only with a framework space, a comprehensive and hundreds of part numbers many unnecessary steps. thanks to mobile access to key @amat.com. for fl exible, high-quality, realistic look at anticipated at multiple machines under The RMS alarm management transaction information right high-output, and profi table [1] factory production is required. di£ erent conditions. The function captured all next to their machines http://www.statschippac. production today, they also com/~/media/Files/ Short-interval scheduling can processing parameters for each these events along with In addition, throughput provide a foundation that can DocLibrary/whitepapers/2012/ accomplish this. The scheduling operation and each part-type their frequencies, and the improvement and MES accommodate future changes STATSChipPAC_ICEP2012_TSV_ methodology is based on the were encapsulated into a information was used to transaction automation alone in production strategies. MEOL_and_Pkg.ashx processing of large amounts process recipe, and hundreds educate operators about provided a payback for the fi rst [2] An example is the intro- https://www.gartner.com/ of good data, highly realistic of di£ erent recipes could be the need to eliminate phase of the project in just a few doc/3130518/semiconductor- duction of mobile technology unnecessary steps. months per machine. packaging-assembly-test-wafer

22 NANOCHIP NANOCHIP 23 Shaving a fraction of a millimeter from the height MOBILITY of chip packages is a big deal in smartphones. The need for thin devices is dictating the evolution DRIVES THIN of chip-scale packaging. PACKAGING For the packaging industry, the smartphone changed everything, and experts agree that more changes— “I would say the back end potentially big ones—are underway. is no longer at the back end. Bill Chen, a senior fellow at ASE Group, said when personal We are at the front of computers ruled chip demand, the whole e£ ort of getting the main components had fairly standard package formats. The semiconductors into systems.” pace of change has picked up in the – Bill Chen, senior fellow, ASE Group smartphone era. Now, “the people who design smartphones compete by the functions they can provide, and probably more importantly, by how they look. You want them to be thin, processes in which solder balls are which the solder balls are spaced out and you want all the functions.” created beneath the chips before the directly underneath the die. That need for thin packages wafer is diced. ASE estimates that Jan Vardaman, president of the drove the industry to wafer-level chip- about 30% of the die in smartphones packaging consultancy at TechSearch scale packages (WL-CSP), a hybrid now are in WL-CSP packaging, International (Austin, Texas), said between front-end and back-end nearly all in a fan-in confi guration in Apple’s fi rst iPhone used 2 wafer- level packages (WLPs) in 2007, but today’s much-thinner iPhone 6 Percentage of WL-CSP Packages in High-End Smartphones has about 26 WLPs. “Several years ago, Samsung did not use WLPs Apple iPhone 6+ Huawei Ascend Mate 7 Samsung Galaxy S6 in its mobile phones,” Vardaman said. “Today, around a dozen WLPs are found in the latest Samsung WL-CSP WL-CSP WL-CSP 33% 27% 35% smartphone. Even the latest portable communication gadget, the Apple Others Others Others 67% 73% 65% Watch, contains as many as a dozen WLPs.” Traditionally, WLPs have been According to industry research fi rms Yole Developpement and System Plus Consulting, used for devices with low pin counts approximately 30% of the chips in 3 of the market-leading smartphones use wafer-level and small die sizes. The number of chip-scale packages. chips packaged in fan-in WLPs is still

24 NANOCHIP NANOCHIP 25 MOBILITY DRIVES THIN PACKAGING processes, and TSV connections, end is being blurred with the growth (Lyon, France), concurred, saying the are pushing Applied Materials and in technologies like wafer bonding,” advances in packaging technology other tool makers to develop new Rosa said. have provided the semiconductor and techniques that can be used for Shekar Krishnaswamy, a senior systems companies with more fl exible 300mm, 200mm, and smaller manager of Advanced Productivity ways to advance their products. wafer sizes. Solutions at Applied Global Services “With Moore’s Law slowing down “We want to push our tools who works with OSATs on factory at the advanced nodes, things are and see how far they will go,” said automation issues, said the OSAT getting more expensive and yields are Mike Rosa, director of strategy and factory is becoming more fab- becoming more di˜ cult to achieve. So growing: TechSearch predicts a nearly technical marketing for emerging like, with more packaging-style many companies are using, say, 65nm 9% CAGR for the 5-year period from technologies at Applied. “One processes being completed in the technology and not 14nm technology. 2014 to 2019. challenge with the increasing device traditional front end. “The OSATs They are using advanced packaging to Underway is another signifi cant density on thinner wafers is dicing. are using wafer fab equipment and put the right solutions together without evolution that could shake up the The dicing lanes are becoming smaller, technology—lithography, etching, trying to do everything on 300mm chip industry. Fan-out wafer-scale and if there is any chipping it can plating, CMP, and others. Certainly wafers at the most advanced nodes.” impact the active area on these small the automation solutions [they use] packaging, some experts believe, have become very good at extracting said Sonderman, who previously die,” said Rosa. are essentially the same [as front-end SMALL FORM FACTOR could push down the share held by fl ip value from their physical assets,” worked in APC development at Rosa added that Applied is fabs].” SOLUTIONS chip packages and push out the need Krishnaswamy said. GLOBALFOUNDRIES. “pushing the limits of conventional Gone are the days when for the more expensive 3D through- Speaking at the 2015 Advanced “In China, the OSATs have the One of those companies is Silicon TSV processes to accommodate the packaging plant workers would tend silicon vias (TSVs) in consumer Process Control (APC) conference, mindset that ‘if our customers want Labs (Austin, Texas), which combines trend toward smaller CDs and higher to long rows of humming, clacking applications, including smartphones. Thomas Sonderman, vice president of APC and fault detection, we want it.’ microcontrollers, low-power radio aspect ratio TSVs.” wire bond machines. And OSATs are Outsourced semiconductor assembly the software business unit at Rudolph They have the motivation, but they frequency (RF) circuitry, and on-chip putting in the same manufacturing and test companies (OSATs) and Technologies, Inc. (Tewksbury, don’t necessarily want to give you fl ash memory into products aimed at OSATs ADOPT execution, material handling, and foundries alike are scrambling to Massachusetts), said OSATs are a lot of money for it.” Sonderman Internet of Things applications. (See PROCESS CONTROL process control systems long used provide this next signifi cant wave of scrambling to modernize their added that the Chinese OSATs prefer “Silicon Labs Tackles IoT Solutions,” by front-end wafer fabs in order to packaging innovation. (See sidebar The rise of wafer-scale automation processes. o£ -the-shelf process control and Nanochip Fab Solutions, Vol. 10, maximize return on their assets. on page 30: “Fan-Out Is a Game packaging, where front-end-like steps In an overview of the last 25 years automation solutions. “They don’t Issue 1, 2015.) “The OSATs have had to quickly Changer.”) are used, has been a big part of the of APC, he noted that the big system want to build an army [of internal Daniel Cooley, Silicon Labs’ change,” said Krishnaswamy. “End Fan-out packaging already transformation of the OSAT sector. companies are seeking to link their software developers],” he said. vice president of marketing for IoT customers now are asking their OSAT includes a high-density (HD-FO) “More packaging-style processes entire supply chain together, using products, said many of the chips used suppliers to provide the same kinds of category, with sub-10nm lines and are being completed in the ‘front end.’ dashboard-style displays to manage AS MOORE’S LAW SLOWS…. in IoT or wearable applications are advanced process control (APC) and spaces. The advanced fan-out The line between front- and back the fl ow of components. extremely small. For example, a recent yield tracking tools as the wafer fabs. Early in his career, ASE’s Chen “A lot of information gets 8-bit IoT controller from Silicon Labs As customers turn to more complex helped develop IBM’s pioneering C4 generated, including wafer-fab and is in a chip-scale package (CSP) with processes, such as fan-out wafer chip packaging technology (C4, or Future Evolutions in Discrete Device Packaging assembly-and-test information. a 1.8 by 1.66mm footprint, which is scale packaging and TSVs, those controlled collapse chip connection, WLP: Dierent Levels and Technologies The goal is to link all of this together. about one-fourth the footprint of a process control demands are set to was an early fl ip chip technology that We need data democracy, and conventional quad-fl at no leads (QFN) “Fan-In” WLCSP increase,” he added. involved depositing solder bumps Chip we need to think about how to package. Indeed, while integrated device on the top side of the wafer during prevent barriers in the fi rst place,” “With the IoT, you have to keep PCB “Fan-Out” WLP manufacturers (IDMs) once did fi nal wafer processing). He said the costs down. But you also have to get Chip almost all their own wafer probe back-end processes are picking up the FC-BGA all of the IOs out in a small form factor testing, for example, now that pace as Moore’s Law scaling becomes Chip product, and that is a hard process. PCB important function often is done more di˜ cult. “Speaking from the There is a lot of current going through by the OSATs. To leverage their packaging side, I would say the back very small pipes: 300 or 400 milliamps PCB Fan-out solution is investments in expensive test end is no longer at the back end. We more flexible as the balls can while transmitting. Doing that in a be “larger” than the chip computers, OSATs use one test head are at the front of the whole e£ ort of With fan-in solution, thanks to connections small form factor is hard,” Cooley said. ball grid array is implemented for wafer probing and another for getting semiconductors into systems. below the chip (nothing out of Over the past two years, the die surface) fi nal test after assembly is completed. Now, what we do is much more major OSATs have improved their “The same expensive test computer application specifi c and customer ability to handle the very small CSPs, can be used one day as a prober, s p e c i fi c . ” Fan-in wafer-level packaging is prevalent in relatively low pin count ICs used in mobile Thomas Sonderman, vice president with small solder ball pitches. “Two and another day with a di£ erent Rozalia Beica, chief technology phones. Fan-out wafer-level packaging is gaining momentum for higher pin count of the software business unit at years ago, handling .5mm pitch balls devices. (Source: Yole Developpement.) handler for fi nal test. The OSATs Rudolph Technologies, Inc. o˜ cer at Yole Developpement

26 NANOCHIP NANOCHIP 27 MOBILITY DRIVES THIN PACKAGING the pogo pins, and CSPs are very wearable and likely to see moisture The thickness of the barrier and of there not being a business need. sensitive to any deformation on ingress challenges. RF shielding is seed layers correlates strongly with Why would you pay signifi cantly the landings. It would help if the also needed. In the unlikely event the quality of gap fi ll, which is related more when the product CSPs could be more tolerant of any of sticking it in a microwave, the to the choice of chemistry, hardware, requirement can be satisfi ed by deformation during probe test,” shielding could prevent the watch and process control capabilities. advanced packaging that is more Cooley said. from exploding,” James said. For a detailed discussion of TSV cost-e£ ective?” he asked. processes, see “Optimizing TSV Sharma noted that designers WATCHES AND WEARABLES THINNER MEMS SENSORS processes and integration for volume also are hesitant about 3D TSVs, manufacturing” by David Erickson, which require that the active The entire wearables category is Rosa, who earned his doctorate Isaac Ow, and Sesh Ramaswami (all of silicon circuits be designed around prompting closer collaboration, with in the MEMS fi eld, said the move Mike Rosa, PhD, director of strategy Applied Materials), Chip Scale Review, a keep-out zone occupied by the packaging decisions made early in the to thinner MEMS sensors in and technical marketing for 200mm January–February 2015.[1] TSVs. “What I have learned from design cycle with packaging partners. smartphones is having a major products at Applied Materials. various customer engagements is Cooley said Silicon Labs is learning impact. that designers are resistant to this that chips used in wearables are “a “MEMS are a special challenge, TSVs FACE COMPETITION, size of the TSVs. TSVs are used to idea,” he said. little more complicated” in terms of because the package often includes NEED TIME connect the MEMS and ASIC wafers Rozalia Beica, the Yole CTO, fl exibility and thermal constraints. the MEMS device, a layer of control Gaurav Sharma, a senior in back-side-illumination (BSI) believes 3D TSVs will gain a Also, “wearables all connect to your logic, and a capping layer. The whole member of the technical sta£ at CMOS image sensors, some power stronger foothold, but it will take phone, so there is a need to optimize structure might be 300 microns, so GLOBALFOUNDRIES, joined that ICs, and in several other applications. time. “I personally am a strong for the antenna radiation pattern. And all those layers need to be thinned.” company this year after spending To reduce stress, polysilicon vias believer in TSVs and have worked Daniel Cooley, vice president the package has to be able to adapt to In part, that need motivated more than a decade in various are often used, and the number of on them since 2006,” she said. of marketing for IoT products, a wide array of PCB materials.” Applied Materials to o£ er customers advanced packaging operations. TSVs in these applications is small, “If you look at other technologies, Silicon Labs, Austin, Texas. Dick James, a senior fellow at a series of modifi cations to its Endura Sharma said TSVs—both in sometimes only 6 to 10, to connect fl ip chip was developed by IBM in reverse-engineering fi rm Chipworks platform, enabling the handling of interposers and in vertical 3D ICs— the MEMS structure with the control 1960, but it didn’t go into volume was expensive, but now it is standard. (Ottawa, Canada), said his company wafers down to 100 microns thick. are gaining more traction from a logic wafer, or to connect the MEMS production until 1980. Similarly, In fact, no matter what factory you did a teardown of the Apple Watch “It should be noted that in most production point of view. “TSVs are to the PCB, Rosa said. the time for MEMS to go from are in they can handle .4mm pitches recently. While most of the chips are cases, customers are not passing in volume production, but for niche One motivation for TSV use in development to mass adoption now. From the viewpoint of fan-in in fairly standard packages of one around super-thin wafers. The applications,” he said, noting that these devices is to get away from took 20 years. TSV technology CSPs, standardization on the .4mm kind or another, the entire PCB board customers usually bond the wafer to high-bandwidth memory graphics, wire bonding, where the pads take up is not slower; it is just that there pitch has been nice,” Cooley said. is encased in an over-molded cover to be thinned to another wafer, either and very high performance ASICs valuable real estate. “If a customer was such big hype around it that Improvements are still needed. prevent moisture and radio frequency glass or silicon, before thinning,” are turning to TSVs. goes from wire bonds to TSVs, they now everyone is waiting for it to be “The OSATs could make CSPs waves from compromising the watch. Rosa added. An area where TSVs provide can save 25 to 30% of the die area. adopted.” more tolerant of the probe process. “That is the fi rst time we have Applied is participating in advantages is for the “huge That is huge. They can increase the Indeed, companies ranging That would be a big step forward. seen that total encapsulation, and research and development e£ orts in bandwidth requirements coming up numbers of die per wafer by 25 to from AMD to Xilinx in logic, and The probe card has to push down we think they did that because it is a Singapore and Europe to reduce the with Internet tra˜ c,” Sharma said. 30% with TSVs,” he said. SKHynix and Toshiba in memories, While these applications do not have With an overall goal of putting have introduced products that volumes nearly as high as devices more TSVs into a certain area, include some form of TSVs. TSV-Last Solution for MEMS and Sensors used in mobile systems, he believes researchers are investigating how “Personally, I don’t think TSVs “there is serious interest in 3D TSVs to make the critical dimensions of are necessarily slower by some pretty signifi cant players the TSVs smaller, with a smaller [to proliferate] than other Wafer TSV RDL & Bump Assembly & Test who want to bring this technology diameter and a higher aspect ratio technologies,” Beica said. into production.” FOUNDRY OSAT (width to depth). The challenge facing TSV “As chips get smaller, the CD TSV-Last adoption arises from the relatively For additional information, contact of the TSVs decreases, and that Cap high cost of the complex process, [email protected]. Cap Cap Cap increases the challenge of how especially compared to the up-and- to perform a reliable line-and-fi ll [1] CMOS CMOS coming HD-FO chip scale packages. “Optimizing TSV processes without voids. If the diameter goes and integration for volume “When we look at TSVs for mobility, CMOS Wafer Capping D-side Grinding TSV-Last Created & Pads RDL & Ball Attach from 10 to 5 microns, we really have manufacturing”: http://www. there are alternative technologies to improve the barrier and seed chipscalereview.com/issue/1501/ that can do much the same thing at ChipScale_Jan-Feb_2015_v8-digital. A TSV-last process fl ow for MEMS devices is suited for outsourcing to an OSAT, and has relatively low stress between the via layers,” Rosa said. a much better price. It is a problem pdf#page=34 and silicon. (Source: ASE Group.)

28 NANOCHIP NANOCHIP 29 MOBILITY DRIVES THIN PACKAGING

SIDEBAR “Packaging is much more interesting than it used it be.” First developed independently by Freescale and Infi neon some – Jan Vardaman, TechSearch International 15 years ago, and subsequently licensed and developed by multiple OSATs, fan-out packaging is starting to see volume production. FAN-OUT Vardaman said Intel, by virtue of its acquisition of Infi neon’s wireless and then very precisely positioning other devices, with a 40% reduction operation, is an early adopter. Intel’s them on a thin “reconstituted” or in form factor compared with Wireless Division uses fan-out carrier wafer, which is then molded. conventional fl ip chip packaging. packaging for an LTE multichip part The redistribution layer is created, And because fan-out does not require IS A GAME that measures just 5.32 by 5.04 mm. and then solder balls are formed a substrate, the cost savings Some form of fan-out packaging on top, just as in a wafer-level chip is substantial. has been used by Marvell and scale package. “The idea is very “There is a big di£ erence in costs. Maxim as well, Vardaman said. simple, to produce a reconstructed Fan-out is lower cost than fl ip chip, Amkor is bringing up a FO-WLP line wafer and put it through the line,” which requires an organic substrate. in Korea, and ASE Group is building he said, adding that “there are no And compared with silicon interposer, CHANGER a fan-out line in Kaohsiung, Taiwan, laws of physics we are fi ghting, we there is an even bigger cost In one sense, fan-out chip-scale packaging is just an evolutionary step, an advance with other major OSATs already in are just fi ghting engineering, which di£ erence, though maybe at this point on the fan-in CSP used in so many relatively low pin count chips. But look a bit deeper, production or planning their versions means the challenges will be solved there might be more performance of fan-out packaging. Cadence is gradually. Fan-out is something that with a silicon interposer,” she said. and fan-out is perhaps the biggest thing to hit the semiconductor industry since among the EDA vendors who have can be processed through wafer fab How far fan-out packaging will immersion lithography and high-k dielectrics. released design tools that bridge equipment—we need to pick the go remains to be seen. But if multiple the front-end and back-end design wafer up, place it, mold it, and bake it chips can be accommodated, it Jan Vardaman, president of in mid-October, TSMC co-CEO Mark of the new facility in Longtan, near processes for packaging. so the molding compound is cured. may cause some design teams packaging consultancy at TechSearch Liu said TSMC’s InFO technology Hsinchu, Taiwan, for InFO volume ASE senior fellow Bill Chen There is not any major wafer thinning to reconsider the need to create International (Austin, Texas) said “will enter high-volume production production, with manufacturing said ASE’s original motivation to needed like with TSVs. Clearly, fan- complex SoCs on advanced silicon, fan-out packaging can be used for with our 16-nanometer technology equipment move-in “on schedule” license fan-out, and then later to out technology is becoming more and particularly for mobile and IoT single or multiple die. “Fan-out can next year. We are currently working and volume ramp-up scheduled for work on its own implementation, more signifi cant as we move further systems. The analysts are predicting be a disruptive technology for several on the second-generation InFO the second quarter of next year. was to increase the number of into the era of SIP and heterogeneous major shifts in how many chips will reasons. It can be used for multiple technology for several projects of The TSMC executives did not solder balls that could be placed integration” require more expensive types of die, there is no substrate, and it can systems integration on 10 nanometer mention Apple or its A10 application under the increasingly tiny die. “The Rozalia Beica, CTO at Yole packaging, such as fl ip chip, BGAs, be done in a foundry.” and 7 nanometer.” processor by name, but they said a original fan-out motivation was to Developpement, said TSMC has been interposers, and 3D integration. TSMC has been talking about Liu and co-CEO C.C. Wei fi elded large proportion of TSMC’s 16nm accommodate the die shrinks. Then, telling its suppliers to be ready for “Everyone in the industry its version of fan-out packaging, multiple questions on TSMC’s InFO wafers will go through the fan-out being creative engineers, we realized volume fan-out processing beginning is scrambling to fi gure out the called integrated fan-out (InFO), for technology, and said it can bring packaging steps, with one customer we can do a lot of other things with next year, perhaps in the 100,000 consequences” of fan-out packaging, several years, and is one of a handful greater than 20% reduction in overall accounting for much of it. According it, and create very thin packages,” wafers-per-month range. Vardaman said, noting that of companies already in production package thickness, a 20% speed gain, to Wei, “probably it will be adopted by he said. Beica estimated that an “packaging is much more interesting with fan-out packaging. In a fi nancial and 10% better power dissipation. the mobile processors fi rst, and then Chen said the process involves application processor can be than it used it be.” results conference call with analysts TSMC has completed construction applied to all other applications.” dicing the chips on a silicon wafer, combined with memories and — DAVID LAMMERS

30 NANOCHIP NANOCHIP 31 NEXT-GENERATION

FAULT DETECTION It’s hard to believe, but fault detection (FD) has been Applied Material’s FD advanced services deployment a part of our industry for over 20 years and an integral team, said, “It often takes up to two weeks to correctly component of microelectronics manufacturing as a confi gure univariate FD for a process tool, including whole for at least the past decade. Manufacturers rely collecting data, refi ning limits, and correlating limits IMPROVES QUALITY on FD to minimize scrap, improve product quality, detect violations to actual events of importance.” Also, there are quality degradation, and determine when equipment often too many false alarms or missed alarms associated may need to be shut down for maintenance, among with a particular FD model. other benefi ts. Today’s typical fab employs some form of The problem is illustrated in fi gure 1. With just this AND REDUCES COST FD on almost all processes. single sensor trace, the FD engineer must investigate But while FD provides signifi cant benefi ts, there several features and develop multiple models, each are also cost and performance issues associated with with limits. For the entire fab, there are often thousands, current FD deployment and operation that present if not millions, of models and limits to manage.[1,2] Clearly, challenges to both users and suppliers. For example an opportunity exists for improvement in FD setup, Paul Ewing, an FD deployment expert and part of execution and maintenance capabilities.

Process Monitoring Windows Fault detection (FD) is (aka Univariate Analysis Windows) defined based on the trace for each sensor pervasive in the industry and is now a key capability in the Max & Range ongoing e£ ort to improve quality and reduce cost. The Mean & Sigma Step 7 Step 8 next generation of FD will

Step 6

signifi cantly reduce setup Sensor Pressure Step 9 Step 13 Step 11 Step 15 times, improve detection Step 10 Step 12 Step 14 Slope Slope Step 16 with fewer false alarms, and Step 3

Step 1 Step 4Step 5 take advantage of big data Step 2 Step 17 BY capabilities to decrease Recipe Elapsed Time JAMES MOYNE, response times and increase JIMMY ISKANDAR, AND Figure 1. Illustration of the di± culties associated with manually understanding and confi guring models and limits for a single FD MICHAEL ARMACOST depth of analysis. trace. This exercise must be repeated thousands of times across a typical fab.

32 NANOCHIP NANOCHIP 33 NEXT-GENERATION FAULT DETECTION IMPROVES QUALITY AND REDUCES COST

In determining how to address the problem it is NEXT-GENERATION FAULT-DETECTION important to consider the human factor (see related article AND CLASSIFICATION CAPABILITIES: “Human Factors in Automation Systems” on page 2 of A DEEPER LOOK 4 4 4 x 104 x 10 x 10 x 10 this issue of Nanochip Fab Solutions). Much of the cost of 8 4 1 8 0.9 Automated, expert-driven trace transition 7 3.5 7 FD deployment results from the time and occasional error 0.8 detection and feature selection, with ranking 6 3 6 associated with humans executing repetitive tasks that 0.7 5 2.5 5 could benefi t from automation; however it is important If we analyze the trace of fi gure 1 we see that the FD 0.6 4 2 Normalize0.5 4 modeling engineer must complete a number of tasks in Moving 0.4 Sensor Data Sensor Data to continue to harness human expertise in process, 3 Sensor Data 1.5 3 Window 0.3 equipment, and sensor knowledge. FD improvements order to provide a high-quality FD solution for this single 2 1 2 0.2 trace. The engineer must fi rst defi ne the regions that need 1 0.5 1 should provide the optimal cost-benefi t balance in level 0.1 0 0 to be monitored and their boundaries, denoted as “steps” 0 0 of automation. 0 20 40 60 80 100 120 140 160 180 0 20 40 60 80 100 120 140 160 180 0 20 40 60 80 100 120 140 160 180 0 20 40 60 80 100 120 140 160 180 Applied Materials has been researching this problem in fi gure 1. He must then decide if traces should be aligned Number of Data Points Number of Data Points Number of Data Points Number of Data Points for several years. We have spoken to customers and FD according to specifi c region boundaries before analysis, or (a) (b) (c) (d) deployment experts, collected statistics on the benefi ts if the lack of alignment is actually a sought-after anomaly. and costs of FD deployment, researched new techniques He must also determine what FD model or models are best Figure 2. Illustration of moving window approach to identify trace boundaries: (a) A moving window is used with a di¤ erence in fault detection and classifi cation in microelectronics suited to assess a fault in a particular region. function to capture transitions; (b) The size of the window is determined by signal stability, noise, and other properties so as For example “max” and “range” are selected in step 4, and other industries, and innovated as needed to address to generate the best di¤ erence function; (c) normalization of the signal is needed because multiple traces might have di¤ erent while “mean” and “sigma” are the methods of choice in step specifi c issues. values and value change profi les; and (d) the transition points are mapped back onto the original trace (here utilizing color for As a result, several improvements to our FD capability 12. Warning, alarm, and control limits must be applied to demarcations) to identify regions and boundaries for analysis. are being implemented that will allow us to address key these models. The choice of boundaries, alignment, models, and limits are usually derived from analysis of multiple traces issues and provide a higher-quality FD solution. Some of As illustrated in fi gure 2, NG-FDC will utilize time-consuming and error-prone. This modeling process of the same sensor, combined with process and equipment the more noteworthy improvements are summarized in techniques such as moving windows and wavelets to is called “unsupervised” because models are developed knowledge as to what boundaries, steps, and features table 1, and are collectively part of the Applied Materials determine region boundaries.[3] Once the regions are without directly correlating trace data to quality data are important. NG-FDC features will partially automate Next-Generation Fault Detection and Classifi cation (NG- identifi ed, several techniques can be used to determine (such as metrology or yield). this process while ensuring that process and equipment FDC) solution. A few of these features are explored in this which features should be extracted and modeled. One is a With NG-FDC there is often an opportunity to knowledge is incorporated into the fi nal FD model set. article, with references provided for further reading. “Monte Carlo” approach, where existing model types such reduce the set of features that need to be extracted,

as mean, standard deviation, and slope are applied to the by determining which sensors and trace regions are FEATURE SOLUTION PRIMARY BENEFITS region to determine the level of variability of the feature associated with a particular issue that needs to be they capture. The model-types are then ranked. More monitored, such as a metrology or yield excursion. Trace transition detection Moving window, wavelets, etc.* Reduce setup times and alignment complex techniques such as binning and structural feature The variability in the trace information is analyzed with

Feature selection ranking Unsupervised and supervised; Monte Carlo, binning, structural Reduce setup times; reduce false positives extraction can also be employed. respect to quality variability. Sensors, sensor trace feature extraction, etc.* (FPs) and false negatives (FNs). The output is a list of features with a ranking regions, and features can then be ranked according to Automated limits generation Auto charting, defi ning training sets, golden tool limits, retarget Reduce setup and maintenance costs; that indicates the level of signal-to-noise that would their impact on quality variability. and management triggering based on context information and setpoint changes; Reduced FPs and FNs. innovative techniques such as hidden Markov models and be captured by feature-monitoring. Leveraging this Techniques such as guard-band statistics and change-point analysis may have some applicability.* automation, the expert would then select region hidden Markov models (HMM) are useful to determine Model management Leverage innovative techniques used for management and Reduce FPs and FNs. boundaries, plus the features to model within these these critical sensors and regions. This process of [4] and maintenance maintenance of virtual metrology models. boundaries, incorporating process and equipment incorporating quality or other “output” data into the Fault classifi cation (FC) Leverage supervised techniques used for virtual metrology Improve capabilities by providing the “C” in knowledge. In this way model quality is guaranteed from determination of sensors, critical features, models, and predictive maintenance, such as partial least squares FDC, thereby reducing mean-time-to-repair (PLS) and support vector machines (SVM). Leverage clustering (MTTR). both an analytical and process and equipment perspective, and model limits is part of the NG-FDC move from techniques (both unsupervised and supervised) for optimizing while model setup times are signifi cantly reduced. “unsupervised” to “supervised” modeling techniques. classifi cation scheme.

Innovative features to expand Wafer topology prediction and sensitivity analysis, method for Improve capabilities; improve overall FDC Trace ranking and move to “supervised” models Model management FDC capabilities fi nding sensors related to a trace feature. quality and usability. In traditional FD all sensors and regions are candidates A key issue in FD performance over time is the Support for big data frameworks: Support FD data collection and analysis on big data Reduce setup times; improve overall FDC Volume infrastructures such as Hadoop. Mine larger quantities of data quality and e£ ectiveness; enable a platform for monitoring, which results in an unwieldy number of ability of models to continue to accurately refl ect the Velocity faster and with more complex algorithms. Move to supervised to support future FDC and prediction models, many of which are relatively useless. It is up to operation of the tool, minimizing false positives (i.e., Variety FDC. technology capabilities. Veracity the expert to pare down this list, an e£ ort that can be false alarms) and false negatives (i.e., missed excursion Value * Semi-automated solution that allows incorporation of expert knowledge Table 1. Improved FD features included in the Applied Materials NG-FDC solution. 34 NANOCHIP NANOCHIP 35 NEXT-GENERATION FAULT DETECTION IMPROVES QUALITY AND REDUCES COST

RF 5,700 6,300 Mean = 1.578, Stdev = 0.02985 Uniformity = 1.891 % Mean = 2.262, Stdev = 0.07801 Uniformity = 3.448 %

value DC (2.12,2.14] 900 1,000 1,100 detections) across PMs and other events that alter the fi lm thickness). As illustrated in fi gure 4, process sensor 100 100 (2.14,2.16] (2.16,2.18] value state of the tool. value or recipe set point adjustments can be simulated to (2.18,2.2] (1.52,1.54] (2.2,2.22] (1.54,1.56] (2.22,2.24] Fortunately, techniques are being developed for determine the sensitivity of particular parameters to this Ne (1.56,1.58] (2.24,2.26] 266 274 326 Y 0 (1.58,1.6] Y 0 (2.26,2.28] (1.6,1.62] advanced capabilities like virtual metrology that can be topography. Utilizing this capability, product quality and (2.28,2.3] (1.62,1.64] (2.3,2.32] [4] (1.64,1.66] leveraged back into FD model maintenance. These yield degradation from topographical issues such as non- (2.32,2.34] Cap (2.34,2.36] [5] “supervised” techniques allow feedback of information uniformity can be reduced. 36.5 37.5 40.5 -100 -100 (2.36,2.38] (2.38,2.4] such as false positives and false negatives to be used for Another example of FD innovation that can be model optimization. They can provide decision points on incorporated into NG-FDC is a technique developed to Space -100 0 100 -100 0 100 -1 -0.6 1 when to adjust models or limits in response to a change determine sensor traces related to a target sensor being X X Thickness Resistivity in o£ set in the tool or process, and when to rebuild analyzed. The correlation is determined based on (1) the Render models from the ground up. Additionally, they enable location where sensor values change and (2) the change troubleshooting of faults to determine the critical sensors in trace signature with respect to the target sensor. This associated with a particular excursion, as illustrated in technique is useful to identify sensors or sensor groups Figure 4. Illustration of topography prediction using FD information, and the ability to adjust key parameters to simulate their fi gure 3. that may be better suited to monitor a particular fault, impact on topography and determine the optimal settings for a desired topography. Incorporating revolutionary capabilities thereby providing stronger signals and insight into fault classifi cation and root cause.[3] While a large part of NG-FDC is focused on the NG-FDC systems can leverage big data ecosystems For additional information, contact michael_d_armacost@ automation and improvement of traditional FD features, such as Hadoop to provide FDC advancements from amat.com. SUPPORT FOR BIG DATA FRAMEWORKS a parallel focus is to incorporate new and innovative each of the fi ve “V” perspectives.[6] Data “volume” AND CAPABILITIES Acknowledgments: The authors would like to thank Brad improvements support improved models that mine features to make NG-FDC more e£ ective and easy to Schulze, Deepak Sharma, Kommisetti Subrahmanyam and The big data revolution provides us with opportunities larger quantities of data from both depth (archive length) use, and to endow it with additional capabilities. For Jianping Zou for their support in the development of this to leverage improvements in the “fi ve V’s” of big data: and breadth (number of sensors). Improvements in the example, a wafer (or panel) topography prediction article. capability is being developed that utilizes FD information volume, velocity, variety (merging of data sources), “velocity” of data collection and analysis allow for fi ner collected for a process to predict wafer topography (e.g., veracity (data quality) and value (algorithms). granularity and increased complexity of analysis without [1] This fact was underscored at the 2015 Integrated Measurement increased development time. The improvements in data Association (IMA) APC Council meeting, attended by key users. Three main points of consensus from this meeting: (1) FD limits merging (”variety”) allow direct access to quality data management is a top concern of fab APC managers, (2) there (e.g., yield and metrology) alongside trace and FD output is a need for some level of automation in the FD model-building data. This will facilitate the move from “unsupervised” processes, while retaining process and equipment expertise, and to “supervised” modeling in NG-FDC. Finally, data (3) no comprehensive solution is currently available. quality improvements (“veracity”) will support more [2] “IMA- APC Council meeting minutes,” October 2015. See www. sophisticated modeling techniques (“value”). These apcconference.com. [3] will reduce the occurrence of false positives and false Kommisetti V R Subrahmanyam, Jianping Zou, Jimmy Iskandar, and Ryan Patz, “Automatic Trace Data Windowing and negatives in NG-FDC systems, and pave the way for more Determining Level of Correlation of Sensor Traces to Obtain a 2 Select wafers of 3 Drill down to complex predictive solutions such as yield prediction Better Understanding of the Nature of Faults in FD Systems,” APC interest (points the weighting of feedback for fab-wide control to hit yield targets, or even Conference XXVIII, Austin, Texas, October 2015. in red) contributing sensors improve yield. [4] Jimmy Iskandar and Michael Hsu, “Maintenance of Virtual Metrology Models,” APC Conference XXVIII, Austin, Texas, October 2015. 4 Drill down to a THE FUTURE IS NEAR [5] 1 Automatically selected sensor’s J. Iskandar, C. Jiang, M. Armacost, and B. Schulze, “Topography detect tool values by wafer Each of the features included in NG-FDC will improve Predictions Using System State Information,” United States state change the performance and lower the cost of an FD solution by Provisional Patent Application, fi led September 2015. [6] (a) decreasing setup time and reducing false positives, J. Moyne, J. Samantaray, and M. Armacost, “Big Data Emergence 5 Use this information along with domain (b) simplifying management of models and limits, and in Semiconductor Manufacturing Advanced Process Control,” expertise to determine critical sensors Proceedings of the 26th Annual Advanced Semiconductor and features associated with an excursion (c) expanding capabilities. Collectively they provide a Manufacturing Conference (ASMC 2015), Saratoga Springs, New foundation not only for NG-FDC, but also for key emerging York, May 2015. technologies that rely on FDC, such as virtual metrology Figure 3. Illustration of ability to determine critical sensors associated with a particular excursion, leveraging techniques and predictive maintenance. originally developed for predictive technologies (virtual metrology and predictive maintenance).

36 NANOCHIP NANOCHIP 37 SURFACE TEXTURES OF CHAMBER PARTS

CAN BOOST TOOL OUTPUT Figure 1. An option within Applied Materials service agreements, LavaCoat2 surface technology can be applied to any process kit part in nearly infi nite texture patterns, and can be optimized across multiple parts to meet the specifi c needs of an AND AVAILABILITY application. This fi gure shows two surfaces with di¤ erent LavaCoat2 textures, along with models of their di¤ erent structures. Given the many issues involved in semiconductor manufacturing, Figure 2 shows how LavaCoat2 replacement parts genuine spare parts, cleaning and coating specifi cations, eliminated particle spiking and reduced the overall and advanced textures. When combined with Applied it’s easy to overlook the small things that can make a big contribution baseline of defects in an Applied Materials TxZ (CVD TiN) Materials services, the TKM program can help customers chamber that had been using standard textured parts. further optimize tool performance and overall factory to operational excellence—things like the surface textures of your operations. MORE TOOL OUTPUT LavaCoat2 replacement parts are the latest service enhancement from Applied’s Surface Technology Group. chamber process kit parts. But advanced surface technology, Applied Materials Total Kit Management (TKM) This engineering team is dedicated to driving continuous programs provide customers worldwide with a turnkey available as an option within Applied Materials service agreements, improvements in parts to support Applied’s tool-specifi c o£ ering that encompasses spares, cleaning and coating, performance commitments to its customers with service and logistics services for e˜ cient management of can signifi cantly increase the availability of Applied Materials contracts. their inventories of process kits and components. The Endura tools while reducing overall cost of ownership (COO). program o£ ers a kit-management solution that includes For additional information, contact [email protected].

BY As semiconductor manufacturing technology evolves, While traditional process kit textures such as particle limits and sizes are constantly reduced to meet TWAS provide standard roughness and adhesion of JOHN production yield targets. Usually this requires more deposited fi lm, LavaCoat2 is an engineered texture that MANGINI frequent maintenance, including process kit changes, provides greater tensile strength, resulting in reduced to maintain acceptable particle levels, resulting in more particle levels and longer process kit life. chamber downtime, reduced tool availability, and LavaCoat2 replacement parts can lengthen the increased COO. mean time between cleans (MTBC) by up to 2x and Applied Materials LavaCoat2 process kit parts can help lower defect densities in the chamber by up to improve chamber particle performance and device yield, 50%. This can signifi cantly boost output and yield. increasing tool output and availability. LavaCoat2 is a At one site, a LavaCoat2 deposition ring proprietary surface-preparation technology that texturizes delivered signifi cantly lower particle performance parts (see fi gure 1) so that deposited fi lms adhere to their for a customer’s Applied Materials EnCoRe II Ta(N) Figure 2. The graph shows defect levels in an Applied Materials TxZ chamber. At left is the defect performance with standard- surfaces more readily than to surfaces texturized by other chamber. Particles >0.06µm in size were reduced texture chamber parts, and at right with LavaCoat2 replacement parts. The LavaCoat2 parts kit eliminated particle spiking methods, such as grit-blasting and twin-wire arc spraying by 90% when compared with a conventional TWAS and reduced the overall baseline of defects, resulting in a 50% increase in kit life and an increase of as much as 3% in tool (TWAS). deposition ring. availability.

38 NANOCHIP NANOCHIP 39 One strategy is to approach ■ Disruption, delays and cost reasons. For example, their systems the tasks of production planning, associated with having to analyze may not provide good, real-time data scheduling, dispatching, and and validate changes to dispatching from the fab (as opposed to data reporting in an integrated, fl exible, rules and scheduling policies used in spreadsheet planning). Or and open fashion, with the goal of directly on the factory fl oor, in there may be a lack of integration optimizing production every step response to changing conditions. between optimization and execution of the way. This means from initial mechanisms, combined with an enterprise-level master planning ■ Inability to simulate dispatching inability to automatically initiate the down to the factory fl oor dispatching rules with su˜ cient accuracy to right actions based on certain critical of specifi c lots of work-in-progress build realistic “what-if” models events and timing. (WIP) in real time. that reduce bottlenecks, increase Other factors may include the lack Enabled by an integrated overall throughput, and ensure that of an integrated way to visualize inputs suite of automation software that cycle time commitments are met. and outputs and limited diagnostic incorporates a state-of-the-art information to help trace why and how ■ Lack of cohesion resulting from optimization engine, such an decisions are being made. the di˜ culty of coordinating the approach would allow fabs to e£ orts of engineers who work anticipate and better respond to PRODUCTION PLANNING separately in planning, dispatching fl uid conditions, thereby controlling HIERARCHY and shop fl oor “silos,” making it OPTIMIZING the speed of WIP processing To begin to address these issues, di˜ cult to achieve faster and better and reducing waste. It could help operational decision-making and it is useful to think of production manufacturers overcome the reporting. planning, scheduling, dispatching, and impediments to higher productivity reporting as a hierarchy of functions, they face every day, including: Manufacturers often see the organized by specifi c tasks and PRODUCTIVITY ■ Inability to look at factory need to optimize production, but requirements and with di£ erent time resources on a holistic basis. cannot do so e˜ ciently for various frames (see fi gure 1).

ANALYSIS PLANNING HIERARCHY — INTEGRATED APPROACH FOR BETTER FACTORY PERFORMANCE Master Planning BY The complexity of semiconductor manufacturing Factory MADHAV KIDAMBI, n Scope: Enterprise Enterprise Planning makes it di˜ cult to optimize production for increased Resource SHEKAR Planning n Multi-plant e˜ ciency and output while maintaining high product (ERP) sourcing strategy n Scope: Individual Scheduling KRISHNASWAMY factory n Internal and AND quality and reducing overall costs. Yet it is imperative SAP, external supply n Achieve master planning objective n Oracle, n Trade-o Scope: Key tool Dispatching DAVID NORMAN etc. groups that semiconductor manufacturers and outsourced analysis n Capacity-tool group level n n Capacity Achieve factory planning n Execution of tool assembly and test (OSAT) suppliers fi nd ways to do so, balancing n Starts, due date and tool group objective schedules capacity n Guidance to n Global rules for because production ine˜ ciencies can keep them from balancing tools in group all other tools fully capitalizing on the opportunities presented by Figure 1. Looking at production planning, scheduling, and dispatching as an integrated hierarchy of functions, as illustrated above, today’s fast-changing, highly competitive markets. optimizes the use of production resources every step of the way, from enterprise-level master planning to real-time dispatching.

40 NANOCHIP NANOCHIP 41 OPTIMIZING PRODUCTIVITY ANALYSIS FOR BETTER FACTORY PERFORMANCE

The master planning function open source solutions, spread- analyze and implement production deals with enterprise-level planning sheets, commercial products, and requirements. With it, manufacturers issues. Master planning is generally homegrown applications. can simulate, select, schedule, and Supply Production Distribution Demand the responsibility of a central planning However, these heuristics-based dispatch production resources and Management Management Management Management organization whose main goal is to tools trade quality for speed. That WIP with optimal productivity and interface with customers and address is, while they may produce results e˜ ciency in real time. Strategic Network Design their overall needs. Its scope includes quickly in response to changes on The APF software currently overall sourcing strategies and the factory fl oor, those rules may supports the CPLEX and Gurobi Strategic/ capacity analyses to decide which not represent the best of all possible commercial solvers as well as the long-term Multisite Master Planning fab(s) will be used to produce parts solutions. COIN open source solver. This gives for a customer. The master planning For example, a new dispatching users a unique, fully integrated Tactical/ Supplier Production Distribution Customer mid-term Management Purchasing Management

group typically looks 1–18 months rule that is adequate for a given software framework (see fi gure Planning Planning Demand Planning and ahead. process step may be so narrowly 3) that is scalable and fl exible, and Materials Factory planning, meanwhile, written that it precludes opportunities enables them to protect their IP. Operational/ Planning Production Transport short-term Scheduling Planning performs capacity analyses for tool to balance production down the line,

groups with the goal of delivering as can happen when manufacturers MASTER PLANNING SOURCE MAKE DELIVER (ATP/CTP) Demand Fulfillment product by the due date while inadvertently create downstream EXAMPLE Execution balancing factory constraints. Tasks bottlenecks by trying to push more Order release, shop floor control, vehicle dispatch, order management, etc. The productivity advantages this in the purview of this group include WIP through a given set of tools. framework o£ ers can be illustrated decisions to set up tools in certain Although optimization PROCUREMENT PRODUCTION DISTRIBUTION SALES by a hypothetical look at how the ways, whether to bring on more algorithms may be used to improve master planning function might be personnel for given work shifts, and the performance of these heuristics- conducted at an OSAT company. so forth. These planners typically look based programs, they don’t o£ er Assume that the OSAT Figure 2. An integrated automation framework is necessary to achieve optimally e± cient advanced production systems in fabs 1–4 months ahead. a comprehensive infrastructure receives wafers from a particular and OSAT packaging operations. (Source: Production Planning & Control.[1]) The scheduling group makes sure for developing and maintaining semiconductor manufacturer that key tools and tool groups are solutions. Also, these systems require every week for packaging, testing available and WIP is balanced so that additional databases and applications and assembly, along with specifi c, they can meet the factory objectives. to be supported. For example, detailed requests for the production Another key goal is how to load the additional custom code is required of multiple lots needed over each of products across the tool group to to prepare input data, set up and run the next 10 weeks. achieve factory planning objectives optimization problems, and validate The OSAT must respond to (e.g., to meet lot due dates, cycle time and post-process optimization the customer by specifying what targets, setup time goals, etc.). The results. it can actually produce week-by- time frame here is generally 12–24 By contrast, an integrated week within that time frame and hours ahead, essentially a work shift automation framework can committing to do it. With manual or two. o£ er users the biggest potential systems it takes a few days to Finally, the dispatching group productivity gains (see fi gure 2). formulate this response and is real time-oriented, with the goal Applied Productivity Family (APF) commitment, but an automation of executing tool schedules to meet software can be used to build a framework is expected to reduce that fabrication process requirements and framework to optimize planning response time to a few hours. maximize production throughput. across the hierarchy. It encompasses The commitment would have production planning, dispatching, to consider not only the customer’s automation, and scheduling software AVOIDING SUBOPTIMAL specifi c requests (generally for for equipment and process-control SOLUTIONS multiple lots of product per week), systems. Most manufacturers use but also additional work for that A fast, robust mathematical a disparate mix of software customer and other customers that Figure 3. These screens are examples of the integrated interface between Applied Materials APF automation software and one optimization program—referred applications for planning across the may be in process or anticipated in of the mathematics-based optimization programs, or solvers, that can be incorporated with it for factory planning, scheduling, to here as a “solver”—works with hierarchy. These tools may include the same time frame. dispatching, and reporting. The interface allows users to set variables, constraints, and objective functions as needed. the APF software to holistically

42 NANOCHIP NANOCHIP 43 OPTIMIZING PRODUCTIVITY ANALYSIS FOR BETTER FACTORY PERFORMANCE GLOBAL CUSTOMER

It is also possible that the Planning inputs would include systems, and overall higher e˜ ciency customer may change the production constraints and other information and productivity. request. If that happens, the OSAT such as customer orders in the queue, CONTACT CENTER would have to quickly determine upstream WIP equipment availability, CONCLUSION whether it can meet the new potential capacity shortages, In the manufacturing, assembly, requirements. long cycle times, wafer costs, testing, and packaging of semicon- NOW AVAILABLE Taking into account all of materials requirements, arrivals and ductors, meeting customer needs the variables involved in making inventories, line imbalances, and high for quality, delivery, and cost has production commitments, modeling levels of variability. All assembly and never been easy. But today’s complex and verifying optimum production test operations would be considered, technology and demanding economics IN MORE REGIONS scenarios, and then actually carrying including load boards and handling make it more di˜ cult than ever before. them out in a dynamic environment is equipment in the testing area. Now more than ever, factories and BY NANOCHIP STAFF a formidable task. The optimization model operates tools alike must be planned, scheduled, Conceptually (see fi gure 4), according to predefi ned logic and and used as e˜ ciently as possible. New Customers in North America, Taiwan, The GCC center is sta£ ed by trained service and spares experts a master planner would follow “what-if” scenarios executed by solver-based optimization capabilities who understand how to address customers’ needs. When customers these steps: the optimization solver, based on integrated with already powerful and Europe have 24/7 support contact the center, requests are e˜ ciently and e£ ectively relayed automation workfl ows defi ned in 1. Initiate the APF system. planning, scheduling, dispatching, and through the network of Applied Materials support services experts. Applied’s APF framework. The solver capability with a single point of contact reporting automation software will help This communication chain ensures that the right customer engineers 2. Specify the data to be used. minimizes lack of responsiveness to make this possible from the enterprise for service and parts requests. (CEs) for the job respond quickly. CEs specifi cally authorized to work 3. Confi gure master planning the customer request, and gives a level down to the factory fl oor. on a customer’s tool can access a comprehensive tool service history scenarios to be run. reason for any unsatisfi ed demands, for the customer’s fab. They can also search Applied’s extensive such as wafer lots that didn’t arrive on 4. Initiate plan execution. For additional information, contact global database of service and repair best-known methods (BKMs) time or tools that were over capacity. The planner would consider [email protected]. and the order status of current parts. As a result, the OSAT may realize higher-level defi ned objectives such The GCC center also provides the convenience of an always- specifi c improvements. These can [1] as customer end-product demand, Martin Rudberg and Jim Thulin, available backup for local service teams. If a local Applied on-site potentially include better dispatch “Centralised Supply Chain Master Planning process and device mix, wafer/die CE or other service professional is not immediately available, GCC rules and scheduling, improved Employing Advanced Planning Systems,” schedule, suggested lot release dates, center sta£ will quickly assess the situation and route the issue bottleneck management, greater Production Planning & Control, Vol. 20, and weekly commitment plans. No. 2, March 2009, pp. 158–167. within Applied’s service network for a prompt response. The GCC or di£ erent use of automation center provides standardized, simplifi ed service order creation, issue tracking, management and, if necessary, rapid escalations to help Execution of resolve customer issues. Master Planning Master Planning Master Planning Model Inputs Optimization Outputs “The goal of the GCC center is to simplify and consolidate our contact center services. We want to make it easier to do business

OBJECTIVE CONSTRAINTS with Applied Materials and to deliver greater customer satisfaction,” FUNCTION CORE OPTIMIZATION Applied Materials has expanded the operations of its new said Applied Materials GCC Center Director Elizabeth Brogdon. SOLVER OPTIMIZATION MODEL Global Customer Contact (GCC) center to include customers in DEFINITION “With more than 1,000 unique tool-types in Applied’s installed base, Taiwan and Europe. The GCC center, fi rst launched in North America and over 30,000 tools installed in customer fabs around the globe, in September, o£ ers a streamlined, single point of contact for all we’ve designed the advanced capabilities of the GCC center to help Applied equipment service- and parts-related needs. In the next us address customers’ parts and services requirements faster, more phase of expansion, regionalized GCC access for Japan, Korea, China, e˜ ciently, and as cost-e£ ectively as possible.” and Southeast Asia will begin in early 2016. Customers in the following regions can contact the GCC center Open around the clock, seven days a week, the GCC center at these email addresses: allows Applied Materials customers to use a single, assigned phone North America: [email protected] number or email address to schedule service, order parts, check Taiwan: [email protected] order status, request a quote, and escalate or expedite a support Europe: [email protected] VALIDATION request. Service is o£ ered in local languages by people who provide Simulation Execution of Simulation Model Inputs Simulation Model Outputs expert help. This centralized contact point for service and support For additional information about the GCC center, contact your local means that all requests can be accurately logged, tracked, and Applied Materials sales or service manager. Figure 4. By incorporating a solver, APF software enhances master planning accuracy. dispatched quickly.

44 NANOCHIP NANOCHIP 45 SUBFAB EXHAUST MANAGEMENT EVOLVES TO MEET Figure 2. The fi gure shows drawings of the Applied Materials Aeris abatement product family. At left is the Aeris-G greenhouse gas product, with an installed base of >1,000 units. Center, a higher-power replacement plasma source for use with wider process windows. At right is a design under evaluation for abatement of hazardous e¹ uent from deposition NEW CHALLENGES chamber-types.

Subfab utilities and systems Abatement of fl uorinated The idea is to convert compounds mean that destruction meet the requirements of a growing PLASMA CLEANING OF greenhouse gases (F-GHGs) perfl uorocarbon compounds (PFCs) e˜ ciency is higher. Incineration number of etch processes and, more DEPOSITION WASTE aren’t glamorous, and they generated during semiconductor and other oxide/poly etch waste by-products, such as volatile organic recently, deposition technologies. A tantalizing question in light of manufacturing has come a long way gases into water-soluble species, compounds (VOCs) and nitrogen This often involves optimization of all of this progress is: Can pre-pump usually aren’t considered as in recent years, and it continues to which then can be removed by the oxides (NOx), is also reduced the chemical reactions that occur plasma systems be used to solve evolve. In 2009, Applied Materials facility scrubber. Applied Aeris-G compared to post-pump burning and during abatement. In many instances other types of subfab problems? critical to a fab’s success in introduced its fi rst zero footprint units focus on greenhouse gas plasma systems. O or H must be added to achieve 2 2 Developmental work on an extension pre-pump plasma technology for reduction and treat PFCs/F-GHGs In addition, treating the process the optimum conversion into less the same way production of the Applied Aeris family to address abatement of F-GHGs from dry upstream of the pump, where there is e¿ uent prior to the addition of pump harmful chemicals and to avoid issues resulting from waste generated etching chambers. The Applied no pump purge gas present to dilute purge gases results in signifi cantly recombination. The Aeris-G uses tools are. Yet signifi cant by deposition processes indicates the Aeris-G product addresses the need the e¿ uent. lower operating costs for abatement water vapor to provide the needed answer is yes. economic and reputational for an e˜ cient abatement capability The smaller volume of gas and compared to traditional solutions. O and H atoms when converting, for for this application. the higher concentration of target A typical Aeris-G unit uses just 1–3 example, CxFy into HF and CO2; NF3 penalties may apply if a fab’s kW of electrical energy per chamber into N2 and HF; or SF6 into SO2 and to accomplish the abatement HF (see fi gure 1).

emissions violate increasingly CF4 + H2O Plasma HF + CO2, CO process, as compared to post-pump The Applied Aeris product family strict environmental standards solutions that typically use 8–12 has evolved in other ways as well H kW of equivalent energy, usually (see fi gure 2). One development is F O H C F O F C F C because they rely on natural gas to a higher-power replacement plasma and expectations—so failing O F H C destroy the unwanted compounds via source to address increasing PFC F - e H H O combustion. gas fl ow rates and wider process to upgrade the subfab is F C F O + F C F F F Since the introduction of pre- windows. a risk not worth taking. C – pump plasma technology, more Kits are now available to F F than 1,000 fi rst-generation Aeris-G synchronize Applied Aeris abatement abatement units have been installed operation with the actual needs at fabs around the world, with a of the process to further reduce BY ANDREAS NEUBER, Figure 1. The fi gure shows a chemical reaction that typically occurs during demonstrated mean-time-between- operating costs. One example is failure (MTBF) reliability of more than the synchronization of abatement JOHN DICKINSON, pre-pump plasma abatement of F-GHGs in the gaseous e¹ uent from dry etch chambers. At left are the F-GHG molecules to be treated. In the center, a plasma 100,000 hours. operation to process cooling water Figure 3. Photo of a PCW kit used to DUSTIN HO, AND is applied to dissociate them. At right they combine to form compounds that have The Applied Aeris product family (PCW) needs at any given point in synchronize abatement operation to ANDREW HERBERT less environmental impact. has been continually adapted to time (see fi gure 3). process cooling water needs.

46 NANOCHIP NANOCHIP 47 DAVID LAMMERS SUBFAB EXHAUST MANAGEMENT CHIPMAKERS REMAIN WARY EVOLVES TO MEET NEW CHALLENGES OF DATA SHARING

First, a little background. A chemical reactions to deposit atomic SUCCESSFUL RESULTS The semiconductor industry is conundrum. After outlining several ways that Intel number of the processes used to layers on the wafer. In most cases WITH HARP PROCESS in a dilemma, well described by Ben engineers use proprietary software to analyze some build high-aspect-ratio structures, the reaction e˜ ciency is very low Eynon, senior director of engineering fi ve billion data points each day, Chadwick was asked a A fi rst solution for the HARP which are based on low thermal (e.g., in the single-digit percent development at Samsung Austin question about sharing data in the cloud. He replied that process has been studied and budget chemical reactions, generate range), which leads to extensive Semiconductor, at the Advanced Intel “has its own compute farms, both distributed and tested successfully. Users of this by-products that can clog forelines, waste generation. This waste is often Process Control (APC) conference centralized,” and there is no problem taking expense process are no doubt familiar with piping, pumps and abatement. The highly reactive and can easily lead held in Austin in mid-October. reports, for example, out to the cloud. But Chadwick the foreline and gate valve clogging problem isn’t only the clogging to clogging or even to uncontrolled Scaling to 10nm and beyond, also said Intel would be very cautious about taking its it can bring, as well as the need for itself: these by-products may be chemical reactions. Ben Eynon, Eynon said, means that chipmakers manufacturing IP to the cloud. “You are talking about a more frequent pump maintenance. Samsung Austin pyrophoric or toxic. Consequently, With regard to alternative gate and their equipment and materials company’s bread and butter, our R&D, and there is going The Applied Materials plasma- Semiconductor safety concerns arise for people who materials, there are two important vendors “must attack everything to be a lot more study before we do that.” cleaning process enabled highly must interact with the system during issues. Some of these materials are simultaneously. The problems we have are large and must Eynon added that Samsung also uses proprietary reactive F radicals to be recombined maintenance. quite toxic and so it is desirable to be solved perfectly and quickly in order to stay competitive.” software to improve security, including its own email into F molecules, with an associated While these issues are fi lter them out early in the waste- 2 Eynon told the APC audience “we have to keep our system. “That’s our mentality in semiconductor. I believe loss in reactivity. Then, a second already familiar to semiconductor treatment process by adsorbing equipment clean and our processes right on target to we are going to be using our own hardware to do our use of the plasma dissociated the manufacturers running high-aspect- them onto a sorbent. However, the keep these defects down…whoever can keep the defects number crunching for a long while. Every time we hear F molecules, allowing a reaction to ratio process (HARP), CVD and possibility of clogging the foreline, 2 down, wins. We face process limitations and integration about another case of identity theft, we realize this kind take place with SiO deposits in the some furnace processes, a look vacuum pump and exhaust system 2 complexity. And it takes a lot of cross-communication to of activity is not going away. We are not going to swing to foreline and the pump. This reaction into the Factory Integration and remains a major concern. In addition, make things work well.” an attitude of ‘here is our IP, go crunch it.’ ” converted the waste stream into SiF, Environmental Safety and Health some alternative gate materials are 4 All of the like tools in a fl eet must be matched, and stay James Moyne, a professor at the University of which passed through the pump sections of the ITRS Roadmap valuable, meaning that any solution matched. The time required for feedback and feed-forward Michigan and semiconductor industry consultant and was later removed in the local shows three major areas of specifi c designed to manage them should must be minimized. And standard operating procedures on advanced factory automation, noted that all scrubber. concern. They are related to the also enable them to be recovered in the 10nm era and beyond need to change to custom industries face security issues, but the chip industry is Thus, the pump was able to growing use of: e˜ ciently. operating procedures where each wafer is treated as an particularly concerned that IP not leak. “Compared to run longer before maintenance ■ With all this in mind, and based individual with di£ erent processing requirements. other industries, we are really skittish,” he said. While Energetic materials such as was required. Moreover, there was on the performance and ruggedness Chipmakers need “more sensors on everything so we chipmakers are increasingly sharing data with their tool trimethylaluminum or similar no need to add any reactive gas of the Applied Aeris product family, can monitor more than we do today. We need feedback to vendors, only a fraction of that data is being sent outside metalorganic precursors to the system to facilitate these Applied Materials set a goal to adjust the next process, based on the just-prior process. for remote analysis. ■ Low thermal budget processes transformations, although processes develop a high-fl ow capacity pre- I need to know that if I run this stu£ this certain way, I can Nick Ward, director of marketing for the services with low material conversion other than HARP may call for it. WORD LAST THE pump plasma treatment technology be sure of what I will get for electrical test results and yield,” group at Applied Materials, said that “Applied Materials rates, such as ALD or CVD to avoid or reduce clogging from Eynon said. completely errs on the side of caution” when dealing with LOOKING FORWARD ■ Alternative gate materials deposition e¿ uent, with or without He then shifted to the crux of the problem. With the security of customer data by keeping tight controls such as silicon-germanium the traditional methods of pipe Pre-pump plasma abatement so much data being pulled o£ the tools that already it is and safeguards in place. or III/V and other compound heating and post-pump pipe purging. technology continues to evolve in “spilling onto the fl oor,” Eynon acknowledged that the “We are dealing with proprietary protocols and semiconductors The idea, as before, is to lockstep with increasingly stringent industry faces a general reluctance to share that data and proprietary approaches to data. As an industry, we Regarding these points, convert problematic materials into requirements for greener and more lacks the necessary protocols to do so securely. need to develop a set of standards for protecting the although safe material handling other materials; in this case, into sustainable manufacturing. The “The tool vendors have their log fi les. We have our shared data. Being able to integrate with certain systems next opportunity for this e˜ cient, of energetic materials is currently compounds that can be transported process. Our customers have their designs. Everyone has and tools will speed time to problem resolution and David Lammers is cost-e£ ective, and space-saving addressed in new SEMI Standards more easily for abatement locally their own IP that they don’t want to share. We have to fi gure create greater cost savings for manufacturers,” an Austin-based solution will be for so-called “dirty” activities, solutions for waste or in the central scrubber, and also out how to handle IP better than we do today [to make Ward said. technology journalist. handling are needed as well. to convert hazardous materials into deposition chemistries. sharing happen],” he said. However, Moyne cautioned that companies need Lower thermal budget less hazardous ones to reduce the to keep working on the problem, or lose out. “The processes, meanwhile, rely on risk to maintenance personnel. For additional information, contact INTEL’S BREAD AND BUTTER tighter the control specs and the more sophisticated the [email protected] or Steve Chadwick, senior engineer at Intel’s algorithm, the more suppliers and customers need to [email protected]. manufacturing IT operation, described a similar share their data. That’s just a fact.”

48 NANOCHIP NANOCHIP 49 www.appliedmaterials.com

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