SCH5617C Desktop System Controller Hub with Advanced, 8051µC-Based Auto Fan Control

Product Features • Fan Tachometer or Lock Rotor Inputs (3) - Programmable linear automatic fan control • ACPI 2.0 Compliant based on temperature • High Performance 8051 - Acoustic enhancement mode - 2.5X average instruction execution speed - ProcHot pins modulate Tmin improvement over the entire instruction set; - Fan PWM duty cycle is a function in linear i.e., typical 4-clock instruction cycle in high- mode of multiple temperatures and ProcHot performance 8051 vs. 12-clock instruction signals cycle in standard 8051. - PWM Ramp Rate Closed Loop Control - Faster clock speed: 32 MHz vs. 16 MHz in • Internal Ring Oscillator for VTR Powered Logic standard 8051. • Low Battery Warning - Dual Data Pointers • LED Control - More Interrupts: Power-Fail, External Inter- • SMBus Isolation Logic rupt 2, External Interrupt 3, etc. • Programmable Wake-up Event Interface - A set of External Memory/Mapped Control • PC2001 Compliant Registers provide the 8051 core with the abil- • General Purpose Input/Output Pins (30 Host con- ity to directly control many functional blocks trolled, 16 8051 controlled) of the SCH5617C. • 21 Dedicated Scratchpad registers - 384 Bytes of RAM as part of the 8051 core • ISA Plug-and-Play Compatible Register Set - 4k Bytes Data RAM (869 bytes may be used • System Management Interrupt to patch ROM code) • GLUE Logic - Twelve Interrupt Sources - IDE Reset/Buffered PCI Reset Outputs - Watch Dog Timer (WDT) - Power OK Signal Generation • Operating Temperature Range of 0oC to +70oC - Power Sequencing • PECI Interface - Power Supply Turn On Circuitry - Supports PECI REQUEST# and PECI AVAIL- - Resume Reset Signal Generation ABLE signaling - Hard Drive Front Panel LED • Temperature Monitor • 2.88MB Super I/O Floppy Disk Controller - Monitoring of up to Two Remote Thermal - Licensed CMOS 765B Floppy Disk Controller Diodes - Software and Register Compatible with - Supports temperature readings from -63oC Microchip's Proprietary 82077AA Compatible to +192oC Core – Supports monitoring of discrete diodes (3904 - Supports Two Floppy Drives type diodes) - Configurable Open Drain/Push-Pull Output – Supports monitoring substrate diodes (45nm & Drivers 65nm processor diodes) - Supports Vertical Recording Format - 1/8th degree temperature resolution - 16-Byte Data FIFO - Internal Ambient Temperature Measurement - 100% IBM® Compatibility - Limit Comparison of all Monitored Values - Detects All Overrun and Underrun Conditions • PROCHOT_IN# Pin - Sophisticated Power Control Circuitry (PCC) - Mapped into Temperature monitoring inter- Including Multiple Powerdown Modes for rupt generation logic Reduced Power Consumption - May be used to adjust fan control limits - DMA Enable Logic - May be configured to force fans on full - Data Rate and Drive Control Registers • PROCHOT_OUT Pin - 480 Addresses, Up to Eight IRQs, and Four • Auto-Fan Control with ProcHot Features DMA Options - PWM (Pulse width Modulation) Outputs (3) - Enhanced Digital Data Separator – Legacy PWM control dc fan outputs – 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps • High Frequency PWM Options (15kHz up to Data Rates 30kHz) – Programmable Pre compensation Modes • 2 second delayed start-up for PWM outputs

 2014 Microchip Technology Inc. DS00001789A-page 1 SCH5617C

• Keyboard Controller temperature sensor or retrieving temperatures from - 8042 Software Compatible external processors that implement the PECI Interface. - 8 Bit Microcomputer This includes support for the PECI REQUEST# and - 2k Bytes of Program ROM PECI AVAILABLE signals that are used to assure cor- - 256 Bytes of Data RAM rect operation of PECI when processors enter the C3/ - Four Open Drain Outputs Dedicated for Key- C4 sleep states. This device offers programmable board/Mouse Interface automatic fan control support based on one or more of - Asynchronous Access to Two Data Registers these measured temperatures. There are three pulse and One Status Register width modulation (PWM) outputs with high frequency - Supports Interrupt and Polling Access support as well as three fan tachometer inputs. In addi- - 8 Bit Counter Timer tion, there is support for a PROCHOT_IN# pin that may - Port 92 Support be used to generate an interrupt, adjust the pro- - Fast Gate A20 and KRESET Outputs grammed temperature limits in the auto fan control •Serial Ports logic, or force the PWM outputs on full. There is also a - Two Full Function Serial Ports separate PROCHOT_OUT output pin. - High Speed NS16C550A Compatible UARTs The GLUE Logic includes various power management with Send/Receive 16-Byte FIFOs logic including generation of RSMRST# and Power OK - Programmable Baud Rate Generator signal generation. There are also four LEDs to indicate – Supports all standard baud rates up to 115k bps power status and hard drive activity. Also included is – Supports non-standard baud rates of 230k and SMBus Isolation logic, which can be used to isolate 460k bps - Modem Control Circuitry SMBus signals during power down modes. - 480 Address and 15 IRQ Options The part provides 46 General Purpose I/O control pins, • Infrared Port which offer flexibility to the system designer. There are - Multi protocol Infrared Interface 21 Scratchpad read/write runtime registers for custom - IrDA 1.0 Compliant use. - SHARP ASK IR The SCH5617C incorporates the following Super I/O - 480 Addresses, Up to 15 IRQ components: a parallel port that is compatible with IBM • Multi-Mode™ Parallel Port with ChiProtect™ ®, ® PC/AT architecture, as well as the IEEE 1284 EPP and - Standard Mode IBM PC/XT PC/AT , and ECP; two serial ports that are 16C550A UART compat- PS/2™ Compatible Bi-directional Parallel ible; a keyboard/mouse controller that uses an 8042 Port micro controller; two floppy controllers, which use - Enhanced Parallel Port (EPP) Compatible - Microchip's true CMOS 765B core; one infrared port EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) that is IrDA 1.0 compliant. The true CMOS 765B core - IEEE 1284 Compliant Enhanced Capabilities provides 100% compatibility with IBM PC/XT and PC/ Port (ECP) AT architectures and is software and register compati- - ChiProtect Circuitry for Protection ble with Microchip's proprietary 82077AA core. The - 960 Address, Up to 15 IRQ and Four DMA part also provides a low battery warning circuit. Options • LPC Interface The SCH5617C is ACPI 1.0b/2.0 compatible and sup- - Multiplexed Command, Address and Data ports multiple low power-down modes. It incorporates Bus sophisticated power control circuitry (PCC), which - Serial IRQ Interface Compatible with Serial- includes keyboard and mouse wake-up events. ized IRQ Support for PCI Systems The SCH5617C supports the ISA Plug-and-Play Stan- - PME Interface dard register set (Version 1.0a). The I/O Address, DMA • Power Good Output Channel and hardware IRQ of each logical device in • 3.3 Volt I/O the SCH5617C may be reprogrammed through the • 128-Pin QFP RoHS Compliant Package internal configuration registers. There are up to 480 (960 for Standard Mode Parallel Port) I/O address loca- Description tion options, a Serialized IRQ interface, and four DMA channels. The SCH5617C is a 3.3V PC 2001 compliant Super I/ O controller with an LPC interface. All legacy drivers used for Super I/O components are supported making this interface transparent to the supporting software. The LPC bus also supports power management, such as wake-up and sleep modes. The SCH5617C provides temperature monitoring with auto fan control. The temperature monitor is capable of monitoring two external diodes, one internal ambient

DS00001789A-page 2  2014 Microchip Technology Inc. SCH5617C

TO OUR VALUED CUSTOMERS

It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at [email protected]. We welcome your feedback.

Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).

Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur- rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: • Microchip’s Worldwide Web site; http://www.microchip.com • Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are using.

Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products.

 2014 Microchip Technology Inc. DS00001789A-page 3 SCH5617C

BLOCK DIAGRAM

FIGURE 1: SCH5617C BLOCK DIAGRAM

IDE_RSTDRV#*, PCI_RST_SYS#* PCI_RST_SLOTS#*, PS_ON#* PWR_GOOD_3V*, PWRGD_PS, RSMRST#* SECONDARY_HD#* PRIMARY_HD#* SCSI#* HD_LED#* LED2* LED3* Glue Logic LEDs 14.318 MHz CLOCK LED1* GEN

SER_IRQ SERIAL PD[7:0] IRQ BUSY,SLCT,PE PCI_CLK Multi-Mode ERROR#, ACK# Parallel Port TM STROBE#, INIT# Internal Bus with ChiProtect SLCTIN# LAD[3:0] LPC (Data, Address, and Control lines) ALF# LFRAME# Bus Interface LDRQ# PCI_RESET# LPCPD# High-Speed TXD1*,RXD1* CTS1#*, RTS1#* IO_PME#* 16550A SCH5617C UART DSR1#*, DTR1#* IO_SMI#* Power Mgmt (128 QFP) PORT 1 DCD1#*, RI1#* GP10*, GP11*, GP15*, GP21*, GP22*, GP23*, GP25*, GP26*, GP31*, GP33*, GP35*, GP36*, General GP37*, GP40*, GP41*, GP42*, Purpose GP52*, GP53*, GP55*, GP57*, GO60*, GP61*, GP75*, GP76*, I/O GP77*, GP80*, GP81*, GP82, TXD2*,RXD2* GP83*, GP84*, GP8051_[12:1]*, High-Speed GP8051_[17:14]* 16550A CTS2#*, RTS2#* 8051 UART DSR2#*, DTR2#* PORT 2 DCD2#*, RI2#* TACH1 ROM TACH2 Auto TACH3 WDATA HVSS Fan Remote1+ Control WCLOCK Remote1- SMBus Isolation SCLK*, SDAT* Circuits SCLK_1*, SDAT_1* Remote2+ Analog Remote2- Interface PROPRIETARY DIGITAL DATA HVTR 82077 COMPATIBLE SEPARATOR PWM1 VERTICAL FLOPPY WITH WRITE PWM2 DISK CONTROLLER PRECOM- KCLK, MCLK PWM3 Analog CORE PENSATION Keyboard/Mouse KDAT, MDAT, PROCHOT_IN# 8042 Block KBDRST#, A20M PROCHOT_OUT controller P12*,P16*,P17* RCLOCK

RDATA

PECI VREF PECI IO PECI RDATA#, Note 1: This diagram does not show power and ground MRT0#, MRT1#*, TRK0#, PECI AVAILABLE Interface WDATA# connections. PECI REQUEST# INDEX#,WRTPRT#,WGATE#, HDSEL#,DRVDEN0*, Note 2: Functions with "*" are located on multifunctional DIR#, STEP#, DSKCHG#,DS0#, DS1#* pins. This diagram is designed to show the various functions available on the chip (not pin layout).

DS00001789A-page 4  2014 Microchip Technology Inc. SCH5617C

PACKAGE OUTLINE

FIGURE 2: 128-PIN QFP, 14MM X 20MM X 2.7MM BODY (3.9MM FOOTPRINT) Note: For the most current package drawings, see the Microchip Packaging Specification at http://www.microchip.com/packaging

 2014 Microchip Technology Inc. DS00001789A-page 5 SCH5617C

APPENDIX A: PRODUCT BRIEF REVISION HISTORY

TABLE A-1: REVISION HISTORY

Revision Section/Figure/Entry Correction

DS00001789A (07-08-14) Replaces previous SMSC version Rev. 0.7 (12-09-08)

DS00001789A-page 6  2014 Microchip Technology Inc. SCH5617C

THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site con- tains the following information: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of semi- nars and events, listings of Microchip sales offices, distributors and factory representatives

CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notifi- cation” and follow the registration instructions.

CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • Local Sales Office • Field Application Engineer (FAE) • Technical Support Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this docu- ment. Technical support is available through the web site at: http://www.microchip.com/support

 2014 Microchip Technology Inc. DS00001789A-page 7 SCH5617C

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO.(1) - XXX(2) - [X](3) Example: Device Package Tape and Reel SCH5617C-NS = 128-pin QFP Option

Device: SCH5617C (1) Note 1: These products meet the halogen maximum concentration values per IEC61249-2-21. (2) Package: NS = 128-pin QFP RoHS Compliant package Note 2: All package options are RoHS compliant. For RoHS compliance and environmental information, please visit http://www.micro- Tape and Reel Blank = Tray packaging chip.com/pagehandler/en-us/aboutus/ (3) Option: TR = Tape and Reel ehs.html . Note 3: Tape and Reel identifier only appears in the catalog part number description. This identi- fier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option.

DS00001789A-page 8  2014 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Micro- chip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.

ISBN: 9781632763389

QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California CERTIFIED BY DNV and India. The Company’s quality system processes and procedures

are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and == ISO/TS 16949 == analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

 2014 Microchip Technology Inc. DS00001789A-page 9 Worldwide Sales and Service

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DS00001789A-page 10  2014 Microchip Technology Inc.