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Design and Analysis of Distributed Amplifiers Design and Analysis of Distributed Amplifiers Konstantin Kouznetsov and Ali M. Niknejad a distributed amplifier and finally in section VI we will Abstract-- This report will highlight the design of practical discuss the design of a distributed amplifier using the FET- distributed amplifiers. The design approach includes the 217 transistor [4]. The design achieves more than 10 GHz various loss mechanisms inherent in the FET transistor as well of bandwidth with 1dB of gain flatness with 17 dB power as transmission line losses and passive device losses. The gain. design goal is to achieve a flat gain over a large bandwidth while achieving the lowest noise possible. A practical design is II. IMAGE PARAMETER METHOD also illustrated. The image parameter method may be applied to the Index Terms-- Distributed Amplifiers, Traveling Wave distributed amplifier since it consists of a cascade of Amplifiers identical two-port networks forming an artificial transmission line. The image impedance Z for a I. INTRODUCTION i reciprocal symmetric two-port is defined as the impedance A schematic of a distributed amplifier [1][2] is shown in looking into port 1 or 2 of the two-port when the other Fig. 1. The distributed amplifier is composed of two coupled lumped transmission lines. Power is coupled from terminal is also terminated in Z i . This impedance is given the “gate-line” to the “drain-line” through transistors M1-Mn by [5] whereas power is coupled in the reverse direction B parasitically through the feedback capacitor C of the Z = (1) gd i C transistors. Since for a practical transistor S21 >> S12, the behavior of the amplifier is dominated by the “forward- where the ABCD matrix of the two-port is given by direction” coupling of power from the gate line to the drain éA Bù ê ú (2) line. As evident from the figure, the parasitics of the ëC Dû transistor form an integral part of the amplifier completing where A = D by symmetry. The propagation constant for the transmission lines. In this way, the parasitics of the the current and voltage is given by amplifier do not limit the gain-bandwidth product of the amplifier as in a traditional amplifier, allowing large e-g = AD - BC (3) bandwidths to be achieved. If care is exercised in Thus, wave propagation occurs if g has an imaginary equalizing the phase velocity on the gate and drain line, component. For the T-network shown in Fig. 2, the image then power interferes constructively and the overall gain of impedance and propagation factors are given by the amplifier is enhanced by the addition of each stage. Z Z = Z Z 1+ 1 (4) i 1 2 4Z The number of stages that may be used is limited by the 2 inherent losses on the drain and gate line. Thus, the Z Z Z 2 additional attenuation incurred by the addition of a stage eg = 1+ 1 + 1 + 1 (5) 2Z Z 2 may outweigh the benefits of gain and thus there is an 2 2 4Z 2 optimum number of stages for gain. This will always occur since the gain is a polynomial of the number of stages A. Lossless Lumped Transmission Line whereas the transmission line attenuation is a decaying For a lossless cascade of T-sections such as shown in Fig. 3, exponential function of the length of the transmission line. the propagation factor and image impedance are given by [5] In section II we will review the image parameter method as 2 it relates to designing a distributed amplifier. Specially, the L æ æ w ö ö Z = ç1- ç ÷ ÷ (6) inherent losses of the transistor and microstrips will be i C ç ç w ÷ ÷ taken into account to find the line impedance, propagation è è c ø ø and attenuation constants. These results will be used in 2w 2 2w w 2 section III where we derive the gain of a distributed eg = 1- + -1 (7) 2 w 2 amplifier. In section IV we review the design procedure of w c c w c Beyer et al. [3]. In section V we discuss the noise figure of 2 w c = (8) LC This work was completed while the authors were enrolled in EE217 at the University of California at Berkeley. Thus, for w < wc the lossless structure has a real image Lg =1.85nH rxg = w Lg Lg impedance and a purely imaginary propagation factor. C gs = 310 fF Ri = 7.25W Beyond the cutoff frequency, w the propagation factor has c 1 a real component that increases without bound. These C = 50 fF R = xg xg w C results are consistent with the distributed transmission line xg xg (13) since w c ® ¥ for such a structure. Ld = 2.04nH rxd = w Ld Ld Cds = 96 fF Rds = 385W B. Lossy Lumped Transmission Line 1 C = 50 fF R = xd xd w C Figures 4 and 5 show the lossy “gate” and “drain” xd xg transmission line. The losses are due to the lossy The FET parameters come from the standard FET-217 microstrips or spiral inductors as well as the losses of the transistor model whereas the drain and gate inductor input/output impedance looking into the gate/drain of the parasitics are shown parameterized as a function of the FET. A series gate resistance models the FET losses. The cutoff frequencies. In Fig. 6 we also include the lossless image impedance given by (6) for comparison. inductor losses are divided into two components, one part rx modeling the metalization losses in series with the inductor As evident from the figures, even for lossless passive and one component Rx modeling the substrate losses. For an insulating substrate, the conductive substrate losses are devices the losses in the intrinsic FET warrant careful negligibly small and so R =0. If dielectric losses are analysis. Additionally, the frequency dependence of the x image impedance can potentially destroy the broadband present, it is more appropriate to place Rx in shunt rather than in series with the substrate capacitance. operation of the device if it is not matched correctly. In reality these loss resistors are frequency dependent owing to skin and proximity effects and displacement C. Image Impedance Matching current in the substrate [6] but for simplicity we will assume a constant value. If the substrate is sufficiently To achieve an impedance match over a broad range, the conductive and near the microstrip metal layers, induced load and source impedance must be transformed into the eddy currents lead to an additional loss mechanism. This is line image impedance. Otherwise, the gain response will the case for highly conductive substrates used in epi CMOS not be flat as a function of frequency. processes. Again, we neglect this loss in the following analysis. The bisected-p m-derived section shown in Fig. 9, serves this purpose well [5]. In Fig. 10 we plot the impedance Using the notation of the previous section, the T-section looking into the gate and drain line when transformed by impedance and admittance are the m-derived section. As evident from the figures, the Z1g = jwLg + rxg (9) impedance is approximately constant over a broad range of frequencies, a big improvement over the frequency Cxg 2 1 Cxg jwC gs (1+ 2 C ) -w C gs ( w + w C ) variation of the image impedance in Fig. 6. The m-derived Y = gs xg g gs (10) 2g w w impedance matching network can also be used to match (1+ j )(1+ j ) w g w xg directly to 50 W. where 1 1 The performance of the m-derived section shown in Fig. 10 w = w = g C R xg C R is shown for the lossy transmission line as well as the ideal gs i xg xg transmission line. Its performance is not as good in the Similarly, for the lossy drain line, the T-section impedance lossy case but it can be flattened with further optimization. and admittance are Z1d = jwLd + rxd (11) 2 w 2Gxd Gds Gds ISTRIBUTED AMPLIFIER GAIN Gds (1- ) + jw( + + ) III. D Y = w xdwds w xd wds w xd (12) 2d w Given the background of Section II, we are now in a good (1+ j w ) xd position to derive the gain of the distributed amplifier. The where following derivation closely follows the work of [3] but 1 1 deviates in that we work directly with the complete w = w = d xd expressions for the transmission line parameters as opposed Cds Rds C xd Rxd Using (9)-(12), the image impedance and propagation factor to the approximate expressions developed by [3]. can be calculated using (4) and (5). These expressions are plotted in figures 6, 7, and 8. The plots are generated using the following gate and drain parameters1 1 These values correspond to the design presented in section VI. A. Expression for Gain Using (18) in (14) one obtains w -n(ad +a g ) - jnf - j tan-1 én ù 2 w g Using the simplified FET model shown in Fig. 11, the total g mVid sinhê (a d -a g )úe e ë2 û output current of an n-stage distributed amplifier shown in I o = (22) Fig. 1 can be written as 2 æ w ö é1 ù n 2 1+ ç ÷ sinh (a -a ) -g / 2 -(n-k )g ê d g ú 1 d d ç w ÷ 2 I o = 2 g m e åVck e (14) è g ø ë û k =1 To find the power gain, we use the following expressions where g is the propagation delay of the drain line given d 1 2 ' Po = 2 I o Re[Z ] (23) by (5) and is the voltage drop across the kth stage input id Vck 2 V capacitor.
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