3.95 GHz to 6.9 GHz, Tunable Low-Pass Filter Data Sheet HMC882A

FEATURES FUNCTIONAL BLOCKDIAGRAM

Amplitude settling time: 200 ns HMC882A Wideband rejection: ≥35 dB GND GND Single-chip replacement for mechanically tuned designs RFIN RFOUT RoHS compliant, 32-lead, 5 mm × 5 mm LFCSP package

APPLICATIONS VFCTL 17300-001 Testing and measurement equipment Figure 1. Military radar and electronic warfare/electronic counter measures (ECMs) Satellite communication and space Industrial and medical equipment

GENERAL DESCRIPTION The HMC882A is a monolithic microwave integrated circuit smaller alternative to physically large switched filter banks and (MMIC) low-pass filter that features a user-selectable cutoff cavity tuned filters. The HMC882A has excellent microphonics frequency (f3dB). The cutoff frequency can be varied from due to the monolithic design and low residual phase noise of 3.95 GHz to 6.9 GHz by applying a single analog tuning voltage −165 dBc/Hz, and provides a dynamically adjustable solution in between 0 V and 14 V. This low-pass filter provides a low 3 dB advanced communications applications. The low-pass tunable insertion loss, 13 dB return loss, and >20 dB stopband attenuation filter is packaged in a RoHS compliant, 5 mm × 5mm LFCSP at 1.28 × f3dB GHz. This tunable filter can be used as a much package.

Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com HMC882A Data Sheet

TABLE OF CONTENTS Features ...... 1 Typical Performance Characteristics ...... 6 Applications ...... 1 Theory of Operation ...... 9 Functional BlockDiagram ...... 1 Applications Information ...... 10 General Description ...... 1 Typical Application Circuit ...... 10 Revision History ...... 2 Evaluation Printed Circuit Board (PCB)...... 10 Specifications ...... 3 Outline Dimensions ...... 11 Absolute Maximum Ratings ...... 4 Ordering Guide ...... 11 ESD Caution ...... 4 Pin Configuration and Function Descriptions ...... 5

REVISION HISTORY 2/2019—Revision 0: Initial Version

Rev. 0 | Page 2 of 11 Data Sheet HMC882A

SPECIFICATIONS TA = 25°C, with cutoff frequency control voltage (VFCTL) varying from 0 V to 14 V, unless otherwise noted.

Table 1. Parameter Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE Passband 0 6.9 GHz

Cutoff Frequency (f3dB) 3.95 6.9 GHz REJECTION

Stopband Frequency 1.28 × f3dB GHz ≥20 dB Re-Entry Frequency ≥30 GHz ≥35 dB wideband rejection LOSS Insertion Loss 3 dB Return Loss 13 dB DYNAMIC PERFORMANCE Maximum Input Power for Linear 10 dBm Operation

Input Third-Order Intercept 41 dBm Input power (PIN) = 20 dBm, two-tone Group Delay 0.4 ns Amplitude Settling 200 ns Time to settle to minimum insertion loss, within ≤0.5 dB of static insertion loss Drift Rate 0.3 MHz/°C RESIDUAL PHASE NOISE 1 MHz Offset −165 dBc/Hz TUNING

Voltage (VFCTL) 0 14 V Cutoff Frequency Control Current ±1 µA Rated current for pin (IFCTL)

Rev. 0 | Page 3 of 11 HMC882A Data Sheet

ABSOLUTE MAXIMUM RATINGS Table 2. ESD CAUTION Parameter Rating Tuning

Voltage (VFCTL) −0.5 V to +15 V

Current (IFCTL) ±1 mA RF Input Power 27 dBm Temperature Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature for 1 Million Mean 175°C Time to Failure (MTTF) Nominal Junction Temperature 90 (Exposed Pad Temperature, TEPAD = 85°C, PIN = 10 dBm) Electrostatic Discharge (ESD) Rating Human Body Model (HBM) 1000 V Field Induced Charge Device Model 1250 V (FICDM) Moisture Sensitivity Level (MSL) Rating MSL3 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.

Rev. 0 | Page 4 of 11 Data Sheet HMC882A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NIC NIC NIC NIC NIC NIC NIC NIC 32 31 30 29 28 27 26 25

NIC 1 24 NIC NIC 2 23 NIC NIC 3 22 NIC NIC 4 HMC882A 21 NIC GND 5 TOP VIEW 20 GND (Not to Scale) RFIN 6 19 RFOUT NIC 7 18 NIC NIC 8 17 NIC 9 1 1 10 12 13 14 15 16 L NIC NIC NIC NIC NIC NIC NIC FCT V

NOTES 1. NIC = NOT INTERNALLY CONNECTED. ALL DATA SHOWN HEREIN WAS MEASURED WITH THESE PINS CONNECTED TO RF AND DC GROUND EXTERNALLY. 2. EXPOSED PAD. THE PACKAGE BOTTOM HAS AN EXPOSED

PAD THAT MUST BE CONNECTED TO RF AND DC GROUND. 17300-002 Figure 2. Pin Configuration

Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1 to 4, 7 to 13, 15 to 18, NIC Not Internally Connected. These pins are not connected internally. All data shown herein was 21 to 32 measured with these pins connected to RF and dc ground externally. 5, 20 GND Ground. Connect these pins to RF and dc ground. 6 RFIN Radio Frequency Input. This pin is dc-coupled and matched to 50 Ω. Do not apply an external voltage to this pin.

14 VFCTL Cutoff Frequency Control Voltage. This pin controls the cutoff frequency of the device. 19 RFOUT Radio Frequency Output. This pin is dc-coupled and matched at 50 Ω. Do not apply an external voltage to this pin. EPAD Exposed Pad. The package bottom has an exposed metal pad that must be connected to RF and dc ground.

GND 15nH 500Ω VFCTL 34.5pF 6.1pF 17300-003 17300-005

Figure 3. GND Interface Schematic Figure 5. VFCTL Interface Schematic

RFIN RFOUT

1.0kΩ 1.0kΩ 17300-004 17300-006 Figure 4. RFIN Interface Schematic Figure 6. RFOUT Interface Schematic

Rev. 0 | Page 5 of 11 HMC882A Data Sheet

TYPICAL PERFORMANCE CHARACTERISTICS 0 0 14V –10 7V 0V

–20 –10

–30

–40 –20

–50 RETURN LOSS (dB)

INSERTION LOSS (dB) LOSS INSERTION S22, 14V –60 –30 S22, 7V S22, 0V S11, 14V –70 S11, 7V S11, 0V –80 –40 0 5 10 15 20 25 30 0 5 10 15 20 25 30 17300-007 BROADBAND FREQUENCY (GHz) BROADBAND FREQUENCY (GHz) 17300-010 Figure 7. Insertion Loss vs. Broadband Frequency at Various VFCTL Voltages Figure 10. Return Loss vs. Broadband Frequency at Various VFCTL Voltages

0 0 14V 7V –2 0V –10

–4 –20

–6

–30 –8 S22, 14V RETURN LOSS (dB)

INSERTION LOSS (dB) LOSS INSERTION S22, 7V S22, 0V –40 S11, 14V –10 S11, 7V S11, 0V

–12 –50 1 1 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 17300-008 RF FREQUENCY (GHz) RF FREQUENCY (GHz) 17300-0 Figure 8. Insertion Loss vs. RF Frequency at Various VFCTL Voltages Figure 11. Return Loss vs. RF Frequency at Various VFCTL Voltages

0 0 +85°C +25°C –2 –40°C –10 –4

–6 –20

–8 S22, 14V RETURN LOSS (dB)

INSERTION LOSS (dB) LOSS INSERTION S22, 7V –30 S22, 0V S11, 14V –10 S11, 7V S11, 0V

–12 –40 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8

RF FREQUENCY (GHz) 17300-009 RF FREQUENCY (GHz) 17300-012 Figure 9. Insertion Loss vs. RF Frequency at Various Temperatures, Figure 12. Return Loss vs. RF Frequency at Various Temperatures, VFCTL = 7 V VFCTL = 7 V

Rev. 0 | Page 6 of 11 Data Sheet HMC882A

8 0 +85°C +85°C +25°C +25°C –40°C –40°C –4 7

–8

(GHz) 6 3dB f –12 RETURN LOSS (dB) 5 –16

4 –20 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 V (V) V (V) 17300-013 FCTL FCTL 17300-016 Figure 13. Cutoff Frequency (f3dB) vs. VFCTL at Various Temperatures Figure 16. Return Loss vs. VFCTL at Various Temperatures, 2 dB Bandwidth

1.5 500 +85°C +85°C +25°C 450 +25°C –40°C –40°C 1.4 400

350

1.3 300

250

1.2 200

150 REJECTION RATIO (dB)

1.1 TUNING SENSITIVITY (MHz/V) 100

50

1.0 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 V (V) V (V) FCTL 17300-014 FCTL 17300-017 Figure 14. Rejection Ratio vs. VFCTL at Various Temperatures; Rejection Ratio Is Figure 17. Tuning Sensitivity vs. VFCTL at Various Temperatures the Ratio of the Frequency of Which the Relative Insertion Loss Is 20 dB to f3dB

0 –130 14V +85°C 7V +25°C 0V –40°C –120 –1

–130 –2

–140

–3 PHASE NOISE (dBc/Hz) PHASE L –150 INSERTION LOSS (dB) LOSS INSERTION

–4 RESIDUA –160

–5 –170 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 10 100 1k 10k 100k 1M 10M 100M

V (V) OFFSET FREQUENCY (Hz) 17300-018 FCTL 17300-015 Figure 15. Insertion Loss vs. VFCTL at Various Temperatures Figure 18. Residual Phase Noise vs. Offset Frequency at Various VFCTL Voltages

Rev. 0 | Page 7 of 11 HMC882A Data Sheet

1.0 25 14V 14V 7V 10V 0V 20 7V 3V 0.8 0V 15

10 0.6

5

0.4 0 GROUP DELAY (nsec) PHASE SHIFT (Degrees) –5 0.2 –10

0 –15 1 2 3 4 5 6 7 8 9 0 2 4 6 8 10 12 14 16 18 20 22 24 26 17300-021 RF FREQUENCY (GHz) 17300-019 INPUT POWER (dBm) Figure 19. Group Delay vs. RF Frequency at Various VFCTL Voltages Figure 21. Phase Shift vs. Input Power (PIN) at Various VFCTL Voltages

50

45

40

35

30

25

20

INPUT IP3 (dBm) +85°C 15 +25°C –40°C 10

5

0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 V (V) FCTL 17300-020 Figure 20. Input IP3 vs. VFCTL at Various Temperatures, PIN = 20 dBm

Rev. 0 | Page 8 of 11 Data Sheet HMC882A

THEORY OF OPERATION The HMC882A is a MMIC low-pass filter that features a user- selectable pass band frequency. Varying the applied analog tuning voltage between 0 V and 14 V at VFCTL varies the f3dB frequency between 3.95 GHz and 6.9 GHz.

Rev. 0 | Page 9 of 11 HMC882A Data Sheet

APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT PRIMARY SILKSCREEN PRIMARY SOLDER MASK Figure 22 shows the typical application circuit for the 0.5oz Cu PRIMARY SIDE (LAYER 1) HMC882A. The RFIN and RFOUT pins are dc-coupled and NOMINAL ARLON OR ROGERS CORE 10MILS ±1MIL (CRITICAL) FINISHED require external, 100 pF series capacitors (C1 and C2). BOARD 0.5oz Cu L2_GND PLANE (LAYER 2) THICKNESS 0.062" PREPREG AS REQUIRED ±10% 32 31 30 29 28 27 26 25 0.5oz Cu L3_GND PLANE (LAYER 3) 1 24 370HR 2 23 0.5oz Cu SECONDARY SIDE (LAYER 4) 17300-026 3 HMC882A 22 Figure 23. Cross Sectional View of the EV1HMC882ALP5 PCB Layers 4 21 C1 C2 5 20 100pF IN 100pF OUT The PCB in this application uses RF circuit design techniques. J1 6 19 J2 7 18 Signal lines must have 50 Ω impedance and the package ground 8 17 leads and exposed pad must be connected directly to the 1 9 1 10 12 13 14 15 16 PACKAGE ground plane (see Figure 23). Use a sufficient number of via BASE V holes to connect the top and bottom ground planes. The FCTL GND J3 17300-025 evaluation PCB shown in Figure 24 is available from Analog Figure 22. Typical Application Circuit Devices, Inc., upon request. EVALUATION PRINTED CIRCUIT BOARD (PCB) Table 4. Bill of Materials for the EV1HMC882ALP5 All RF traces are routed on Layer 1 (primary side) and the Item Description remaining three layers are ground planes that provide a solid J1 to J2 PCB mount SRI Subminiature Version A (SMA) ground for RF transmission lines, as shown in Figure 23. The connector top dielectric material is Rogers 4350, which offers low loss J3 to J4 PCB mount Johnson SMA connector performance. The prepreg material in Layer 2 attaches the Isola C1, C2 Capacitor, 100 pF, 0402 370HR core layer with copper traces layers above and below the U1 HMC882A core layer. Both the prepreg material and the Isola 370HR core PCB1 08-0495982 evaluation PCB layer are used to achieve the required board finish thickness. 1 Circuit board material is Arlon 25FR or Rogers 25FR. 2 08-049598 is the raw, bare PCB identifier. Reference the EV1HMC882ALP5 when ordering the complete evaluation PCB.

1.000 2 × 0.095

2 × R.032

2.000

1.570

17300-027 Figure 24. Evaluation PCB Top Layer Outline Dimensions

Rev. 0 | Page 10 of 11 Data Sheet HMC882A

OUTLINE DIMENSIONS

DETAIL A (JEDEC 95) 5.10 0.30 5.00 SQ 0.25 PIN 1 INDICATOR 4.90 0.18

AREA PIN 1 25 32 IN D IC ATO R AR E A OP T IO N S (SEE DETAIL A) 24 1 0.50 BSC 3.75 EXPOSED 3.60 SQ PAD 3.55

17 8 0.50 16 9 0.20 MIN TOP VIEW 0.40 0.30 0.80 FOR PROPER CONNECTION OF 0.75 TOP VIEW 0.05 MAX THE EXPOSED PAD, REFER TO 0.70 THE PIN CONFIGURATION AND 0.02 NOM FUNCTION DESCRIPTIONS COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 PLANE 0.20 REF 09-12-2018-C PKG-004570 COMPLIANT TO JEDEC STANDARDS MO-220-WHHD-5 Figure 25. 32-Lead Lead Frame Chip Scale Package [LFCSP] 5 mm × 5 mm Body and 0.75 mm Package Height (CP-32-12) Dimensions shown in millimeters

ORDERING GUIDE Model1 Temperature Range Package Description Package Option HMC882ALP5E −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP] CP-32-12 HMC882ALP5ETR −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP] CP-32-12 EV1HMC882ALP5 Evaluation PCB

1 All models are RoHS compliant parts.

©2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D17300-0-2/19(0)

Rev. 0 | Page 11 of 11