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KPS, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

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KPS, X7R Dielectric, 10 – 250 VDC (Commercial Grade) Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) KPS, X7R Dielectric, 10 – 250 VDC (Commercial Grade) Overview KEMET Power Solutions (KPS) Commercial Series stacked are environmentally friendly and in compliance with RoHS capacitors utilize a proprietary lead-frame technology legislation. Available in X7R dielectric, these devices are to vertically stack one or two multilayer ceramic chip capable of Pb-Free reflow profiles and provide lower ESR, ESL capacitors into a single compact surface mount package. and higher ripple current capability when compared to other The attached lead-frame mechanically isolates the dielectric solutions. capacitor/s from the printed circuit board, therefore offering advanced mechanical and thermal stress performance. Combined with the stability of an X7R dielectric, KEMET’s Isolation also addresses concerns for audible, microphonic KPS Series devices exhibit a predictable change in noise that may occur when a bias voltage is applied. A capacitance with respect to time and voltage and boast a two chip stack offers up to double the capacitance in minimal change in capacitance with reference to ambient the same or smaller design footprint when compared to temperature. Capacitance change is limited to ±15% from traditional surface mount MLCCs devices. Providing up −55°C to +125°C. to 10 mm of board flex capability, KPS Series capacitors Benefits • −55°C to +125°C operating temperature range • Reliable and robust termination system • EIA 1210, 1812, and 2220 case sizes • DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, and 250 V • Capacitance offerings ranging from 0.1 μF up to 47 μF • Available capacitance tolerances of ±10% and ±20% • Higher capacitance in the same footprint • Potential board space savings Ordering Information C 2220 C 106 M 5 R 2 C 7186 Rated Packaging/ Case Size Specification/ Capacitance Capacitance Ceramic Voltage Dielectric Failure Rate/Design Leadframe Finish2 Grade (L" x W") Series Code (pF) Tolerance1 (VDC) (C-Spec) 1210 C = Standard Two K = ±10% 8 = 10 R = X7R 1 = KPS Single C = 100% Matte Sn See 1812 significant M = ±20% 4 = 16 Chip Stack “Packaging 2220 digits and 3 = 25 2 = KPS Double C-Spec number of 5 = 50 Chip Stack Ordering zeros 1 = 100 Options Table” A = 250 1 Double chip stacks ("2" in the 13th character position of the ordering code) are only available in M (±20%) capacitance tolerance. Single chip stacks ("1" in the 13th character position of the ordering code) are available in K (±10%) or M (±20%) tolerances. 2 Additional leadframe finish options may be available. Contact KEMET for details. One world. One KEMET © KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1020_X7R_KPS_SMD • 6/28/2021 1 Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) KPS, X7R Dielectric, 10 – 250 VDC (Commercial Grade) Packaging C-Spec Ordering Options Table Packaging/Grade Packaging Type1 Ordering Code (C-Spec)2 7" Reel (Embossed Plastic Tape)/Unmarked 7186 13" Reel (Embossed Plastic Tape)/Unmarked 7289 1 The terms "Marked" and "Unmarked" pertain to laser marking option of capacitors. All packaging options labeled as "Unmarked" will contain capacitors that have not been laser marked. The option to laser mark is not available on these devices. For more information see "Capacitor Marking". Benefits cont. • Advanced protection against thermal • Lead (Pb)-free, RoHS and REACH compliant and mechanical stress • Capable of Pb-free reflow profiles • Provides up to 10 mm of board flex capability • Non-polar device, minimizing installation concerns • Reduces audible, microphonic noise • Tantalum and electrolytic alternative • Extremely low ESR and ESL Applications Typical applications include smoothing circuits, DC/DC converters, power supplies (input/output filters), noise reduction (piezoelectric/mechanical), circuits with a direct battery or power source connection, critical and safety relevant circuits without (integrated) current limitation and any application that is subject to high levels of board flexure or temperature cycling. Markets include industrial, military, automotive and telecom. Qualification/Certification Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are referenced in Table 4, Performance & Reliability. Environmental Compliance Lead (Pb)-free, RoHS, and REACH compliant without exemptions. © KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1020_X7R_KPS_SMD • 6/28/20212 2 Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) KPS, X7R Dielectric, 10 – 250 VDC (Commercial Grade) Dimensions – Millimeters (Inches) TOP VIEW PROFILE VIEW Single or Double Chip Stack Double Chip Stack Single Chip Stack L L W H H LW LW Number EIA Metric Mounting L Length W Width H Height LW Lead Width of Chips Size Code Size Code Technique 3.50 (0.138) 2.60 (0.102) 3.35 (0.132) 0.80 (0.032) 1210 3225 ±0.30 (0.012) ±0.30 (0.012) ±0.10 (0.004) ±0.15 (0.006) 5.00 (0.197) 3.50 (0.138) 2.65 (0.104) 1.10 (0.043) Single 1812 4532 ±0.50 (0.020) ±0.50 (0.020) ±0.35 (0.014) ±0.30 (0.012) 6.00 (0.236) 5.00 (0.197) 3.50 (0.138) 1.60 (0.063) 2220 5650 ±0.50 (0.020) ±0.50 (0.020) ±0.30 (0.012) ±0.30 (0.012) Solder Reflow 3.50 (0.138) 2.60 (0.102) 6.15 (0.242) 0.80 (0.031) 1210 3225 Only ±0.30 (0.012) ±0.30 (0.012) ±0.15 (0.006) ±0.15 (0.006) 5.00 (0.197) 3.50 (0.138) 5.00 (0.197) 1.10 (0.043) Double 1812 4532 −1.00/+0.50 ±0.50 (0.020) ±0.50 (0.020) (−0.040/+0.020) ±0.30 (0.012) 6.00 (0.236) 5.00 (0.197) 5.00 (0.197) 1.60 (0.063) 2220 5650 ±0.50 (0.020) ±0.50 (0.020) ±0.50 (0.020) ±0.30 (0.012) Electrical Parameters/Characteristics Item Parameters/Characteristics Operating Temperature Range −55°C to +125°C Capacitance Change with Reference to ±15% +25°C and 0 Vdc Applied (TCC) 1Aging Rate (Maximum % Capacitance Loss/Decade Hour) 3.0% 250% of rated voltage 2Dielectric Withstanding Voltage (DWV) (5±1 seconds and charge/discharge not exceeding 50mA) 3Dissipation Factor (DF) Maximum Limit at 25°C 5%(10V), 3.5%(16V and 25V) and 2.5%(50V to 250V) 4 See Insulation Resistance Limit Table Insulation Resistance (IR) Minimum Limit at 25°C (Rated voltage applied for 120±5 seconds at 25°C) 1 Regarding Aging Rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part number specific datasheet for referee time details. 2 DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the capacitor. 3 Capacitance and dissipation factor (DF) measured under the following conditions: 1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF 120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF 4 To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits. Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as Automatic Level Control (ALC). The ALC feature should be switched to "ON." © KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1020_X7R_KPS_SMD • 6/28/20213 3 Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) KPS, X7R Dielectric, 10 – 250 VDC (Commercial Grade) Post Environmental Limits High Temperature Life, Biased Humidity, Moisture Resistance Rated DC Capacitance Dissipation Factor Capacitance Insulation Dielectric Voltage Value (Maximum %) Shift Resistance > 25 3.0 10% of Initial X7R 16/25 All 5.0 ±20% Limit < 16 7.5 Insulation Resistance Limit Table 1,000 Megohm 500 Megohm EIA Case Size Microfarads or 100 GΩ Microfarads or 10 GΩ 1210 < 0.39 µF ≥ 0.39 µF 1812 < 2.2 µF ≥ 2.2 µF 2220 < 10 µF ≥ 10 µF Electrical Characteristics Z and ESR C1210C475M5R1C Z and ESR C2220C225MAR2C C1210C475M5R1C Z and ESR 4 3 10 10 ESR ESR Z Z 3 10 2 10 2 10 1 10 1 10 0 10 0 10 Magnitude Ohms Magnitude Ohms -1 10 -1 10 -2 -2 10 10 -3 -3 10 10 0 2 4 6 8 10 0 2 4 6 8 10 10 10 10 10 10 10 10 10 10 10 10 10 Frequency (Hz) Frequency (Hz) © KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard C1020_X7R_KPS_SMD • 6/28/20214 4 Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) KPS, X7R Dielectric, 10 – 250 VDC (Commercial Grade) Electrical Characteristics cont. Z and ESR C2220C476M3R2C ESR – 1812, .10 µF, 50 V X7R 4 10 ESR vs. Frequency ESR 10 Z C1812C104K5R2C (2 Chip Stack) 2 10 C1812C104K5R1C (1 Chip Stack) 0 10 1 -2 10 Magnitude Ohms ESR (Ohms) ESR 0.1 -4 10 -6 10 0 2 4 6 8 10 10 10 10 10 10 10 0.01 Frequency (Hz) 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 Frequency (Hz) Impedance – 1812, .10 µF, 50 V X7R ESR – 1210, .22 µF, 50 V X7R Impedance vs. Frequency ESR vs. Frequency 10000 10 C1812C104K5R2C (2 Chip Stack) C1210C224K5R2C (2 Chip Stack) 1000 C1812C104K5R1C (1 Chip Stack) C1210C224K5R1C (1 Chip Stack) 100 1 10 ESR (Ohms) ESR 1 0.1 Impedance (Ohms) Impedance 0.1 0.01 0.01 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 Frequency (Hz) Frequency (Hz) Impedance – 1210, .22 µF, 50 V X7R Impedance vs.
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