VLSI Design: a New Approach

International Journal of Information Theory Volume 1, Issue 1, 2011, pp-01-04 Available online at: http://www.bioinfo.in/contents.php?id=103 VLSI Design: A New Approach

M.B. Swami and V.P. Pawar Department of Physics/Electronics/Computer Science, Maharashtra Udyagiri Mahavidyalaya, Udgir, India e-mail: [email protected]

Abstract—This paper presents the different • Cores such as PCI are available and able to Programmable Logic Array is an important building circuit integrate with relative ease Getting started in of VLSI chips and some of the FPGA architectures have FPGA design is easy. evolved from the basic Programmable Logic Array The tools are cheap (and sometimes free) for low- architectures. In this paper the new concepts of Verilog Hardware Description language is included in VLSI Design. end devices and affordable for the high end. Modern Keywords: Programmable Logic Array, FPGA, Verilog. HDL (hardware design language) environments are very powerful for creating and verifying a design. There I. INTRODUCTION is plenty of documentation available for using different vendor’s FPGA design tools and exploiting features of Very-large-scale integration (VLSI) is the process of different FPGAs. creating integrated circuits by combining thousands of Even with modern tools, the fundamentals of transistor-based circuits into a single chip. digital design still remain intact and must be Implementation is based on FPGA design flow with understood. If the fundamentals are ignored, there is a Xilinx tools which will help you to design complex good chance that your design will not work consistently digital systems using HDL and also to get experience of and will probably exhibit intermittent modes of processor and controller implementations on FPGAs. operation. Digital design with FPGAs can get complex. Field-programmable gate arrays (FPGAs) are so-called Many of the approaches used in software design can because they are structured very much like the now- also be applied to modern digital design. Keep things obsolete "gate array" form of application specific clean and modular. Make sure you have a methodology integrated circuit (ASIC). In fact, FPGAs essentially for design specification, implementation, and killed the gate array ASIC business. In the not-so- verification. Understand the basic tasks your tools must distant past, FPGAs were marketed for primarily two do for you. The topics presented in this paper are well uses: (a) for prototyping ASICs and (b) for use in understood by digital designers with several years of systems to achieve time to market knowing that they experience. Hopefully this paper will be of assistance would be replaced with an ASIC implementation at the the designers getting started in FPGA digital design earliest opportunity. With regard to this latter point, who do not have access to an experienced digital design FPGAs can be programmed on your desk top in minutes team to answer questions. while ASICs require weeks to fabricate a new design. Before the advent of programmable logic, custom As FPGA speeds increased, power consumption logic circuits were built at the board level using decreased, and prices decreased, FPGAs began shipping standard components, or at the gate level in expensive in products without any intention of replacing them application-specific (custom) integrated circuits. The with equivalent ASICs. Of course FPGAs are still good FPGA is an integrated circuit that contains many (64 to at prototyping ASICs and they are still used that way. over 10,000) identical logic cells that can be viewed as The concepts and new approach of Verilog hardware standard components. Each logic cell can description language is included [1]. independently take on any one of a limited set of personalities. The individual cells are interconnected II. FPGA by a matrix of wires and programmable switches. A user's design is implemented by specifying the simple FPGA devices are one of the modern technologies that logic function for each cell and selectively closing the are changing the electronic industry. FPGAs are riding switches in the interconnect matrix. The array of logic the same integrated circuit process curves as processors cells and interconnects form a fabric of basic building and memories and keep getting larger, faster, and blocks for logic circuits. Complex designs are created cheaper. FPGAs are now common in low and mid by combining these basic blocks to create the desired volume embedded products where they offer the circuit. following advantages: The logic cell architecture varies between different • Fast time to market device families. Generally speaking, each logic cell • Better integration combines a few binary inputs (typically between 3 and • In system programmability 10) to one or two outputs according to a Boolean logic • FPGAs tend to have long life cycles and are function specified in the user program. In most usually replaced with pin compatible parts families, the user also has the option of registering the

International Journal of Information Theory Volume 1, Issue 1, 2011 International Journal of Information Theory Volume 1, Issue 1, 2011, pp-01-04 Available online at: http://www.bioinfo.in/contents.php?id=103

combinatorial output of the cell, so that clocked logic Need of FPGAs: By the early 1980’s large scale can be easily implemented. The cell's combinatorial integrated circuits (LSI) formed the back bone of most logic may be physically implemented as a small look-up of the logic circuits in major systems. Microprocessors, table memory (LUT) or as a set of multiplexers and bus I/O controllers, system timers etc were gates. LUT devices tend to be a bit more flexible and implemented using integrated circuit fabrication provide more inputs per cell than multiplexer cells at technology. Random “glue logic” or interconnects were the expense of propagation delay. Field Programmable still required to help connect the large integrated means that the FPGAs function is defined by a user's circuits in order to: program rather than by the manufacturer of the device. • Generate global control signals (for resets etc.) A typical integrated circuit performs a particular • Data signals from one subsystem to another function defined at the time of manufacture. In sub system. contrast, the FPGAs function is defined by a program Systems typically consist of few large scale written by someone other than the device integrated components and large number of SSI (small manufacturer. Depending on the particular device, the scale integrated circuit) and MSI (medium scale program is either 'burned' in permanently or semi- integrated circuit) components. permanently as part of a board assembly process, or is Initial attempt to solve this problem led to loaded from an external memory each time the device is development of custom ICs which were to replace the powered up. This user programmability gives the user large amount of interconnect. This reduced system access to complex integrated designs without the high complexity and manufacturing cost, and improved engineering costs associated with application specific performance. However, custom ICs have their own integrated circuits. Individually defining the many disadvantages. They are relatively very expensive to switch connections and cell logic functions would be a develop, and delay introduced for product to market daunting task. Fortunately, this task is handled by (time to market) because of increased design time. special software. The software translates a user's There are two kinds of costs involved in development schematic diagrams or textual hardware description of Custom ICs: language code then places and routes the translated • cost of development and design design. Most of the software packages have hooks to • cost of manufacture allow the user to influence implementation, placement Therefore the custom IC approach was only viable and routing to obtain better performance and utilization for products with very high volume, and which were not of the device. Libraries of more complex function time to market sensitive. FPGAs were introduced as an macros (e.g. adders) further simplify the design process alternative to custom ICs for implementing entire by providing common circuits that are already system on one chip and to provide flexibility of optimized for speed or area [2]. reprogram ability to the user. Introduction of FPGAs resulted in improvement of density relative to discrete III. FPGA ARCHITECTURE SSI/MSI components (within around 10 xs of custom A field-programmable gate array (FPGA) is a ICs). Another advantage of FPGAs over Custom ICs is semiconductor device that can be configured by the that with the help of computer aided design (CAD) customer or designer after manufacturing—hence the tools circuits could be implemented in a short amount name "field-programmable". FPGAs are programmed of time (no physical layout process, no mask making, using a logic circuit diagram or a source code in a no IC manufacturing)[3]. hardware description language (HDL) to specify how It consists of an array of configurable logic blocks the chip will work. They can be used to implement any (CLBs), I/O pads, and routing channels. Generally, all logical function that an application-specific integrated the routing channels have the same width (number of circuit (ASIC) could perform, but the ability to update wires). Multiple I/O pads may fit into the height of one the functionality after shipping offers advantages for row or the width of one column in the array. many applications. An application circuit must be mapped into an FPGAs contain programmable logic components FPGA with adequate resources. While the number of called "logic blocks", and a hierarchy of reconfigurable CLBs and I/Os required is easily determined from the interconnects that allow the blocks to be "wired design, the number of routing tracks needed may vary together"—somewhat like a one-chip programmable considerably even among designs with the same amount breadboard. Logic blocks can be configured to perform of logic. (For example, a crossbar switch requires much complex combinational functions, or merely simple more routing than a systolic array with the same gate logic gates like AND and XOR. In most FPGAs, the count.) Since unused routing tracks increase the cost logic blocks also include memory elements, which may (and decrease the performance) of the part without be simple flip-flops or more complete blocks of providing any benefit, FPGA manufacturers try to memory. provide just enough tracks so that most designs that will fit in terms of LUTs and IOs can be routed. This is

VLSI Design: A New Approach ♦ determined by estimates such as those derived from this architecture is the planar or domain-based switch Rent's rule or by experiments with existing designs[4]. box topology. In this switch box topology, a wire in A classic FPGA logic block consists of a 4-input lookup track number one connects only to wires in track table (LUT), and a flip-flop, as shown in Fig. 1. In number one in adjacent channel segments, wires in recent years, manufacturers have started moving to 6- track number 2 connect only to other wires in track input LUTs in their high performance parts, claiming number 2 and so on. The Fig. 3 illustrates the increased performance. connections in a switch box.

Fig. 1: Typical Logic Block There is only one output, which can be either the registered or the unregistered LUT output. The logic block has four inputs for the LUT and a clock input. Since clock signals (and often other high-fanout signals) are normally routed via special-purpose dedicated routing networks in commercial FPGAs, they and other signals are separately managed. For this example architecture, the locations of the FPGA logic Fig. 3: Switch Box Topology block pins are shown in Fig. 2. Modern FPGA families expand upon the above capabilities to include higher level functionality fixed into the silicon. Having these common functions embedded into the silicon reduces the area required and gives those functions increased speed compared to building them from primitives. Examples of these include multipliers, generic DSP blocks, embedded processors, high speed IO logic and embedded memories. FPGAs are also widely used for systems validation including pre-silicon validation, post-silicon validation, and firmware development. This allows chip

companies to validate their design before the chip is Fig. 2: Logic Block Pin Locations produced in the factory, reducing the time to market. Each input is accessible from one side of the logic Field Programmable Gate Arrays are two dimensional block, while the output pin can connect to routing wires array of logic blocks and flip-flops with a electrically in both the channel to the right and the channel below programmable interconnections between logic blocks. the logic block. Each logic block output pin can connect The interconnections consist of electrically to any of the wiring segments in the channels adjacent programmable switches which is why FPGA differs to it. from Custom ICs, as Custom IC is programmed using Similarly, an I/O pad can connect to any one of the integrated circuit fabrication technology to form metal wiring segments in the channel adjacent to it. For interconnections between logic blocks [5]. example, an I/O pad at the top of the chip can connect to any of the W wires (where W is the channel width) in IV. VERILOG HARDWARE DESCRIPTION the horizontal channel immediately below it. Generally, LANGUAGE the FPGA routing is unsegmented. That is, each wiring segment spans only one logic block before it terminates Originally a modeling language for a very efficient in a switch box. By turning on some of the event-driven digital logic simulator later pushed into programmable switches within a switch box, longer use as a specification language for logic synthesis. Now paths can be constructed. For higher speed interconnect, one of the two most commonly-used languages in some FPGA architectures use longer routing lines that digital hardware design (VHDL is the other) virtually span multiple logic blocks. Whenever a vertical and a every chip (FPGA, ASIC, etc.) is designed in part using horizontal channel intersect, there is a switch box. In one of these two languages combines structural and this architecture, when a wire enters a switch box, there behavioral modeling styles. are three programmable switches that allow it to Verilog-AMS is a derivative of the verilog connect to three other wires in adjacent channel hardware description language. It include analog and segments. The pattern, or topology, of switches used in mixed signal extensions(AMS) in order to define the

behavior of analog and mixed –signal systems. It On this web page analog, mixed signal and system extends the event-based simulators loops of designers can find relevant information on the Verilog- Verilog/System Verilog/VHDL, by a continuous-time AMS, from activities to technical data on how to better simulator, which solves the differential equations in use these extensions. analog domain. Both domains are coupled analog events can trigger digital actions and vice versa. V. CONCLUSION Verilog-AMS benefits users by allowing them to describe and simulate analog and mixed signal designs FPGA is an array of regular logic blocks, which may be using a top-level design methodology as well as the configured to operate within a particular logical traditional bottom up approaches. The Verilog-AMS function. Digital logic functions can be synthesized standard supports analog and mixed signal designs at onto the logic blocks of the FPGA and it is then three levels: transistor/gate, transistor/gate- programmed with the configuration information to RTL/behavioral, and mixed transistor/gate- perform that function. The FPGA development stages RTL/behavioral circuit levels. Moreover, Verilog-AMS are design, simulation, synthesis, and implementation. provides powerful structural and behavioral modeling The design process involves converting the capabilities for systems in which the effects of, and requirements into a format that represents the desired interactions among, different disciplines like electrical, digital function(s). Verilog HDLs generally offer the mechanical and thermal are important [6]. greatest design flexibility. Verilog-AMS provides powerful structural and behavioral modeling capabilities for systems in which the effects of, and interactions among, different disciplines are discussed.

REFERENCES [1] EVAT (EmBlitz Varsity Associate Trainee) Program VLSI Design (VERILOG), Everest Infocom Pvt. Ltd., Banglore, India 2001. [2] www.embedded.com [3] Cliff Brake, “Digital Design Basics”, p 11–21, 2002. [4] www.andraka.com [5] Field Programmable Gate Array – Wikipedia, the free encyclopedia [6] Verilog-AMS – Wikipedia, the free encyclopedia.

International Journal of Information Theory Volume 1, Issue 1, 2011