Logic Directory Programmable
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coverstory By Brian Dipert, Technical Editor Programmable-Programmable- he umbrella term “logic devices” subdivides into several categories: discrete logic, simple and logiclogic Tcomplex PLDs, FPGAs, and standard- and cus- tom-cell ASICs. FPGAs, SPLDs/PALs, and CPLDs are all programmable-logic devices, although their inter- nal architecture implementations differ. Programmable-logic devices are the fastest growing segment of the logic-device family, for two funda- directorydirectory mental reasons. For one thing, their ever-increasing per-device logic-gate count “gathers up”functions that might otherwise spread over a number of discrete-log- ic and memory chips, improving end-system size, power consumption, performance, reliability, and cost. Equally important, you can in a matter of seconds or THE SECOND ANNUAL EDN PLD minutes configure and, in many cases, reconfigure these devices at your workstation or in the system-as- DIRECTORY HIGHLIGHTS THE sembly line. This capability provides powerful flexi- bility to react to last-minute design changes, to pro- ARCHITECTURES AVAILABLE FOR YOUR totype ideas before implementation, and to meet time-to-market deadlines driven by both customer NEXT DESIGN. FIND OUT WHAT’S NEW, need and competitive pressures. Programmable-logic devices lack the long lead- WHAT’S OBSOLETE, AND WHAT’S times, up-front NRE charges, minimum-order quan- tities, and inventory complexity of ASICs. As per-gate EVOLVEDEVOLVED ININ PALS,PALs, PLDS,PLDS, ANDAND FPGAFPGAS.S. cost decreases and the number of gates per component increases, programmable-logic devices are making sig- nificant inroads into gate-array-ASIC territory. Sys- AND CHECK THIS OUT: tem designers and manufacturers are only beginning WE’VE POSTED COMPREHENSIVE to explore and exploit in-system reprogrammability, either to correct errors and upgrade functions once the TABLES OF DEVICES AND FEATURES end system is in users’ hands or to use a fixed number IN THE WEB VERSION OF THIS of logic gates to implement multiple functions. This ARTICLE AT technique is known as “reconfigurable computing.” The programmable-logic industry is relatively www.ednmag.com young and highly varied. Just as companies use pro- grammable logic’s flexibility to differentiate them- selves, a number of semiconductor vendors have de- veloped unique PLDs and FPGAs to address an intersection of performance, power, integration, and cost targets. This diversity is perhaps the most com- plex challenge facing you, because, in many cases, you must deeply understand each programmable-logic ar- chitecture before you can select one that meets your needs. The market leaders are increasingly driving de- facto industry standardization, thus simplifying the se- lection task. Highly complex programmable-logic architectures rely extensively on design-automation software to pro- duce optimum results for end-system parameters. Pri- Image by Chinsoo Chung 36 edn | August 30, 2001 www.ednmag.com FPGAs Actel ........................................38 oritizing these parameters depends on the applica- language approaches provide the additional bene- tion. Often, for example, designs targeting low pow- fit of enabling design reuse. Yet, just as with high- Agere Systems......................38 er, high performance, or minimal gate count differ level versus assembly-language software develop- Altera ......................................40 significantly from each other. Ideal design-automa- ment, high-level logic design decreases development Atmel ......................................42 tion software: time but produces lower performance and less effi- c isolates you from the internal device-architec- cient gate usage. QuickLogic ............................42 ture details, Another technique that has become more popu- Triscend..................................44 c enables you to prioritize your design goals and lar over the last few years involves leveraging the al- Xilinx........................................44 optimizes the software’s operation based on ready-completed designs, or IP (intellectual prop- the order you choose, erty), of another company instead of designing your PALs & PLDs c efficiently uses silicon resources, own circuits. The convergence of accelerating sili- c requires little to no manual intervention, con gate count, increasing system functions and Altera ......................................46 c quickly compiles and recompiles a design, and standardization, and faster time-to-market require- Atmel ......................................48 c minimizes or eliminates timing and pinout ments is driving this approach. Perhaps the biggest changes between compilations. IP hurdles still to overcome are legal rather than Cypress Semiconductor....48 The technical superiority of a programmable-log- technical, although robust test and verification Integrated Circuit ic vendor’s silicon products and the comprehen- suites and core interoperability among vendors and Technology (ICT) ................50 siveness of the vendor’s documentation are not the among silicon architectures are important. Lattice Semiconductor ......50 only determinants of the vendor’s success. Equally Although “pure” programmable-logic devices STMicroelectronics ............52 important are the depth and breadth of the com- dominate industry shipments, this fast-moving pany’s internally developed and third-party soft- product category is evolving in several intriguing di- Xilinx........................................52 ware-tool support. rections. Vendors historically known as program- Burgeoning amounts of on-chip RAM and sin- mable-logic suppliers are adding ASIC-plus-pro- Embedded programmable- gle-die ASIC/programmable-logic hybrid devices, grammable-logic hybrid devices to their portfolios logic cores along with predictable Moore’s Law integration in an attempt to optimally address the complicated trends, are contributing to the explosion of effective task of balancing power, performance, and cost. gate counts. These factors are finally making a real- ASIC vendors and foundries, too, are developing hy- Actel ........................................54 ity of the long-held vision of systems on chips. To brid-device capabilities, as are standard-product Adaptive Silicon ..................54 exploit silicon capability in a time frame that still suppliers, such as network-processor manufactur- Agere Systems......................56 meets time-to-market requirements, many design- ers. And IP developers are now offering not only ers are turning from traditional low-level state-ma- “soft” logic cores that implement specific functions Atmel ......................................56 chine and schematic-entry synthesis to high-level in programmable logic but also “hard” embedded Integrated Circuit languages, such as VHDL and Verilog, and even to programmable-logic cores that can implement any Technology (ICT) ................56 traditional software languages, such as C. These new function you desire. FOR MORE INFORMATION... For more information on products such as those discussed in this article, go to www.ednmag.com. When you contact any of the following manufacturers directly, please let them know you read about their products in EDN. Actel Atmel QuickLogic OTHER COMPANIES MEN- Philips 1-408-739-1010 1-408-441-0311 1-408-990-4000 TIONED IN THIS ARTICLE www.philips.com www.actel.com www.atmel.com www.quicklogic.com ARM Synopsys Enter No. 322 Enter No. 326 Enter No. 330 www.arm.com www.philips.com Chartered Semiconductor TSMC (Taiwan Semicon- Adaptive Silicon Cypress Semiconductor STMicroelectronics www.csminc.com ductor Manufacturing Co) 1-408-399-8900 1-408-943-2600 1-781-861-2650 Chip Express www.tsmc.com www.adaptivesilicon.com www.cypress.com www.st.com www.chipexpress.com UMC Enter No. 323 Enter No. 327 Enter No. 331 Clear Logic www.umc.com www.clear-logic.com Agere Systems Integrated Circuit Tech- Triscend IBM SUPER INFO NUMBER 1-610-712-6011 nology (ICT) 1-650-968-8668 www.ibm.com For more information on www.agere.com 1-408-434-0678 www.triscend.com LSI Logic the products available Enter No. 324 www.ictpld.com Enter No. 332 www.lsilogic.com from all of the vendors list- Enter No. 328 MIPS Technologies ed in this box, go to www.mips.com Altera Xilinx www.ednmag.com, click 1-408-544-7000 Lattice Semiconductor 1-408-559-7778 Motorola www.mot.com on the Reader Service link, www.altera.com 1-503-268-8000 www.xilinx.com and enter no. 334. Enter No. 325 www.latticesemi.com Enter No. 333 National Semiconductor Enter No. 329 www.national.com www.ednmag.com August 30, 2001 | edn 37 programmable-logicdirectory FPGAs ACTEL result in the parts’ use in your system board, and, because antifuse You probably know Actel AT A GLANCE high-volume consumer creation is irreversible, in-system recon- as an antifuse-based-FPGA e Actel’s antifuse products. figuration is impossible. In response to supplier, but the company technology delivers The company’s first- customers’ requests for a more flexible is broadening its focus to numerous benefits at generation PLICE (pro- FPGA technology (in the lab, the manu- include other programma- the expense of limited grammable low-imped- facturing line, and the field) that retains ble-logic technologies, as flexibility. ance circuit element) anti- antifuse’s fundamental benefits, Actel well as IP. Four main e The company’s sec- fuse-technology approach first partnered with and then acquired device families form the ond-generation anti- employs a metal-to-metal Gatefield Corp and its ProASIC line of fuse