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What Input-Language Is the Best Choice for High Level Synthesis (HLS)?

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What Input-Language Is the Best Choice for High Level Synthesis (HLS)? 49 What Input-Language is the Best Choice for High Level Synthesis (HLS)? Chair: Dan Gajski – UC Irvine, Irvine CA Organizers: Todd Austin - Univ. of Michigan, Ann Arbor, MI Steve Svoboda - Cadence Design Systems, Inc., San Jose, CA PANEL SUMMARY expressed directly in the C/C++ specification, SystemC transaction level models with explicit hardware parallelism As of 2010, over 30 of the world’s top semiconductor / can be generated automatically by the compiler to meet systems companies have adopted HLS. In 2009, SOCs the need. tape-outs containing IPs developed using HLS exceeded In contrast to application accelerators, control blocks 50 for the first time. Now that the practicality and value of interact with the environment and require cycle level timing HLS is established, engineers are turning to the question control. Integrated solutions for designing both application of “what input-language works best?” The answer is critical because it drives key decisions regarding the accelerators and control blocks with an abstraction level significantly above RTL/SystemC are starting to emerge. tool/methodology infrastructure companies will create around this new flow. ANSI-C/C++ advocates cite ease- Michael McNamara - Cadence Design Systems, of-learning, simulation speed. SystemC advocates make Inc., San Jose, CA similar claims, and point to SystemC's hardware-oriented features. Proponents of BSV (Bluespec SystemVerilog) Any suitable language for HLS must adequately describe claim that language enhances architectural transparency the untimed and timed functionality, and enable synthesis and control. To maximize the benefits of HLS, companies technology to produce high-quality RTL for datapath and must consider many factors and tradeoffs. control logic. However, the promise of HLS goes far PANELIST PRESENTATIONS beyond just improving the productivity of a single engineer, producing 10x more complex logic at the push of a button. The greater challenge for the industry is Vinod Kathail - Synfora, Inc., Mountain View, CA shortening the time to market for delivering integrated hardware and software in the form of complex SoCs. This SoCs designed today have about 70% reused IP larger view entails a language that not only enables combined with new IP to add differentiation and efficient logic design, but one that must also support early features. New blocks are either application accelerators or software development. Industry-standard SystemC is that control blocks. Application accelerators implemented in language, having earned broad support for software hardware provide performance advantages and power development, as well as multi-vendor support for HLS. savings relative to software implementations and include video, imaging and wireless functions (e.g. H.264 codec or Early software development requires high performance wireless modem). These functions are often designed virtual prototype simulation, and must support an eco initially as C/C++ algorithms to prove functionality and take system of interoperable models for processors and other advantage of simulation performance. standard components. The need for a methodology based on HLS that unifies HLS and VP adds force to SystemC as Implementing these functions directly from C/C++ provides the language choice. the highest abstraction and productivity advantage. Efficient implementation from C/C++ algorithms requires a Moreover, verification remains the largest cost for high quality parallelizing, optimizing compiler to achieve producing new SoCs, and performing verification at the area, performance and power requirements. All the transaction level speeds finding bugs and reduces necessary hardware details can be inferred from the code iteration time to fix and re-verify. Realizing these benefits and design constraints. Production-quality tools are today requires modeling the entire design at the higher level of being used for complex, real-life designs. abstraction, and making HLS adoptable for all IP. SystemC is the only language that has proven itself up to System level modeling and early software development these challenges. require high level models which reflect the parallelism of the hardware design. Although this parallelism is not Rishiyur Nikhil - Bluespec, Inc., Waltham, MA Copyright held by the author/owner(s). DAC 2010, June 13-18, 2010, Anaheim, California, USA Copyright 2010 ACM 978-1-4503-0002-5/10/06 857 49 For High Level Synthesis to make a dent in SoC design has become a standard for a large number of hardware productivity, it must be universal, not narrowly aimed at a designs. That fact outweighs any other more esoteric few isolated IP blocks. This is because architectural considerations. exploration, performance analysis and verification today involve running real software processing and/or real data Andres Takach - Mentor Graphics Corp., Wilsonville, traffic (often under real operating systems), on a diversity OR of configurations representing full SoCs. Each The main benefits of HLS are faster RTL creation and configuration is a mixture of components (models, faster verification. The key to those benefits is raising the testbenches, IP implementations) at different levels of level of abstraction of the input source by cleanly abstraction, so the language has to be universal to separating the untimed core computation from the express this diversity. hardware interface so that many different hardware architectures can be generated from the same source. Further, for meaningful evaluation and verification, one ANSI C++ is the most widely used modeling language for needs both sufficient detail and sufficient execution speed. algorithms at a high level of abstraction. It provides powerful class and template mechanisms to model bit- This combination is only available with FPGA-based accurate data types, modular encapsulation and emulation; software simulation is often too slow by three or parameterization. Sequential specifications in C++ are more orders of magnitude. This implies universal compact, easiest to debug and verify, fastest to simulate, synthesizability, with no retreat into "synthesizable and provide maximal flexibility to HLS for creating subsets" that sacrifice expressive power. optimized architectures and hardware interfaces. Finally, architecture is central---the first-order determinant SystemC leverages on the strengths of C++ as a language of quality and not just an implementation detail. and adds explicit modeling of hardware interfaces and concurrency to enable integration and verification of highly Algorithms are never designed in isolation, but always with complex systems that include arbiters, busses and legacy respect to particular architectures (cost models). Unlike RTL. SystemC TLM modeling provides designers with a software design, where architecture is fixed and methodology to separate untimed core computation from algorithms are created for that context, in hardware cycle-accurate interface specifications. The best choice for design, algorithm and architectures are jointly created. a language enables and encourages specifications at a Hence, high-level hardware design requires transparent high-level of abstraction, it is widely used, it has a good and flexible expression of this joint development. eco system around it and it is based on mature standards. John Sanguinetti - Forte Design Systems, San Jose, Devadas Varma - AutoESL Design Technologies, CA Inc., San Francisco, CA The first requirement for an HLS input-language is that it Productivity, QoR, ease of verification and reuse are be one that people have already used when writing reasons designers have gravitated towards using HLS. algorithms intended to be implemented in hardware. For Language support is relevant only insofar it can help this requirement, either C or a closely related language is achieve these goals and also be able to enable system- the only real choice. The starting point for the vast majority and chip- designers. It follows then that HLS tools should of algorithms to be implemented in hardware is C. support a wider range of languages as well as a large set of language constructs within each language. Until The second requirement is the language must support an recently all HLS Tools have forced users to choose a abstraction mechanism. If the language has only one level language or overly restrict their use of the language(s); of abstraction, it will not be applicable to a large variety of this is also why previous generation HLS tools have failed hardware designs. Satisfying this requirement requires an to deliver on the aforementioned goals of QOR and object-oriented language (like C++). productivity. The third requirement is the language must support a Of equal importance is the fact that HLS is also a bridge “hardware level of abstraction”, providing a link between when it comes to connecting embedded design, high-level source code and low-level implementation. In accelerated computing, faster verification and hardware / essence, this means supporting a representation that software co-design. In this context, the language support maps directly to RTL, and provides a seamless hierarchy and breadth of constructs must exceed what is traditionally of abstraction levels up from RTL. The elements required supported for hardware designs alone. These limitations - for this are hierarchy, concurrency, and bit-accuracy. of all past HLS Tools - in language support and language Without all three elements, a language cannot represent coverage have hindered the widespread adoption of HLS. all the necessary aspects of hardware design. This third AutoESL's position has always been that limitations in requirement can be met by a class library in C++, (which is language support and language coverage is a hindrance SystemC). There have been other C++ class libraries that to the widespread adoption of HLS, which is why we have could be equally adequate for high-level hardware design, chosen to support the widest choice of languages and but SystemC has all the necessary features, and already constructs. 858.
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