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Home , FLOPS, Itanium, Montecito (processor)

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AAlleexxaannddeerr GGrruuddiinnsskkii Business Solution Specialist Corporation IInntteell’’ss IIttaanniiuumm ppllaattffoorrmm

ó Top 500 lists: Intel leads with 84 ® 2-based systems ó Continued growth bin MSS: Itanium processors ó RISC to Itanium migration – enterprise and HPC

RISC and IA System Systems in HPC Top500 Revenue MSS by Architecture Fiirst tiime to pass RISC Fiirst tiime to pass top RISC arch

t Itanium ® s 120

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n 100 * o

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Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 b 20

02 02 02 02 03 03 03 03 m u 0 N Source: IDC Server Tracker Q4 ‘03 Nov'02 Jun'03 Nov'03 Jun'04 Nov'04

* Other names and brands may be claimed as the property of others 2 CCoommmmiittmmeenntt ttoo IIttaanniiuumm®® AArrcchhiitteeccttuurree

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Heavy investment reflects deep commitment

* Other names and brands may be claimed as the property of others 3 IIttaanniiuumm®® AArrcchhiitteeccttuurree PPoossiittiioonniinngg FFooccuusseedd o onn t hthee a apppplilcicaatitoionnss t ytyppicicaallyly s seerrvveedd b byy R RISISCC, ,t atarrggeetitningg:: ¥ General RISC migration ¥ Large SMP/ ¥ High performance (2-512P+) mainframe-class (HPC) Leading capabilities in Intel’s Cost effective alternative to server product line proprietary RISC ó Higher performance & scalability driven ó Outstanding price/performance 1 by core architectural differences, e.g. – Top TPC-C performance on *, − EPIC technology Windows*,HP-UX*, Oracle*, & SQL* − Massive on die resources – 30% better $/tpmC than RISC1 − True 64-bit addressability – Huge advance in performance & ó Greater RAS capabilities platform features coming on − Designed for 99.999%+ uptime ó Greater choice − Machine Check Architecture, bad data – System vendors containment, reliability,… – Operating systems ó Offered in high end systems from leading – Software applications enterprise hardware vendors – Continued strong ecosystem growth − HP* 2 - 128P 256*

Focused on replacing RISC, complementary to Intel® ™ Product plans, descriptions, and dates are estimates only and subject to change without notice. *Other names and brands may be claimed as the property of others. Performance tests and ratings are measured using specific systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance other sources of information to evaluate the performance of systems or components they are *c oOntshiedre nrianmg epsu racnhda sbirnagn. dFso mr mayo rbee i ncflaoirmmeadti oans othne p perrofopremrtayn ocfe o th1ers tests and on the performance of Intel products, reference www.intel.com/procs/perf/limits.htm or call (U.S.) 1-800-628-8686 or 1-916-356-3104 details 4 * Other names and brands may be claimed as the property of others 5 6644--BBiitt AAddddrreessssiinngg –– HHooww bbiigg iiss iitt??

32-bit Addressing - 1 cm - one CD cover height

64-bit Addressing - 429496 km - distance between 64-bit Earth and Moon

32-bit . 2^32 = 4,294,967,296 2^64 = 18,446,744,073,709,551,616

* Other names and brands may be claimed as the property of others 6 PPaarraalllleelliissmm

Performance MULTI-CORE e

c n a Throughput m r Scalability o f r

e SINGLE-CORE P

2000 2004 2008+ FORECAST AAnn IInndduussttrryy IInnfflleeccttiioonn PPooiinntt * Other names and brands may be claimed as the property of others 7 LLoonngg TTeerrmm GGooaall:: 11MM TTrraannssaaccttiioonnss ppeerr A MMiinnuuttee TTooddaayy IInn 22000077

With planned performance improvements, a 4-way Itanium®-based server in ‘07 could deliver equivalent OLTP of a current 64-way system, delivering dramatically ó Lower TCO ó Lower power consumption ó Higher density

Shown are representations of 64-way system (today) and 4-way system (2007). Not to scale.

All products, dates, comparisons, and information are preliminary and subject to change without notice. * Other names and brands may be claimed as the property of others 8 IIttaanniiuumm®® AArrcchhiitteeccttuurree IInnnnoovvaattiioonnss

2004 & Prior Enhancements 2005 Planned Enhancements EPIC architecture Dual-core; Multi-threading Enhanced Machine Check Architecture Virtualization FMAC for floating-point leadership Dynamic Performance Boost (Foxton) Largest on-die resources for demanding Demand Based Switching (DBS) workloads PCI Express, DDR II Enhanced System Bandwidth, cache reliability, and processor performance

Future Enhancements Common platform architecture with Intel® Xeon™ processor family Multi-core Enhanced Virtualization Enhanced I/O, memory & RAS

Innovations deliver Intel’s highest performance, reliability and scalability solutions for the enterprise

All products, dates, comparisons, and information are preliminary and subje*c Ot tthoe rc nhaamnegse a wndi tbhroanudt sn moatiyc ebe. claimed as the property of others 9 IInnttrroodduucciinngg DDuuaall--CCoorree aanndd MMuullttii--TThhrreeaaddiinngg

Itanium® 2 9M Processor Die Montecito Processor Die

Core Core Core

12 MB L3 12 MB L3 9 MB L3 Cache Cache Cache

Arbiter -

System Bus System Bus

ó Dual-Core – 2 Processor cores per physical package each with independent L3 cache ó Multi-Threading Technology – 2 Threads active per Core (4 per Socket) – High CPU utilization for multithreaded server applications

Montecito hardware-enhanced thread-level parallelism with 2 cores in a single package * Other names and brands may be claimed as the property of others 10 Montecito

Core Core MMoonntteecciittoo SSttaattuuss Core 1 Core 2 ó Montecito: Next Itanium® Processor Family product L3 Cache L3 Cache after Madison-9M

– Dual core, Multi-threading, 24MB cache System Bus – Platform compatible with Itanium® 2 processor – First 1.72 billion transistors processor – Significant performance jump with lower power – 1.5-2x over Madison-9M ~ 2.9 – 100W – Demo’d last year, first samples were in Sept’04 ~ 1.7 ~ 1.5 – OEMs currently testing Montecito platforms – OEMs currently testing Montecito platforms 1 Performance – Seeding programs – Montecito shipping in 1H 2006

4P/4S TPC-C Relative Performance Intel® Itanium® 2 ó Montecito also brings new technologies Intel Itanium 2-6M – Foxton: Performance boost while maintaining power Intel Itanium 2 - 9M 130W – Multi-threading Montecito – Vanderpool: Virtualization – Reliability with Pellston, more hardware error correction 100W – Demand Based Switching: Server power savings Power

* Other names and brands may be claimed as the property of others 11 C AA NNeeww AArrcchhiitteeccttuurraall AApppprrooaacchh

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* Other names and brands may be claimed as the property of others 12 Enables running separate production and development VViirrttuuaalliizzaattiioonn UUssaaggee MMooddeellss environments on same server

Workload Isolation Workload Consolidation

App1 App2 App1 App2 App1 App2 App1 App2

OS OS OS OS1 OS2 OS1 OS2

HW VMM HW1 HW2 VMM HW HW Workload Migration Workload Embedding

App App App1 App2

OS OS OS1 OS2 VMM VMM VMM VMM VMM

HW1 HW2 HW1 HW2 HW

* Other names and brands may be claimed as the property of others 13 AAddvvaannttaaggee ooff HHWW vviirrttuuaalliizzaattiioonn

Dramatic Benefits Expected VM1 VM2 VM3 Increased Robustness VT-enabled VMM VT-enabled VMM ó Reduced Complexity ó Minimizing SW conflict CPU Virtualization Improved Flexibility ó Simplify VMM development ó Standard interfaces MCH MMCCHH ó Support legacy environment Memory Enhanced Functionality x x I x x

8 Virtualization 8 8 8 M

Support for latest HW capability

• P • D P P P C C C C I I I I

E E E E Better Performance Boot Boot ó Reduce emulation overhead LLeeggaaccyy I/O Sub-system ó Virtualization ó Access to physical resource

InIntteel ld drriviviningg v virirttuuaalilzizaattioionn t teecchhnnoolologgyy a accrroossss a all ls seerrvveerr p plalattffoorrmmss * Other names and brands may be claimed as the property of others 14 VViirrttuuaalliizzaattiioonn IIssssuueess • Virtualized OS’s “De-Privileged” • Ring-0 code run in Rings 1- 3 Apps AAppppss AAppppss Ring AAppppss Apps Apps • Results in: 1 - 3 … … OS • Excessive faulting OS OS Min • Ring compression • Manageability and stability issues Ring Virtual Layer 0 • Virtualization SW operates in Ring-0 Platform Hardware • Traditional OS domain

Virtaualization SW uses a combination of emulation, dynamic patching, and to work around these problems

* Other names and brands may be claimed as the property of others 15 -- VViirrttuuaalliizzaattiioonn EExxtteennssiioonnss

ó New CPU execution Apps Apps Apps mode Apps … Apps Apps 3D Apps Apps Apps – OS’s run at expected privilege levels – Enables new privilege level (0P) 0D OS Min OS OS for Monitor

ó HW-based mode 0P transition Virtualization Layer – Programmable VM transition triggers to streamline Platform Hardware – Excessive trapping eliminated by design – Address compression eliminated by design

ó New instructions to support entry, exit, configuration and maintenance ó Memory protection within the CPU

* Other names and brands may be claimed as the property of others 16 CCuurrrreenntt OOvveerrhheeaadd

* Other names and brands may be claimed as the property of others 17 IIttaanniiuumm VViirrttuuaalliizzaattiioonn TTeecchhnnoollooggyy n o i e t r a a z i w l t f a o u t r S i V n e r o i t u t m a c u z i i e l t n i a a h t u I t c r r i A V

Multiple guest OSes on a single processor

* Other names and brands may be claimed as the property of others 18 IInntteell''ss CCoommpprreehheennssiivvee AApppprrooaacchh ttoo PPoowweerr MMaannaaggeemmeenntt Intel Power Tools Silicon Advances • Demand Based Switching • Power Calculator • Process technologies • Power Monitor • Materials • Datacenter Framework • Circuit design • • Packaging Platform & Architectural Advances

• Multi-core Processors • Hyper-Threading Technology • Low power/high speed memory • Platform/architectural flexibility • Enhanced Utilization (virtualization) • Software Optimization Whitepaper http://www.intel.com/business/bss/infrastructure/enterprise/power_thermal.pdf All dates and products specified are for planning purposes only and are subject to change.

Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States or other countries.

*Other names and brands may be claimed as the property of others. * Other names and brands may be claimed as the property of others 19 FFuuttuurree TTeecchhnnoollooggyy:: IInntteell® II//OO AAcccceelleerraattiioonn TTeecchhnnoollooggyy

CCPPUU CCPPUU CPU Improvements M Data M Chipset Data e e

m OS Support m OS Support Accelerations Chipset Chipset o Chipset o IA Tuned Software r r y Data Movement Engines y

Edge Device Accelerations LLAANN IIOOPP

* Other names and brands may be claimed as the property of others 20 PPCCII EExxpprreessss** TTeecchhnnoollooggyy OOvveerrvviieeww

Device A Dual simplex Device B

ó A PCI Express* “lane” are four wires – One differential pair for transmit and another pair for receive – Signaling is at 2.5 GHz with 8b/10b encoding ó Connectors are defined for x1, x4, x8, x16 lanes providing an opportunity to scale bandwidth

Lanes Bandwidth (peak) x1 500 MB/s x4 2 GB/s x8 4 GB/s x16 8 GB/s

* Other names and brands may be claimed as the property of others 21 IImmpprroovveess BBooaarrdd CCoosstt PCI-X: PCI Express*: Two 64b Slots & Bridge Two x8 Slots & No Bridge

Two PCI-X Two PCI Express 64b slots x8 Slots

North Bridge North Bridge

PCI-X PCBI-rXi dHgueb

ò Board Area Reduced by 53% ò Board Layer Count Reduction Opportunity ò Component Count Decreases

* Other names and brands may be claimed as the property of others 22 PPCCII--EExxpprreessss BBaannddwwiiddtthh

* Other names and brands may be claimed as the property of others 23 FFooxxttoonn TTeecchhnnoollooggyy OOnn--ddeemmaanndd PPeerrffoorrmmaannccee BBoooosstt ó New processor feature boosting server Performance Boost with performance dynamically based on Foxton Technology application power consumption1 ó Example: on xto Fo

– Processor = 1.6 GHz e e c – Processor with Foxton = 1.6GHz + up to c n n a 10% (depending on app) a m m r r o o

ó f ó Largest performance boost on f r r e transaction based applications e Baseline P P (w/o Linpack SpecFP TPC-C (databases, BI, ERP,…) Foxton) ó No additional changes to OEM systems Industry Standard Benchmarks required

Foxton delivers on-demand performance boost for greater productivity and efficiency

1 Performance boost varies by application. Values are estimates Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, reference www.intel.com/procs/perf/limits.htm* oOr tchaelrl (nUa.mS.e)s 1 a-8n0d0 b-6ra2n8d-8s6 m86a yo br e1 -c9l1a6im-3e5d6 a-3s1 t0h4e property of others 24 WWhhyy PPeellllssttoonn?? 1MB L2I 2 Way Multi-threading

Power Management/ Dual- Frequency core Boost (Foxton)

Multiple cores and Multiple threads

2x12MB L3 Soft Error caches Arbiter Detection/ with Pellston Correction

* Other names and brands may be claimed as the property of others 25 PPeellllssttoonn TTeecchhnnoollooggyy CCaacchhee RReelliiaabbiilliittyy ó Benefits – Automatically disables cache lines in the event of hard cache memory error – Removes impact of 2-bit ECC errors in L3 cache that have single bit hard failures – Allows processor and system to continue normal operation ó How it works 1) Cache line access with error detected 2) Cache line is tested for hard error 3) If hard error is detected, cache line is disabled while processor and system continue normal operation

Pellston helps improve reliability and uptime

Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. All products, dates, and figures are preliminary and are subject to change without any notice. Copyright* ©OtIhnetre nl aCmoerps oarnadt iobrna n2d0s0 m4.ay be claimed as the property of others 26 PPeerrffoorrmmaannccee IInnnnoovvaattiioonnss

ó Intel® Itanium® 2 Processor Performance Strategy: increased performance/thread, then increased number of threads

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e : g t a – Increased L3 cache – Multi-threading support in e t n a i c a t r m d a i u t l o l o l s – Increased bus speed Montecito F e A S MMoonntteecciittoo:: 44 vviirrttuuaall pprroocceessssoorrss *Third-party marks and brands are the property of their respective owners; Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. All products, dates, and figures are preliminary and are subject to change without any notice. Copyright © Intel Corporation 2004. * Other names an*Od tbhrearn ndasm measy a bned cblraaimndesd masa yth bee p crloapimeretyd oafs o tthhee rpsroperty of ot2he7rs. IInntteell EEnnaabblliinngg RReessoouurrcceess Developer Platforms SW Tools SW Tools Extensive Support and Expertise and Expertise Services

Early Access Program

Intel Software College

Application Tuning Intel Centers Intel Threading Toolkit, HT/ Dual/Multi- Performance Libraries, Intel Solution Services Core Platforms Whitepapers Remote Access SW Engineers

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* Other names and brands may be claimed as the property of others 28 IIAA--3322 EExxeeccuuttiioonn LLaayyeerr FFuunnccttiioonnaalliittyy ó IA-32 Execution Layer (IA-32 EL) supports 32-bit applications running on Itanium® 2-based systems IA-32 Code – Historically, support for IA-32 applications has been Itanium Code carried out by on-die hardware IA-32 EL – Today, with supporting operating systems, 32-bit applications run using IA-32 EL Itanium® 2 IA-32 – IA-32 EL runs as part of the and is processor H/W transparent to the end user1

ó IA-32 EL provides improved performance over on-die hardware2 – Broadens the range of IA-32 applications that run well on Itanium architecture – Improves flexibility to add enhancements and support for new IA-32 instructions – Primary or performance-sensitive applications should be run on their native hardware platforms for optimal performance and capabilities

1 IA-32 EL is turned on by default on some supporting operating systems but must be installed on some others. Once installed, no further end user intervention is required under normal operating conditions. 2 Performance varies by application. IA-32 EL improves support for IA-32 applications running on Itanium® 2-based systems

* Other names and brands may be claimed as the property of others 29 * Other names and brands may be claimed as the property of others 30 IInntteell®® IIttaanniiuumm®® PPrroocceessssoorr FFaammiillyy RRooaaddmmaapp

Leading Performance

Itanium® 2 Montecito Montvale 4S+ Processor (Madison 9M) Dual Core, 24MB Dual Core, Poulson Multi-core 1.6 GHz, 9M Multi-threading Multi-threading

Leading $ / FLOPS

Itanium® 2 Millington DP Montvale Dimona Future 2S Processor (Fanwood) 1.6 GHz, 3M, DP DP, Montecito-based DP, Montvale-based DP, Tukwila-based DP, Poulson-based

Lower Power

LV Itanium® 2 LV Millington LV Montvale LV Dimona Future 2S Processor (LV Fanwood) DP, Low Voltage, DP, Low Voltage, DP, Low Voltage, DP, Low Voltage, 1.3 GHz, 3M, DP Montecito-based Montvale-based Tukwila-based Poulson-based

New Technologies • Multi-core • Multi-core enhancements • Multi-threading • Enhanced RAS • Dynamic performance boost (Foxton) • Enhanced virtualization • Dynamic (DBS) • Enhanced I/O & memory • Cache reliability (Pellston) • Common system architecture w/ Intel® • Intel® Virtualization Technology Xeon™

All products, dates, comparisons, and information are preliminary and subject to change without notice.

* Other names and brands may be claimed as the property of others 31 TThhaannkk YYoouu!!

© 2004 Intel Corporation LLeeggaall DDiissccllaaiimmeerr

Notice: This document contains information on products in the design phase of development. The information here is subject to change without notice. Do not finalize a design with this information. Contact your local Intel sales office or your distributor to obtain the latest specification before placing your product order.

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND/OR USE OF INTEL PRODUCTS, INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications, product descriptions, and plans at any time, without notice.

All products, dates, and figures are preliminary for planning purposes and are subject to change without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The Intel products discussed herein may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or by visiting Intel's website at http://www.intel.com.

Intel and Intel branded products are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. Copyright © 2004, Intel Corporation. All rights reserved.

*Other names and brands may be claimed as the property of others.

33 BBaacckkuupp

* Other names and brands may be claimed as the property of others 34 BBuuiillddiinngg SSuucccceessss ffoorr IIttaanniiuumm®® AArrcchhiitteeccttuurree

Success Factor Progress in ‘04 Sales growth X ~3X growth for Itanium 2-based systems in revenue1 X 1.8X growth for Itanium 2-based systems in units 1 X MSS up 200% over 1 year, while RISC stayed flat 1

Adoption by X Deployed by 70 of the Global 100, including 9 of the business leaders top 10 2 X >2.5X growth on Top 500* List of in 1 year 3 X 94% of surveyed customers with Itanium 2-based platforms plan to buy more 4 Support from X >2X growth in applications 2 industry leaders X New platform releases or announcements

Itanium architecture made strong progress in ‘04 & momentum continues in ’05

1 Source: IDC. 2/05 2 Source: Intel 2/05 3 Source: www..org/ as of 2/05 4 Source: Forrester Research 2/05 Product plans, descriptions, and dates are estimates only and s* uObthjeecr nt ecsh anndg ber awnditsh mouayt nbeo tcilcaeim. ed as the property of others 35