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Compact Variation-Aware Standard Cell Models for Statistical Static Timing Analysis

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Compact Variation-Aware Standard Cell Models for Statistical Static Timing Analysis Compact Variation-Aware Standard Cell Models for Statistical Static Timing Analysis A Dissertation Presented to The Academic Faculty By Seyed-Abdollah Aftabjahani In Partial Fulfillment of the Requirement for the Degree of Doctor of Philosophy in Electrical Engineering School of Electrical and Computer Engineering Georgia Institute of Technology August, 2011 Copyright © 2011 by Seyed-Abdollah Aftabjahani Compact Variation-Aware Standard Cell Models for Statistical Static Timing Analysis Approved by: Dr. Linda S. Milor, Advisor School of Electrical and Computer Engineering Georgia Institute of Technology Dr. Yorai Wardi School of Electrical and Computer Dr. Jeffrey A. Davis Engineering School of Electrical and Computer Georgia Institute of Technology Engineering Georgia Institute of Technology Dr. Michael F. Schatz School of Physics Dr. Sung-Kyu Lim Georgia Institute of Technology School of Electrical and Computer Engineering Georgia Institute of Technology Date Approved: June 01, 2011 DEDICATION To my beloved parents ACKNOWLEDGEMENTS This dissertation would not have been possible without the help and support that I have received from many individuals. I would like to express my gratitude to all who assisted me in this endeavor to push my limits of knowledge even further. I will not forget their impact upon my life. I would like to express my deep appreciation to my thesis advisor, Professor Linda Milor for her continuous support, encouragement, and supervision on my research. Throughout the years that I have been her research assistant, I have had excellent opportunities to acquire many academic and research skills, which I will use throughout my life. I have learned many intricate details on how to conduct high-quality academic research from the conception of a research idea, to the conduction of a literature review, to the formulation of a problem, to the utilization of creative thinking to address a problem, to the construction of models and prototypes for analysis and evaluation of a solution, and to the publication and presentation of results. I would also like to thank my committee members, Professor Jeffrey A. Davis, Professor Sung Kyu Lim, Professor Yorai Wardi, and Professor Michael Schatz for spending their precious time on the guidance and review of my research. I would like to thank the Semiconductor Research Corporation (SRC) for support of this research project under task 1419.001. I am grateful to the SRC for providing me with personal and professional development opportunities by funding my attendance at the related conferences, specifically TechCon, to network with experts in the field, to iv present the research to the leaders in academia and industry, and to receive appropriate feedback to improve the quality of the research. I would like to acknowledge my dear colleagues, especially Fahad Ahmed and Muhammad Bashir for all their constructive discussions on my research, and others who have contributed technical or editorial assistance including Professor Azad Naimee, Dr. Reza Sarvari, Dr. Alireza Shapoori, and Alex Anderson. I would like to thank the Dr. Kevin Martin and all technical personnel and staff of the Microelectronics Research Center (MIRC) at the Georgia Institute of Technology for providing a superb environment conducive to my research. Last but not least, I wish to thank my family, especially my parents, for all their love and support. They have provided a solid foundation for me to grow in all aspects of my life, including my education. v TABLE OF CONTENTS ACKNOWLEDGEMENTS ........................................................................................... IV LIST OF TABLES ........................................................................................................... X LIST OF FIGURES ..................................................................................................... XIII SUMMARY .................................................................................................................... XX CHAPTER I: INTRODUCTION .................................................................................... 1 CHAPTER II: BACKGROUND ..................................................................................... 5 CHAPTER III: MODELING AND ANALYSIS OF COMPACT VARIATION- AWARE STANDARD CELLS ...................................................................................... 11 3.1. Experimental Platform and Model of Variation .................................................... 11 3.2. Construction of the Waveform Model ................................................................... 13 3.3. Comparison of PCA Methods for Waveform Modeling ....................................... 22 3.4. Construction of the Cell Model and Timing Analysis ........................................... 25 3.5. Comparison of Experimental Design Methods for Cell Modeling ........................ 31 3.6. Complexity Analysis .............................................................................................. 39 3.7. Conclusions ............................................................................................................ 44 CHAPTER IV: EXTENDING AND ENHANCING THE METHODOLOGY ........ 46 4.1. Constructing a Cell Model for Deep Submicron Technology ............................... 47 4.1.1. More Accurate Transistor Models with More Parameters .............................. 48 4.1.2. Non-binned Transistor Model vs. Binned Transistor Model .......................... 53 vi 4.1.3. Support of Symmetric Parameter Variation for all Parameters ...................... 53 4.1.4. Variation Parameters Chosen for Cell Models ............................................... 54 4.2. Constructing a Cell Model for Very Large Parameter Variations ......................... 56 4.3. Constructing a Cell Model for Resistive-Capacitive Loads .................................. 65 4.3.1. Timing Characterization of Complex Loads................................................... 66 4.3.2. Mapping RC-Interconnect Networks to Pi-Models ........................................ 74 4.3.3. Cell Characterization with a Pi-Model Load .................................................. 84 4.3.4. RC-Interconnect Network Characterization ................................................... 89 4.3.5. Test Circuit and its Pi-Model-Converted RC-Interconnect Networks ............ 92 4.3.6. Timing Analysis Engine for Our Cell Models and RC-Interconnect Models 97 4.3.7. Timing Simulation and Simulation Results .................................................. 100 4.3.8. Conclusions and Future Work ...................................................................... 109 4.4. Investigating Accuracy Improvement Methods ................................................... 111 4.4.1 Accuracy Analysis of the PCA Waveform Model ......................................... 113 4.4.1.1 Accuracy Analysis of the PCA Waveform Model – Number and Location of Points....................................................................................................................... 113 4.4.1.2 Accuracy Analysis of the PCA Waveform Model for TSMC180RF– Waveform Dataset Selection, Range of Parameter Variations, and Model Subranging .............................................................................................................. 115 4.4.1.3 Accuracy Analysis of the PCA Waveform Model for FreePDK45 – Waveform Dataset Selection, Design of Experiment, Discretization Level, Range of Parameter Variations, and Model Subranging ........................................................ 122 vii 4.4.1.4. Accuracy Analysis of the PCA Waveform Model for FreePDK45 – The Iterative Method for Finding the Common PCs ..................................................... 135 4.4.2 Accuracy Analysis of the Cell Models .......................................................... 144 4.4.3 Conclusions .................................................................................................... 145 CHAPTER V: FAST VARIATION-AWARE STATISTICAL DYNAMIC TIMING ANALYSIS .................................................................................................................... 148 5.1. Introduction .......................................................................................................... 148 5.2. VVCCP– A compiled-code SDTA tool ............................................................... 151 5.2.1 Fault simulation framework ........................................................................... 151 5.2.2 Transformation process of models ................................................................. 153 5.2.3 Experiments ................................................................................................... 155 5.3. Experimental results ............................................................................................ 159 5.4. Conclusion and future work ................................................................................. 161 CHAPTER VI: FUTURE RESEARCH DIRECTIONS ........................................... 163 6.1. Short-Term Research Plan ................................................................................... 163 6.2. Long-Term Research Plan ................................................................................... 165 APPENDIX A: PRINCIPAL COMPONENTS ANALYSIS EQUATIONS ........... 169 A.1. Assumptions ........................................................................................................ 169 A.2. Singular value decomposition
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