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Basic CMOS Logic Design

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Basic CMOS Logic Design Basic CMOS Logic Design Lecture 2 18-322 Fall 2003 Readings: 5.2 Overview MOSFETs as switches Ideal switches & boolean operations CMOS logic gates Basic/complex functions Transmission gates Pass transistors Ideal Switches Ideal switches A=0 A=1 Assert-high x y x y = x open closed A=0 A=1 Assert-low x y x y closed open Ideal Switches (cont’d) a b 1 a· b a ·1 (a·1) ·b a a ·1 1 a + y = a ·1 + a ·0 = a (well-defined behavior) a ·0 0 MOS Transistor Gate Gate Source Source Drain Drain 0 VDD pp nnChannel Channel p-doped semiconductor substrate n-doped semiconductor substrate Gate Gate Source Drain Source Drain Substrate Substrate Copyright © by Maly 1997 Logic Gates Built with Switches s = 0 s = 1 aba a s = 1 "1" "1" "0" s = 1 "0" s = 1 abas = 0 a s = 0 "1" "1" "0" s = 0 "0" Logic Gates Built with Switches VDD "1" GND (0 V) "0" Floating "HZ" Between VDD and GND "X" VDD VDD VDD Out Out = 0 V Out = VDD ss s s = 1 s = 0 GND GND GND Copyright © by Maly 1997 Logic Gates Built with Switches VDD VDD VDD VDD Out = VDD Out = 0 V Out = 0 V Out = 0 V s1 = 0 s2 = 0 s1 = 1 s2 = 0 s1 = 0 s2 = 1 s1 = 1 s2 = 1 GND GND GND GND s2 Out s1 01 0 10 1 00 Copyright © by Maly 1997 Logic Gates Built with Switches VDD VDD VDD VDD Out = VDD Out = VDD Out = VDD Out = 0 V s1 = 0 s1 = 1 s1 = 0 s1 = 1 s2 = 0 s2 = 0 s2 = 1 s2 = 1 GND GND GND GND s2 Out s1 01 0 11 1 10 Copyright © by Maly 1997 Review: NMOS Logic “NMOS” Logic VDD s2 Out Out = 0 V s1 01 0 11 s1 = 1 1 10 s2 = 1 NAND Gate GND NMOS Logic Cons: Output Low consumes power Pull-up “weaker” than pull-down Need resistors Pros: For X inputs: X NMOS Transistors Overview MOSFETs as switches Ideal switches & boolean operations CMOS logic gates Basic/complex functions Transmission gates Pass transistors Review: CMOS Inverter s2 Out VDD VDD s1 01 0 - 0 pp s = 0 s = 1 1 1 - Out = 1 V Out = 0 V nns = 0 s = 1 ss GND GND CMOS Logic Design: NAND s2 Out VDD VDD VDD s1 01 0 11 s1 pmos s2 pmos AB 1 10 out output A s1 nmos B s2 nmos A GND out B CMOS Logic Design: NOR s2 Out VDD s1 01 0 10 s1 pmos 1 00 s2 pmos s1 nmos s2 nmos GND GND CMOS Logic Design: AND VDD s2 Out nmos s1 01 s1 0 00 s2 nmos 1 01 output s1 pmos s2 pmos GND GND DO NOT DO THIS! THIS IS BAD Transistor Rules NMOS Transistors Pass 0 Don’t Pass 1 (‘weak’ 1s) PMOS Transistors Pass 1 Don’t Pass 0 CMOS Gates PMOS Pull-up Network (PUN) NMOS Pull-down Network (PDN) VDD “Dual” Networks PUN Input(s) Output PDN GND Inverting Logic Input transition: 0 -> 1 1 -> 0 Output transition: 1 -> 0 0 -> 1 Input transition 0 -> 1 turns on NMOS Input transition 1 -> 0 turns on PMOS Examples: NAND, NOR, INVERT Complex CMOS Design F = ~((A + B + C) * D) C P AB ~D + ~A~B~C B P 00 01 11 10 D P 00 1 1 1 1 A P 01 1 0 0 0 CD D N 11 0 0 0 0 ABN N CN 10 1 1 1 1 CD + BD + AD D (C + B + A) CMOS Logic Gates Pros: No static power consumption Pull-up symmetric with pull-down No resistors Cons: X input gate: 2X transistors Overview MOSFETs as switches Ideal switches & boolean operations CMOS logic gates Basic/complex functions Transmission gates Pass transistors Transmission Gates Static CMOS Inputs -> transistor gates Outputs have connection to supply PUN Input(s) Output PDN GND Use transistor to connect input to output? NMOS Pass Gate 0 1 1 or High-Z 00 0 1 11 (?) Works like a switch But NMOS doesn’t “pass 1’s” Passing 1s VDD VDD VDD - VT Vin Vout 0V 0V The NMOS shuts off as out -> VDD Vout at least VTn less than VDD Transmission Gates VDD Rn ) Ω Rp R(k Req GND Vout Complementary The Symbol: Inputs Logic with T-Gates: XOR/XNOR B B A A B A ⊕ B B A ⊕ B A A B B Summary Discussed Concepts ⌧MOSFETs as switches ⌧NMOS and CMOS ⌧Transmission gates Examples ⌧Basic/complex functions using CMOS More practice Complex functions (transistor-level diagrams).
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